From: Marek Vasut <marex@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 2/4 v2] net: Add driver for Zynq Gem IP
Date: Fri, 14 Sep 2012 06:45:41 +0200 [thread overview]
Message-ID: <201209140645.41556.marex@denx.de> (raw)
In-Reply-To: <CANr=Z=aL5BpyhD5c=_RvJ4LwbCo_OP826mvdzG-k8xoAWSmRgQ@mail.gmail.com>
Dear Joe Hershberger,
> Hi Marek,
>
> On Thu, Sep 13, 2012 at 4:28 AM, Marek Vasut <marex@denx.de> wrote:
> > Dear Michal Simek,
> >
> >> + /*
> >> + * Following is the setup for Network Control register.
> >> + * Bit 2: Set to enable Receive operation.
> >> + * Bit 3: Set to enable Transmitt operation.
> >> + * Bit 4: Set to enable MDIO operation.
> >> + */
> >> + tmp = readl(®s->nwctrl);
> >> + /* MDIO, Rx and Tx enable */
> >> + tmp |= ZYNQ_GEM_NWCTRL_MDEN_MASK | ZYNQ_GEM_NWCTRL_RXEN_MASK |
> >> + ZYNQ_GEM_NWCTRL_TXEN_MASK;
> >> + writel(tmp, ®s->nwctrl);
> >
> > setbits_le32()
>
> This is not equivalent. Using setbits_le32() will not provide a dmb()
> on the operations the way that readl(), writel() does. I believe this
> will cause problems when the dcache is enabled, right?
Not when dcache is enabled, the register space isn't cached. But the compiler
can run some wild optimizations across that. So where's the problem, do we add
dmb() to clrsetbits() calls ?
> -Joe
Best regards,
Marek Vasut
next prev parent reply other threads:[~2012-09-14 4:45 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-08-16 6:30 [U-Boot] [PATCH 1/4 v2] serial: Add Zynq serial driver Michal Simek
2012-08-16 6:30 ` [U-Boot] [PATCH 2/4 v2] net: Add driver for Zynq Gem IP Michal Simek
2012-09-12 10:19 ` Michal Simek
2012-09-13 9:28 ` Marek Vasut
2012-09-13 10:16 ` Michal Simek
2012-09-13 12:30 ` Marek Vasut
2012-09-14 3:49 ` Joe Hershberger
2012-09-14 4:45 ` Marek Vasut [this message]
[not found] ` <CANr=Z=aejhXoGabpcderroSeQSWJM+cbXS7yg6NVeHKJLqQhRQ@mail.gmail.com>
2012-09-14 7:34 ` Marek Vasut
2012-08-16 6:30 ` [U-Boot] [PATCH 3/4 v2] arm: Support new Xilinx Zynq platform Michal Simek
2012-09-12 10:23 ` Michal Simek
2012-09-13 9:32 ` Marek Vasut
2012-09-13 9:36 ` Michal Simek
2012-09-13 9:31 ` Marek Vasut
2012-09-13 9:52 ` Michal Simek
2012-09-13 10:31 ` Marek Vasut
2012-09-13 11:24 ` Michal Simek
2012-09-13 12:32 ` Marek Vasut
2012-09-13 12:52 ` Michal Simek
2012-09-13 13:01 ` Marek Vasut
2012-08-16 6:30 ` [U-Boot] [PATCH 4/4 v3] xilinx: Add new Zynq board Michal Simek
2012-09-12 10:23 ` Michal Simek
2012-09-13 9:35 ` Marek Vasut
2012-09-13 9:55 ` Michal Simek
2012-09-13 12:31 ` Marek Vasut
2012-09-13 12:17 ` Michal Simek
2012-09-14 4:03 ` Joe Hershberger
2012-09-14 5:42 ` Michal Simek
2012-09-12 10:20 ` [U-Boot] [PATCH 1/4 v2] serial: Add Zynq serial driver Michal Simek
2012-09-13 9:21 ` Marek Vasut
2012-09-13 9:45 ` Michal Simek
2012-09-13 12:33 ` Marek Vasut
2012-09-13 13:54 ` Michal Simek
2012-09-13 14:01 ` Marek Vasut
2012-09-14 4:09 ` Joe Hershberger
2012-09-14 4:47 ` Marek Vasut
2012-09-14 5:23 ` Joe Hershberger
2012-09-14 7:39 ` Marek Vasut
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