From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thierry Reding Date: Tue, 18 Sep 2012 22:04:43 +0200 Subject: [U-Boot] Cache alignment warnings on Tegra (ARM) In-Reply-To: <201209182136.19110.marex@denx.de> References: <201209182121.14235.marex@denx.de> <20120918192916.GA31042@avionic-0098.mockup.avionic-design.de> <201209182136.19110.marex@denx.de> Message-ID: <20120918200443.GA31435@avionic-0098.mockup.avionic-design.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Tue, Sep 18, 2012 at 09:36:18PM +0200, Marek Vasut wrote: > Dear Thierry Reding, > > [...] > > > > Sure, but after you apply the bounce buffer, you can safely invalidate > > > the whole cacheline, so align it up and be done with it. > > > > That's what I proposed to do last time around but it was NAK'ed. > > By who? I think it was Simon Glass and Mike Frysinger. They NAK'ed it for very valid reason, so I'm not complaining. > > At the > > time I didn't ensure that the buffer was actually big enough, which is > > why people didn't like it (data on the stack after the DMA buffer might > > be invalidated as well). > > Correct, thus the bounce buffer. I don't think we even need the bounce buffer. All that needs to be done is guarantee that the buffers passed to the MMC driver are properly aligned and sized. Thierry -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 836 bytes Desc: not available URL: