* [U-Boot] [PATCH] ppc4xx: Remove ML2 board support
@ 2012-09-19 13:18 Stefan Roese
2012-09-19 13:18 ` [U-Boot] [PATCH] ppc4xx: Remove AP1000 " Stefan Roese
` (2 more replies)
0 siblings, 3 replies; 10+ messages in thread
From: Stefan Roese @ 2012-09-19 13:18 UTC (permalink / raw)
To: u-boot
As the board seems to be unmaintained for some time, lets remove
the support in mainline completely.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Peter De Schrijver <p2@mind.be>
---
MAINTAINERS | 4 -
arch/powerpc/include/asm/ppc4xx.h | 2 +-
board/ml2/Makefile | 45 ------
board/ml2/flash.c | 300 --------------------------------------
board/ml2/init.S | 30 ----
board/ml2/ml2.c | 62 --------
board/ml2/serial.c | 115 ---------------
board/ml2/u-boot.lds | 94 ------------
board/ml2/u-boot.lds.debug | 135 -----------------
boards.cfg | 1 -
include/configs/ML2.h | 257 --------------------------------
11 files changed, 1 insertion(+), 1044 deletions(-)
delete mode 100644 board/ml2/Makefile
delete mode 100644 board/ml2/flash.c
delete mode 100644 board/ml2/init.S
delete mode 100644 board/ml2/ml2.c
delete mode 100644 board/ml2/serial.c
delete mode 100644 board/ml2/u-boot.lds
delete mode 100644 board/ml2/u-boot.lds.debug
delete mode 100644 include/configs/ML2.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 07dc789..e5ac741 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -452,10 +452,6 @@ Heiko Schocher <hs@denx.de>
uc101 MPC5200
ve8313 MPC8313
-Peter De Schrijver <p2@mind.be>
-
- ML2 PPC4xx
-
Andre Schwarz <andre.schwarz@matrix-vision.de>
mergerbox MPC8377
diff --git a/arch/powerpc/include/asm/ppc4xx.h b/arch/powerpc/include/asm/ppc4xx.h
index 633f793..55eb4d6 100644
--- a/arch/powerpc/include/asm/ppc4xx.h
+++ b/arch/powerpc/include/asm/ppc4xx.h
@@ -86,7 +86,7 @@
/*
* Configure which SDRAM/DDR/DDR2 controller is equipped
*/
-#if defined(CONFIG_AP1000) || defined(CONFIG_ML2)
+#if defined(CONFIG_AP1000)
#define CONFIG_SDRAM_PPC4xx_IBM_SDRAM /* IBM SDRAM controller */
#endif
diff --git a/board/ml2/Makefile b/board/ml2/Makefile
deleted file mode 100644
index f4df3ac..0000000
--- a/board/ml2/Makefile
+++ /dev/null
@@ -1,45 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o serial.o
-SOBJS = init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
diff --git a/board/ml2/flash.c b/board/ml2/flash.c
deleted file mode 100644
index c125d41..0000000
--- a/board/ml2/flash.c
+++ /dev/null
@@ -1,300 +0,0 @@
-/*
- * flash.c: Support code for the flash chips on the Xilinx ML2 board
- *
- * Copyright 2002 Mind NV
- *
- * http://www.mind.be/
- *
- * Author : Peter De Schrijver (p2 at mind.be)
- *
- * This software may be used and distributed according to the terms of
- * the GNU General Public License (GPL) version 2, incorporated herein by
- * reference. Drivers based on or derived from this code fall under the GPL
- * and must retain the authorship, copyright and this license notice. This
- * file is not a complete program and may only be used when the entire program
- * is licensed under the GPL.
- *
- */
-
-#include <common.h>
-#include <asm/u-boot.h>
-#include <configs/ML2.h>
-
-#define FLASH_BANK_SIZE (64*1024*1024)
-
-flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
-
-#define SECT_SIZE (512*1024)
-
-#define CMD_READ_ARRAY 0x00FF00FF00FF00FULL
-#define CMD_IDENTIFY 0x0090009000900090ULL
-#define CMD_ERASE_SETUP 0x0020002000200020ULL
-#define CMD_ERASE_CONFIRM 0x00D000D000D000D0ULL
-#define CMD_PROGRAM 0x0040004000400040ULL
-#define CMD_RESUME 0x00D000D000D000D0ULL
-#define CMD_SUSPEND 0x00B000B000B000B0ULL
-#define CMD_STATUS_READ 0x0070007000700070ULL
-#define CMD_STATUS_RESET 0x0050005000500050ULL
-
-#define BIT_BUSY 0x0080008000800080ULL
-#define BIT_ERASE_SUSPEND 0x004000400400040ULL
-#define BIT_ERASE_ERROR 0x0020002000200020ULL
-#define BIT_PROGRAM_ERROR 0x0010001000100010ULL
-#define BIT_VPP_RANGE_ERROR 0x0008000800080008ULL
-#define BIT_PROGRAM_SUSPEND 0x0004000400040004ULL
-#define BIT_PROTECT_ERROR 0x0002000200020002ULL
-#define BIT_UNDEFINED 0x0001000100010001ULL
-
-#define BIT_SEQUENCE_ERROR 0x0030003000300030ULL
-
-#define BIT_TIMEOUT 0x80000000
-
-
-inline void eieio(void) {
-
- __asm__ __volatile__ ("eieio" : : : "memory");
-
-}
-
-ulong flash_init(void) {
-
- int i, j;
- ulong size = 0;
-
- for(i=0;i<CONFIG_SYS_MAX_FLASH_BANKS;i++) {
- ulong flashbase = 0;
-
- flash_info[i].flash_id = (INTEL_MANUFACT & FLASH_VENDMASK) |
- (INTEL_ID_28F128J3A & FLASH_TYPEMASK);
- flash_info[i].size = FLASH_BANK_SIZE;
- flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
- memset(flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
- if (i==0)
- flashbase = CONFIG_SYS_FLASH_BASE;
- else
- panic("configured too many flash banks!\n");
- for (j = 0; j < flash_info[i].sector_count; j++)
- flash_info[i].start[j]=flashbase + j * SECT_SIZE;
-
- size += flash_info[i].size;
- }
-
- return size;
-}
-
-void flash_print_info (flash_info_t *info) {
-
- int i;
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case (INTEL_MANUFACT & FLASH_VENDMASK):
- printf("Intel: ");
- break;
- default:
- printf("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case (INTEL_ID_28F128J3A & FLASH_TYPEMASK):
- printf("4x 28F128J3A (128Mbit)\n");
- break;
- default:
- printf("Unknown Chip Type\n");
- break;
- }
-
- printf(" Size: %ld MB in %d Sectors\n", info->size >> 20, info->sector_count);
- printf(" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++) {
- if ((i % 5) == 0)
- printf("\n ");
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
-}
-
-int flash_error (unsigned long long code) {
-
- if (code & BIT_TIMEOUT) {
- printf ("Timeout\n");
- return ERR_TIMOUT;
- }
-
- if (~code & BIT_BUSY) {
- printf ("Busy\n");
- return ERR_PROG_ERROR;
- }
-
- if (code & BIT_VPP_RANGE_ERROR) {
- printf ("Vpp range error\n");
- return ERR_PROG_ERROR;
- }
-
- if (code & BIT_PROTECT_ERROR) {
- printf ("Device protect error\n");
- return ERR_PROG_ERROR;
- }
-
- if (code & BIT_SEQUENCE_ERROR) {
- printf ("Command seqence error\n");
- return ERR_PROG_ERROR;
- }
-
- if (code & BIT_ERASE_ERROR) {
- printf ("Block erase error\n");
- return ERR_PROG_ERROR;
- }
-
- if (code & BIT_PROGRAM_ERROR) {
- printf ("Program error\n");
- return ERR_PROG_ERROR;
- }
-
- if (code & BIT_ERASE_SUSPEND) {
- printf ("Block erase suspended\n");
- return ERR_PROG_ERROR;
- }
-
- if (code & BIT_PROGRAM_SUSPEND) {
- printf ("Program suspended\n");
- return ERR_PROG_ERROR;
- }
-
- return ERR_OK;
-
-}
-
-int flash_erase (flash_info_t *info, int s_first, int s_last) {
-
- int rc = ERR_OK;
- int sect;
- unsigned long long result;
-
- if (info->flash_id == FLASH_UNKNOWN)
- return ERR_UNKNOWN_FLASH_TYPE;
-
- if ((s_first < 0) || (s_first > s_last))
- return ERR_INVAL;
-
- if ((info->flash_id & FLASH_VENDMASK) != (INTEL_MANUFACT & FLASH_VENDMASK))
- return ERR_UNKNOWN_FLASH_VENDOR;
-
- for (sect=s_first; sect<=s_last; ++sect)
- if (info->protect[sect])
- return ERR_PROTECTED;
-
- for (sect = s_first; sect<=s_last && !ctrlc(); sect++) {
- volatile unsigned long long *addr=
- (unsigned long long *)(info->start[sect]);
-
- printf("Erasing sector %2d ... ", sect);
-
- *addr=CMD_STATUS_RESET;
- eieio();
- *addr=CMD_ERASE_SETUP;
- eieio();
- *addr=CMD_ERASE_CONFIRM;
- eieio();
-
- do {
- result = *addr;
- } while(~result & BIT_BUSY);
-
- *addr=CMD_READ_ARRAY;
-
- if ((rc = flash_error(result)) == ERR_OK)
- printf("ok.\n");
- else
- break;
- }
-
- if (ctrlc())
- printf("User Interrupt!\n");
-
- return rc;
-}
-
-static int write_word (flash_info_t *info, ulong dest, unsigned long long data) {
-
- volatile unsigned long long *addr=(unsigned long long *)dest;
- unsigned long long result;
- int rc = ERR_OK;
-
- result = *addr;
- if ((result & data) != data)
- return ERR_NOT_ERASED;
-
- *addr=CMD_STATUS_RESET;
- eieio();
- *addr=CMD_PROGRAM;
- eieio();
- *addr=data;
- eieio();
-
- do {
- result = *addr;
- } while(~result & BIT_BUSY);
-
- *addr=CMD_READ_ARRAY;
-
- rc = flash_error(result);
-
- return rc;
-
-}
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) {
-
- ulong cp, wp;
- unsigned long long data;
- int l;
- int i,rc;
-
- wp=(addr & ~7);
-
- if((l=addr-wp) != 0) {
- data=0;
- for(i=0,cp=wp;i<l;++i,++cp)
- data = (data >> 8) | (*(uchar *)cp << 24);
-
- for (; i<8 && cnt>0; ++i) {
- data = (data >> 8) | (*src++ << 24);
- --cnt;
- ++cp;
- }
-
- for (; i<8; ++i, ++cp)
- data = (data >> 8) | (*(uchar *)cp << 24);
-
- if ((rc = write_word(info, wp, data)) != 0)
- return rc;
-
- wp+=8;
- }
-
- while(cnt>=8) {
- data = *((unsigned long long *)src);
- if ((rc = write_word(info, wp, data)) != 0)
- return rc;
- src+=8;
- wp+=8;
- cnt-=8;
- }
-
- if(cnt == 0)
- return ERR_OK;
-
- data = 0;
- for (i=0, cp=wp; i<8 && cnt>0; ++i, ++cp) {
- data = (data >> 8) | (*src++ << 24);
- --cnt;
- }
- for (; i<8; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *)cp << 24);
- }
-
- return write_word(info, wp, data);
-
-}
diff --git a/board/ml2/init.S b/board/ml2/init.S
deleted file mode 100644
index 91d053c..0000000
--- a/board/ml2/init.S
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * init.S: Stubs for U-Boot initialization
- *
- * Copyright 2002 Mind NV
- *
- * http://www.mind.be/
- *
- * Author : Peter De Schrijver (p2@mind.be)
- *
- * This software may be used and distributed according to the terms of
- * the GNU General Public License (GPL) version 2, incorporated herein by
- * reference. Drivers based on or derived from this code fall under the GPL
- * and must retain the authorship, copyright and this license notice. This
- * file is not a complete program and may only be used when the entire
- * program is licensed under the GPL.
- *
- */
-
-#include <asm/ppc4xx.h>
-
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-
-#include <asm/cache.h>
-#include <asm/mmu.h>
-
-
- .globl ext_bus_cntlr_init
-ext_bus_cntlr_init:
- blr
diff --git a/board/ml2/ml2.c b/board/ml2/ml2.c
deleted file mode 100644
index 319dca0..0000000
--- a/board/ml2/ml2.c
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * ml2.c: U-Boot platform support for Xilinx ML2 board
- *
- * Copyright 2002 Mind NV
- *
- * http://www.mind.be/
- *
- * Author : Peter De Schrijver (p2 at mind.be)
- *
- * Derived from : Other platform support files in this tree
- *
- * This software may be used and distributed according to the terms of
- * the GNU General Public License (GPL) version 2, incorporated herein by
- * reference. Drivers based on or derived from this code fall under the GPL
- * and must retain the authorship, copyright and this license notice. This
- * file is not a complete program and may only be used when the entire
- * program is licensed under the GPL.
- *
- */
-
-#include <common.h>
-#include <asm/processor.h>
-
-
-int board_early_init_f (void)
-{
- return 0;
-}
-
-
-int checkboard (void)
-{
- char buf[64];
- int i;
- int l = getenv_f("serial#", buf, sizeof(buf));
-
- if (l < 0 || strncmp(buf, "ML2", 9)) {
- printf ("### No HW ID - assuming ML2");
- } else {
- for (i = 0; i < l; i++) {
- if (buf[i] == ' ')
- break;
- putc(buf[i]);
- }
- }
- putc ('\n');
-
- return (0);
-}
-
-
-phys_size_t initdram (int board_type)
-{
- return 32 * 1024 * 1024;
-}
-
-int testdram (void)
-{
- printf ("test: xxx MB - ok\n");
-
- return (0);
-}
diff --git a/board/ml2/serial.c b/board/ml2/serial.c
deleted file mode 100644
index d9113ab..0000000
--- a/board/ml2/serial.c
+++ /dev/null
@@ -1,115 +0,0 @@
-/*
- * (C) Copyright 2002
- * Peter De Schrijver (p2@mind.be), Mind Linux Solutions, NV.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-#include <common.h>
-#include <asm/u-boot.h>
-#include <asm/processor.h>
-#include <command.h>
-#include <configs/ML2.h>
-
-#if (defined CONFIG_SYS_INIT_CHAN1) || (defined CONFIG_SYS_INIT_CHAN2)
-#include <ns16550.h>
-#endif
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#if (defined CONFIG_SYS_INIT_CHAN1) || (defined CONFIG_SYS_INIT_CHAN2)
-const NS16550_t COM_PORTS[] = { (NS16550_t) CONFIG_SYS_NS16550_COM1,
- (NS16550_t) CONFIG_SYS_NS16550_COM2
-};
-#endif
-
-int serial_init (void)
-{
- int clock_divisor = CONFIG_SYS_NS16550_CLK / 16 / gd->baudrate;
-
-#ifdef CONFIG_SYS_INIT_CHAN1
- (void) NS16550_init (COM_PORTS[0], clock_divisor);
-#endif
-#ifdef CONFIG_SYS_INIT_CHAN2
- (void) NS16550_init (COM_PORTS[1], clock_divisor);
-#endif
- return 0;
-
-}
-
-void serial_putc (const char c)
-{
- if (c == '\n')
- NS16550_putc (COM_PORTS[CONFIG_SYS_DUART_CHAN], '\r');
-
- NS16550_putc (COM_PORTS[CONFIG_SYS_DUART_CHAN], c);
-}
-
-int serial_getc (void)
-{
- return NS16550_getc (COM_PORTS[CONFIG_SYS_DUART_CHAN]);
-}
-
-int serial_tstc (void)
-{
- return NS16550_tstc (COM_PORTS[CONFIG_SYS_DUART_CHAN]);
-}
-
-void serial_setbrg (void)
-{
- int clock_divisor = CONFIG_SYS_NS16550_CLK / 16 / gd->baudrate;
-
-#ifdef CONFIG_SYS_INIT_CHAN1
- NS16550_reinit (COM_PORTS[0], clock_divisor);
-#endif
-#ifdef CONFIG_SYS_INIT_CHAN2
- NS16550_reinit (COM_PORTS[1], clock_divisor);
-#endif
-}
-
-void serial_puts (const char *s)
-{
- while (*s) {
- serial_putc (*s++);
- }
-}
-
-#if defined(CONFIG_CMD_KGDB)
-void kgdb_serial_init (void)
-{
-}
-
-void putDebugChar (int c)
-{
- serial_putc (c);
-}
-
-void putDebugStr (const char *str)
-{
- serial_puts (str);
-}
-
-int getDebugChar (void)
-{
- return serial_getc ();
-}
-
-void kgdb_interruptible (int yes)
-{
- return;
-}
-#endif
diff --git a/board/ml2/u-boot.lds b/board/ml2/u-boot.lds
deleted file mode 100644
index 9f9ddb8..0000000
--- a/board/ml2/u-boot.lds
+++ /dev/null
@@ -1,94 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .text :
- {
- *(.text*)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
- }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- _GOT2_TABLE_ = .;
- KEEP(*(.got2))
- KEEP(*(.got))
- PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
- _FIXUP_TABLE_ = .;
- KEEP(*(.fixup))
- }
- __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data*)
- *(.sdata*)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss (NOLOAD) :
- {
- *(.bss*)
- *(.sbss*)
- *(COMMON)
- . = ALIGN(4);
- }
- __bss_end__ = . ;
- PROVIDE (end = .);
-}
diff --git a/board/ml2/u-boot.lds.debug b/board/ml2/u-boot.lds.debug
deleted file mode 100644
index fcf8ebb..0000000
--- a/board/ml2/u-boot.lds.debug
+++ /dev/null
@@ -1,135 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib/vsprintf.o (.text)
- lib/crc32.o (.text)
- arch/powerpc/lib/extable.o (.text)
-
- common/env_embedded.o(.text)
-
- *(.text)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- __bss_end__ = . ;
- PROVIDE (end = .);
-}
diff --git a/boards.cfg b/boards.cfg
index 343859e..226c7cb 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -958,7 +958,6 @@ JSE powerpc ppc4xx jse
korat powerpc ppc4xx
korat_perm powerpc ppc4xx korat - - korat:KORAT_PERMANENT
lwmon5 powerpc ppc4xx
-ML2 powerpc ppc4xx ml2
pcs440ep powerpc ppc4xx
quad100hd powerpc ppc4xx
sbc405 powerpc ppc4xx
diff --git a/include/configs/ML2.h b/include/configs/ML2.h
deleted file mode 100644
index 4df9f4c..0000000
--- a/include/configs/ML2.h
+++ /dev/null
@@ -1,257 +0,0 @@
-/*
- * ML2.h: ML2 specific config options
- *
- * Copyright 2002 Mind NV
- *
- * http://www.mind.be/
- *
- * Author : Peter De Schrijver (p2 at mind.be)
- *
- * Derived from : other configuration header files in this tree
- *
- * This software may be used and distributed according to the terms of
- * the GNU General Public License (GPL) version 2, incorporated herein by
- * reference. Drivers based on or derived from this code fall under the GPL
- * and must retain the authorship, copyright and this license notice. This
- * file is not a complete program and may only be used when the entire
- * program is licensed under the GPL.
- *
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-
-#define CONFIG_405 1 /* This is a PPC405 CPU */
-#define CONFIG_4xx 1 /* ...member of PPC4xx family */
-#define CONFIG_ML2 1 /* ...on a ML2 board */
-
-#define CONFIG_SYS_TEXT_BASE 0x18000000
-#define CONFIG_SYS_LDSCRIPT "board/ml2/u-boot.lds"
-
-#define CONFIG_ENV_IS_IN_FLASH 1
-
-#ifdef CONFIG_ENV_IS_IN_NVRAM
-#undef CONFIG_ENV_IS_IN_FLASH
-#else
-#ifdef CONFIG_ENV_IS_IN_FLASH
-#undef CONFIG_ENV_IS_IN_NVRAM
-#endif
-#endif
-
-#define CONFIG_BAUDRATE 9600
-#define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */
-
-#if 1
-#define CONFIG_BOOTCOMMAND "bootm" /* autoboot command */
-#else
-#define CONFIG_BOOTCOMMAND "bootp" /* autoboot command */
-#endif
-
-#define CONFIG_PREBOOT "fsload 0x00100000 /boot/image"
-
-#if 0
-#define CONFIG_BOOTARGS "root=/dev/nfs " \
- "ip=192.168.2.176:192.168.2.190:192.168.2.79:255.255.255.0 " \
- "nfsroot=192.168.2.190:/home/stefan/cpci405/target_ftest4"
-#else
-#define CONFIG_BOOTARGS "root=/dev/mtdblock2 " \
- "console=ttyS0 console=tty"
-
-#endif
-
-#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
-#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_IRQ
-#define CONFIG_CMD_KGDB
-#define CONFIG_CMD_BEDBUG
-#define CONFIG_CMD_ELF
-#define CONFIG_CMD_JFFS2
-
-#undef CONFIG_CMD_NET
-#undef CONFIG_CMD_NFS
-#undef CONFIG_CMD_RTC
-#undef CONFIG_CMD_PCI
-#undef CONFIG_CMD_I2C
-
-
-#undef CONFIG_WATCHDOG /* watchdog disabled */
-
-#define CONFIG_SYS_CLK_FREQ 50000000
-
-#define CONFIG_SPD_EEPROM 1 /* use SPD EEPROM for setup */
-
-/*
- * I2C
- */
-#define CONFIG_HARD_I2C /* I2C with hardware support */
-#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
-#define CONFIG_SYS_I2C_SLAVE 0x7F
-#define CONFIG_SYS_I2C_SPEED 400000
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
-#else
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-#endif
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-
-#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
-
-/*
- * If CONFIG_SYS_EXT_SERIAL_CLOCK, then the UART divisor is 1.
- * If CONFIG_SYS_405_UART_ERRATA_59, then UART divisor is 31.
- * Otherwise, UART divisor is determined by CPU Clock and CONFIG_SYS_BASE_BAUD value.
- * The Linux BASE_BAUD define should match this configuration.
- * baseBaud = cpuClock/(uartDivisor*16)
- * If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock,
- * set Linux BASE_BAUD to 403200.
- */
-#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* external serial clock */
-#undef CONFIG_SYS_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */
-
-#define CONFIG_SYS_BASE_BAUD (3125000*16)
-#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_BASE_BAUD
-#define CONFIG_SYS_DUART_CHAN 0
-#define CONFIG_SYS_NS16550_COM1 0xa0001003
-#define CONFIG_SYS_NS16550_COM2 0xa0011003
-#define CONFIG_SYS_NS16550_REG_SIZE -4
-#define CONFIG_SYS_NS16550 1
-#define CONFIG_SYS_INIT_CHAN1 1
-#define CONFIG_SYS_INIT_CHAN2 1
-
-/* The following table includes the supported baudrates */
-#define CONFIG_SYS_BAUDRATE_TABLE \
- {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
-
-#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
-
-/*-----------------------------------------------------------------------
- * Start addresses for the final memory configuration
- * (Set up by the startup code)
- * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
- */
-#define CONFIG_SYS_SDRAM_BASE 0x00000000
-#define CONFIG_SYS_FLASH_BASE 0x18000000
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_MONITOR_LEN (192 * 1024) /* Reserve 196 kB for Monitor */
-#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
-
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
-/*-----------------------------------------------------------------------
- * FLASH organization
- */
-#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
-#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
-
-#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
-
-/* BEG ENVIRONNEMENT FLASH */
-#ifdef CONFIG_ENV_IS_IN_FLASH
-#define CONFIG_ENV_OFFSET 0x00050000 /* Offset of Environment Sector */
-#define CONFIG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */
-#define CONFIG_ENV_SECT_SIZE 0x10000 /* see README - env sector total size */
-#endif
-/* END ENVIRONNEMENT FLASH */
-/*-----------------------------------------------------------------------
- * NVRAM organization
- */
-#define CONFIG_SYS_NVRAM_BASE_ADDR 0xf0000000 /* NVRAM base address */
-#define CONFIG_SYS_NVRAM_SIZE 0x1ff8 /* NVRAM size */
-
-#ifdef CONFIG_ENV_IS_IN_NVRAM
-#define CONFIG_ENV_SIZE 0x1000 /* Size of Environment vars */
-#define CONFIG_ENV_ADDR \
- (CONFIG_SYS_NVRAM_BASE_ADDR+CONFIG_SYS_NVRAM_SIZE-CONFIG_ENV_SIZE) /* Env */
-#endif
-
-/*
- * Init Memory Controller:
- *
- * BR0/1 and OR0/1 (FLASH)
- */
-
-#define FLASH_BASE0_PRELIM CONFIG_SYS_FLASH_BASE /* FLASH bank #0 */
-#define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */
-
-
-/* Configuration Port location */
-#define CONFIG_PORT_ADDR 0xF0000500
-
-/*-----------------------------------------------------------------------
- * Definitions for initial stack pointer and data area (in DPRAM)
- */
-
-#define CONFIG_SYS_INIT_RAM_ADDR 0x800000 /* inside of SDRAM */
-#define CONFIG_SYS_INIT_RAM_SIZE 0x2000 /* Size of used area in RAM */
-#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-
-/*-----------------------------------------------------------------------
- * Definitions for Serial Presence Detect EEPROM address
- * (to get SDRAM settings)
- */
-#define SPD_EEPROM_ADDRESS 0x50
-
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
-#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
-#endif
-
-/*
- * JFFS2 partitions
- *
- */
-/* No command line, one static partition, whole device */
-#undef CONFIG_CMD_MTDPARTS
-#define CONFIG_JFFS2_DEV "nor0"
-#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF
-#define CONFIG_JFFS2_PART_OFFSET 0x00080000
-
-/* mtdparts command line support */
-/* Note: fake mtd_id used, no linux mtd map file */
-/*
-#define CONFIG_CMD_MTDPARTS
-#define MTDIDS_DEFAULT "nor0=ml2-0"
-#define MTDPARTS_DEFAULT "mtdparts=ml2-0:-@512k(jffs2)"
-*/
-
-#endif /* __CONFIG_H */
--
1.7.12.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [U-Boot] [PATCH] ppc4xx: Remove AP1000 board support
2012-09-19 13:18 [U-Boot] [PATCH] ppc4xx: Remove ML2 board support Stefan Roese
@ 2012-09-19 13:18 ` Stefan Roese
2012-09-19 22:53 ` Marek Vasut
2012-09-19 13:18 ` [U-Boot] [PATCH] mpc82xx: Remove BMW board port Stefan Roese
2012-09-19 22:53 ` [U-Boot] [PATCH] ppc4xx: Remove ML2 board support Marek Vasut
2 siblings, 1 reply; 10+ messages in thread
From: Stefan Roese @ 2012-09-19 13:18 UTC (permalink / raw)
To: u-boot
As the board seems to be unmaintained for some time, lets remove
the support in mainline completely.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: James MacAulay <james.macaulay@amirix.com>
---
arch/powerpc/cpu/ppc4xx/speed.c | 8 -
arch/powerpc/include/asm/ppc4xx.h | 7 -
board/amirix/ap1000/Makefile | 47 --
board/amirix/ap1000/ap1000.c | 709 ------------------------------
board/amirix/ap1000/ap1000.h | 173 --------
board/amirix/ap1000/flash.c | 900 --------------------------------------
board/amirix/ap1000/init.S | 30 --
board/amirix/ap1000/pci.c | 318 --------------
board/amirix/ap1000/powerspan.c | 750 -------------------------------
board/amirix/ap1000/powerspan.h | 170 -------
board/amirix/ap1000/serial.c | 111 -----
board/amirix/ap1000/u-boot.lds | 96 ----
boards.cfg | 1 -
drivers/net/e1000.c | 42 +-
include/common.h | 4 +-
include/configs/AP1000.h | 247 -----------
16 files changed, 3 insertions(+), 3610 deletions(-)
delete mode 100644 board/amirix/ap1000/Makefile
delete mode 100644 board/amirix/ap1000/ap1000.c
delete mode 100644 board/amirix/ap1000/ap1000.h
delete mode 100644 board/amirix/ap1000/flash.c
delete mode 100644 board/amirix/ap1000/init.S
delete mode 100644 board/amirix/ap1000/pci.c
delete mode 100644 board/amirix/ap1000/powerspan.c
delete mode 100644 board/amirix/ap1000/powerspan.h
delete mode 100644 board/amirix/ap1000/serial.c
delete mode 100644 board/amirix/ap1000/u-boot.lds
delete mode 100644 include/configs/AP1000.h
diff --git a/arch/powerpc/cpu/ppc4xx/speed.c b/arch/powerpc/cpu/ppc4xx/speed.c
index 6156ac9..45ef035 100644
--- a/arch/powerpc/cpu/ppc4xx/speed.c
+++ b/arch/powerpc/cpu/ppc4xx/speed.c
@@ -812,14 +812,6 @@ unsigned long determine_pci_clock_per(void)
extern void get_sys_info (sys_info_t * sysInfo);
extern ulong get_PCI_freq (void);
-#elif defined(CONFIG_AP1000)
-void get_sys_info (sys_info_t * sysInfo)
-{
- sysInfo->freqProcessor = 240 * 1000 * 1000;
- sysInfo->freqPLB = 80 * 1000 * 1000;
- sysInfo->freqPCI = 33 * 1000 * 1000;
-}
-
#elif defined(CONFIG_405)
void get_sys_info (sys_info_t * sysInfo)
diff --git a/arch/powerpc/include/asm/ppc4xx.h b/arch/powerpc/include/asm/ppc4xx.h
index 55eb4d6..9f2a08b 100644
--- a/arch/powerpc/include/asm/ppc4xx.h
+++ b/arch/powerpc/include/asm/ppc4xx.h
@@ -84,13 +84,6 @@
#endif
/*
- * Configure which SDRAM/DDR/DDR2 controller is equipped
- */
-#if defined(CONFIG_AP1000)
-#define CONFIG_SDRAM_PPC4xx_IBM_SDRAM /* IBM SDRAM controller */
-#endif
-
-/*
* Common registers for all SoC's
*/
/* DCR registers */
diff --git a/board/amirix/ap1000/Makefile b/board/amirix/ap1000/Makefile
deleted file mode 100644
index 3a22ce6..0000000
--- a/board/amirix/ap1000/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o serial.o pci.o powerspan.o
-SOBJS = init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-all: $(LIB) $(SOBJS)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $^)
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
diff --git a/board/amirix/ap1000/ap1000.c b/board/amirix/ap1000/ap1000.c
deleted file mode 100644
index 64de04c..0000000
--- a/board/amirix/ap1000/ap1000.c
+++ /dev/null
@@ -1,709 +0,0 @@
-/*
- * amirix.c: ppcboot platform support for AMIRIX board
- *
- * Copyright 2002 Mind NV
- * Copyright 2003 AMIRIX Systems Inc.
- *
- * http://www.mind.be/
- * http://www.amirix.com/
- *
- * Author : Peter De Schrijver (p2 at mind.be)
- * Frank Smith (smith at amirix.com)
- *
- * Derived from : Other platform support files in this tree, ml2
- *
- * This software may be used and distributed according to the terms of
- * the GNU General Public License (GPL) version 2, incorporated herein by
- * reference. Drivers based on or derived from this code fall under the GPL
- * and must retain the authorship, copyright and this license notice. This
- * file is not a complete program and may only be used when the entire
- * program is licensed under the GPL.
- *
- */
-
-#include <common.h>
-#include <command.h>
-#include <netdev.h>
-#include <asm/processor.h>
-
-#include "powerspan.h"
-#include "ap1000.h"
-
-int board_pre_init (void)
-{
- return 0;
-}
-
-/** serial number and platform display at startup */
-int checkboard (void)
-{
- char buf[64];
- int l = getenv_f("serial#", buf, sizeof(buf));
-
- /* After a loadace command, the SystemAce control register is left in a wonky state. */
- /* this code did not work in board_pre_init */
- unsigned char *p = (unsigned char *) AP1000_SYSACE_REGBASE;
-
- p[SYSACE_CTRLREG0] = 0x0;
-
- /* add platform and device to banner */
- switch (get_device ()) {
- case AP1xx_AP107_TARGET:
- puts (AP1xx_AP107_TARGET_STR);
- break;
- case AP1xx_AP120_TARGET:
- puts (AP1xx_AP120_TARGET_STR);
- break;
- case AP1xx_AP130_TARGET:
- puts (AP1xx_AP130_TARGET_STR);
- break;
- case AP1xx_AP1070_TARGET:
- puts (AP1xx_AP1070_TARGET_STR);
- break;
- case AP1xx_AP1100_TARGET:
- puts (AP1xx_AP1100_TARGET_STR);
- break;
- default:
- puts (AP1xx_UNKNOWN_STR);
- break;
- }
- puts (AP1xx_TARGET_STR);
- puts (" with ");
-
- switch (get_platform ()) {
- case AP100_BASELINE_PLATFORM:
- case AP1000_BASELINE_PLATFORM:
- puts (AP1xx_BASELINE_PLATFORM_STR);
- break;
- case AP1xx_QUADGE_PLATFORM:
- puts (AP1xx_QUADGE_PLATFORM_STR);
- break;
- case AP1xx_MGT_REF_PLATFORM:
- puts (AP1xx_MGT_REF_PLATFORM_STR);
- break;
- case AP1xx_STANDARD_PLATFORM:
- puts (AP1xx_STANDARD_PLATFORM_STR);
- break;
- case AP1xx_DUAL_PLATFORM:
- puts (AP1xx_DUAL_PLATFORM_STR);
- break;
- case AP1xx_BASE_SRAM_PLATFORM:
- puts (AP1xx_BASE_SRAM_PLATFORM_STR);
- break;
- case AP1xx_PCI_PCB_TESTPLATFORM:
- case AP1000_PCI_PCB_TESTPLATFORM:
- puts (AP1xx_PCI_PCB_TESTPLATFORM_STR);
- break;
- case AP1xx_DUAL_GE_MEZZ_TESTPLATFORM:
- puts (AP1xx_DUAL_GE_MEZZ_TESTPLATFORM_STR);
- break;
- case AP1xx_SFP_MEZZ_TESTPLATFORM:
- puts (AP1xx_SFP_MEZZ_TESTPLATFORM_STR);
- break;
- default:
- puts (AP1xx_UNKNOWN_STR);
- break;
- }
-
- if ((get_platform () & AP1xx_TESTPLATFORM_MASK) != 0) {
- puts (AP1xx_TESTPLATFORM_STR);
- } else {
- puts (AP1xx_PLATFORM_STR);
- }
-
- putc ('\n');
-
- puts ("Serial#: ");
-
- if (l < 0) {
- printf ("### No HW ID - assuming AMIRIX");
- } else {
- int i;
-
- for (i = 0; i < l; ++i) {
- if (buf[i] == ' ') {
- buf[i] = '\0';
- break;
- }
- }
-
- puts(buf);
- }
-
- putc ('\n');
-
- return (0);
-}
-
-
-phys_size_t initdram (int board_type)
-{
- char buf[64];
- int i = getenv_f("dramsize", buf, sizeof(buf));
-
- if (i > 0) {
- char *s = buf;
- if ((s[0] == '0') && ((s[1] == 'x') || (s[1] == 'X'))) {
- s += 2;
- }
- return (long int)simple_strtoul (s, NULL, 16);
- } else {
- /* give all 64 MB */
- return 64 * 1024 * 1024;
- }
-}
-
-unsigned int get_platform (void)
-{
- unsigned int *revision_reg_ptr = (unsigned int *) AP1xx_FPGA_REV_ADDR;
-
- return (*revision_reg_ptr & AP1xx_PLATFORM_MASK);
-}
-
-unsigned int get_device (void)
-{
- unsigned int *revision_reg_ptr = (unsigned int *) AP1xx_FPGA_REV_ADDR;
-
- return (*revision_reg_ptr & AP1xx_TARGET_MASK);
-}
-
-#if 0 /* loadace is not working; it appears to be a hardware issue with the system ace. */
-/*
- This function loads FPGA configurations from the SystemACE CompactFlash
-*/
-int do_loadace (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
-{
- unsigned char *p = (unsigned char *) AP1000_SYSACE_REGBASE;
- int cfg;
-
- if ((p[SYSACE_STATREG0] & 0x10) == 0) {
- p[SYSACE_CTRLREG0] = 0x80;
- printf ("\nNo CompactFlash Detected\n\n");
- p[SYSACE_CTRLREG0] = 0x00;
- return 1;
- }
-
- /* reset configuration controller: | 0x80 */
- /* select cpflash & ~0x40 */
- /* cfg start | 0x20 */
- /* wait for cfgstart & ~0x10 */
- /* force cfgmode: | 0x08 */
- /* do no force cfgaddr: & ~0x04 */
- /* clear mpulock: & ~0x02 */
- /* do not force lock request & ~0x01 */
-
- p[SYSACE_CTRLREG0] = 0x80 | 0x20 | 0x08;
- p[SYSACE_CTRLREG1] = 0x00;
-
- /* force config address if arg2 exists */
- if (argc == 2) {
- cfg = simple_strtoul (argv[1], NULL, 10);
-
- if (cfg > 7) {
- printf ("\nInvalid Configuration\n\n");
- p[SYSACE_CTRLREG0] = 0x00;
- return 1;
- }
- /* Set config address */
- p[SYSACE_CTRLREG1] = (cfg << 5);
- /* force cfgaddr */
- p[SYSACE_CTRLREG0] |= 0x04;
-
- } else {
- cfg = (p[SYSACE_STATREG1] & 0xE0) >> 5;
- }
-
- /* release configuration controller */
- printf ("\nLoading V2PRO with config %d...\n", cfg);
- p[SYSACE_CTRLREG0] &= ~0x80;
-
-
- while ((p[SYSACE_STATREG1] & 0x01) == 0) {
-
- if (p[SYSACE_ERRREG0] & 0x80) {
- /* attempting to load an invalid configuration makes the cpflash */
- /* appear to be removed. Reset here to avoid that problem */
- p[SYSACE_CTRLREG0] = 0x80;
- printf ("\nConfiguration %d Read Error\n\n", cfg);
- p[SYSACE_CTRLREG0] = 0x00;
- return 1;
- }
- }
-
- p[SYSACE_CTRLREG0] |= 0x20;
-
- return 0;
-}
-#endif
-
-/** Console command to display and set the software reconfigure byte
- * <pre>
- * swconfig - display the current value of the software reconfigure byte
- * swconfig [#] - change the software reconfigure byte to #
- * </pre>
- * @param *cmdtp [IN] as passed by run_command (ignored)
- * @param flag [IN] as passed by run_command (ignored)
- * @param argc [IN] as passed by run_command if 1, display, if 2 change
- * @param *argv[] [IN] contains the parameters to use
- * @return
- * <pre>
- * 0 if passed
- * -1 if failed
- * </pre>
- */
-int do_swconfigbyte (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
-{
- unsigned char *sector_buffer = NULL;
- unsigned char input_char;
- int write_result;
- unsigned int input_uint;
-
- /* display value if no argument */
- if (argc < 2) {
- printf ("Software configuration byte is currently: 0x%02x\n",
- *((unsigned char *) (SW_BYTE_SECTOR_ADDR +
- SW_BYTE_SECTOR_OFFSET)));
- return 0;
- } else if (argc > 3) {
- printf ("Too many arguments\n");
- return -1;
- }
-
- /* if 3 arguments, 3rd argument is the address to use */
- if (argc == 3) {
- input_uint = simple_strtoul (argv[1], NULL, 16);
- sector_buffer = (unsigned char *) input_uint;
- } else {
- sector_buffer = (unsigned char *) DEFAULT_TEMP_ADDR;
- }
-
- input_char = simple_strtoul (argv[1], NULL, 0);
- if ((input_char & ~SW_BYTE_MASK) != 0) {
- printf ("Input of 0x%02x will be masked to 0x%02x\n",
- input_char, (input_char & SW_BYTE_MASK));
- input_char = input_char & SW_BYTE_MASK;
- }
-
- memcpy (sector_buffer, (void *) SW_BYTE_SECTOR_ADDR,
- SW_BYTE_SECTOR_SIZE);
- sector_buffer[SW_BYTE_SECTOR_OFFSET] = input_char;
-
-
- printf ("Erasing Flash...");
- if (flash_sect_erase
- (SW_BYTE_SECTOR_ADDR,
- (SW_BYTE_SECTOR_ADDR + SW_BYTE_SECTOR_OFFSET))) {
- return -1;
- }
-
- printf ("Writing to Flash... ");
- write_result =
- flash_write ((char *)sector_buffer, SW_BYTE_SECTOR_ADDR,
- SW_BYTE_SECTOR_SIZE);
- if (write_result != 0) {
- flash_perror (write_result);
- return -1;
- } else {
- printf ("done\n");
- printf ("Software configuration byte is now: 0x%02x\n",
- *((unsigned char *) (SW_BYTE_SECTOR_ADDR +
- SW_BYTE_SECTOR_OFFSET)));
- }
-
- return 0;
-}
-
-#define ONE_SECOND 1000000
-
-int do_pause (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
-{
- int pause_time;
- unsigned int delay_time;
- int break_loop = 0;
-
- /* display value if no argument */
- if (argc < 2) {
- pause_time = 1;
- }
-
- else if (argc > 2) {
- printf ("Too many arguments\n");
- return -1;
- } else {
- pause_time = simple_strtoul (argv[1], NULL, 0);
- }
-
- printf ("Pausing with a poll time of %d, press any key to reactivate\n", pause_time);
- delay_time = pause_time * ONE_SECOND;
- while (break_loop == 0) {
- udelay (delay_time);
- if (serial_tstc () != 0) {
- break_loop = 1;
- /* eat user key presses */
- while (serial_tstc () != 0) {
- serial_getc ();
- }
- }
- }
-
- return 0;
-}
-
-int do_swreconfig (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
-{
- printf ("Triggering software reconfigure (software config byte is 0x%02x)...\n",
- *((unsigned char *) (SW_BYTE_SECTOR_ADDR + SW_BYTE_SECTOR_OFFSET)));
- udelay (1000);
- *((unsigned char *) AP1000_CPLD_BASE) = 1;
-
- return 0;
-}
-
-#define GET_DECIMAL(low_byte) ((low_byte >> 5) * 125)
-#define TEMP_BUSY_BIT 0x80
-#define TEMP_LHIGH_BIT 0x40
-#define TEMP_LLOW_BIT 0x20
-#define TEMP_EHIGH_BIT 0x10
-#define TEMP_ELOW_BIT 0x08
-#define TEMP_OPEN_BIT 0x04
-#define TEMP_ETHERM_BIT 0x02
-#define TEMP_LTHERM_BIT 0x01
-
-int do_temp_sensor (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
-{
- char cmd;
- int ret_val = 0;
- unsigned char temp_byte;
- int temp;
- int temp_low;
- int low;
- int low_low;
- int high;
- int high_low;
- int therm;
- unsigned char user_data[4] = { 0 };
- int user_data_count = 0;
- int ii;
-
- if (argc > 1) {
- cmd = argv[1][0];
- } else {
- cmd = 's'; /* default to status */
- }
-
- user_data_count = argc - 2;
- for (ii = 0; ii < user_data_count; ii++) {
- user_data[ii] = simple_strtoul (argv[2 + ii], NULL, 0);
- }
- switch (cmd) {
- case 's':
- if (I2CAccess
- (0x2, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &temp_byte, I2C_READ) != 0) {
- goto fail;
- }
- printf ("Status : 0x%02x ", temp_byte);
- if (temp_byte & TEMP_BUSY_BIT)
- printf ("BUSY ");
-
- if (temp_byte & TEMP_LHIGH_BIT)
- printf ("LHIGH ");
-
- if (temp_byte & TEMP_LLOW_BIT)
- printf ("LLOW ");
-
- if (temp_byte & TEMP_EHIGH_BIT)
- printf ("EHIGH ");
-
- if (temp_byte & TEMP_ELOW_BIT)
- printf ("ELOW ");
-
- if (temp_byte & TEMP_OPEN_BIT)
- printf ("OPEN ");
-
- if (temp_byte & TEMP_ETHERM_BIT)
- printf ("ETHERM ");
-
- if (temp_byte & TEMP_LTHERM_BIT)
- printf ("LTHERM");
-
- printf ("\n");
-
- if (I2CAccess
- (0x3, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &temp_byte, I2C_READ) != 0) {
- goto fail;
- }
- printf ("Config : 0x%02x ", temp_byte);
-
- if (I2CAccess
- (0x4, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &temp_byte, I2C_READ) != 0) {
- printf ("\n");
- goto fail;
- }
- printf ("Conversion: 0x%02x\n", temp_byte);
- if (I2CAccess
- (0x22, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &temp_byte, I2C_READ) != 0) {
- goto fail;
- }
- printf ("Cons Alert: 0x%02x ", temp_byte);
-
- if (I2CAccess
- (0x21, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &temp_byte, I2C_READ) != 0) {
- printf ("\n");
- goto fail;
- }
- printf ("Therm Hyst: %d\n", temp_byte);
-
- if (I2CAccess
- (0x0, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &temp_byte, I2C_READ) != 0) {
- goto fail;
- }
- temp = temp_byte;
- if (I2CAccess
- (0x6, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &temp_byte, I2C_READ) != 0) {
- goto fail;
- }
- low = temp_byte;
- if (I2CAccess
- (0x5, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &temp_byte, I2C_READ) != 0) {
- goto fail;
- }
- high = temp_byte;
- if (I2CAccess
- (0x20, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &temp_byte, I2C_READ) != 0) {
- goto fail;
- }
- therm = temp_byte;
- printf ("Local Temp: %2d Low: %2d High: %2d THERM: %2d\n", temp, low, high, therm);
-
- if (I2CAccess
- (0x1, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &temp_byte, I2C_READ) != 0) {
- goto fail;
- }
- temp = temp_byte;
- if (I2CAccess
- (0x10, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &temp_byte, I2C_READ) != 0) {
- goto fail;
- }
- temp_low = temp_byte;
- if (I2CAccess
- (0x8, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &temp_byte, I2C_READ) != 0) {
- goto fail;
- }
- low = temp_byte;
- if (I2CAccess
- (0x14, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &temp_byte, I2C_READ) != 0) {
- goto fail;
- }
- low_low = temp_byte;
- if (I2CAccess
- (0x7, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &temp_byte, I2C_READ) != 0) {
- goto fail;
- }
- high = temp_byte;
- if (I2CAccess
- (0x13, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &temp_byte, I2C_READ) != 0) {
- goto fail;
- }
- high_low = temp_byte;
- if (I2CAccess
- (0x19, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &temp_byte, I2C_READ) != 0) {
- goto fail;
- }
- therm = temp_byte;
- if (I2CAccess
- (0x11, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &temp_byte, I2C_READ) != 0) {
- goto fail;
- }
- printf ("Ext Temp : %2d.%03d Low: %2d.%03d High: %2d.%03d THERM: %2d Offset: %2d\n", temp, GET_DECIMAL (temp_low), low, GET_DECIMAL (low_low), high, GET_DECIMAL (high_low), therm, temp_byte);
- break;
- case 'l': /* alter local limits : low, high, therm */
- if (argc < 3) {
- goto usage;
- }
-
- /* low */
- if (I2CAccess
- (0xC, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &user_data[0], I2C_WRITE) != 0) {
- goto fail;
- }
-
- if (user_data_count > 1) {
- /* high */
- if (I2CAccess
- (0xB, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &user_data[1], I2C_WRITE) != 0) {
- goto fail;
- }
- }
-
- if (user_data_count > 2) {
- /* therm */
- if (I2CAccess
- (0x20, I2C_SENSOR_DEV,
- I2C_SENSOR_CHIP_SEL, &user_data[2],
- I2C_WRITE) != 0) {
- goto fail;
- }
- }
- break;
- case 'e': /* alter external limits: low, high, therm, offset */
- if (argc < 3) {
- goto usage;
- }
-
- /* low */
- if (I2CAccess
- (0xE, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &user_data[0], I2C_WRITE) != 0) {
- goto fail;
- }
-
- if (user_data_count > 1) {
- /* high */
- if (I2CAccess
- (0xD, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &user_data[1], I2C_WRITE) != 0) {
- goto fail;
- }
- }
-
- if (user_data_count > 2) {
- /* therm */
- if (I2CAccess
- (0x19, I2C_SENSOR_DEV,
- I2C_SENSOR_CHIP_SEL, &user_data[2],
- I2C_WRITE) != 0) {
- goto fail;
- }
- }
-
- if (user_data_count > 3) {
- /* offset */
- if (I2CAccess
- (0x11, I2C_SENSOR_DEV,
- I2C_SENSOR_CHIP_SEL, &user_data[3],
- I2C_WRITE) != 0) {
- goto fail;
- }
- }
- break;
- case 'c': /* alter config settings: config, conv, cons alert, therm hyst */
- if (argc < 3) {
- goto usage;
- }
-
- /* config */
- if (I2CAccess
- (0x9, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &user_data[0], I2C_WRITE) != 0) {
- goto fail;
- }
-
- if (user_data_count > 1) {
- /* conversion */
- if (I2CAccess
- (0xA, I2C_SENSOR_DEV, I2C_SENSOR_CHIP_SEL,
- &user_data[1], I2C_WRITE) != 0) {
- goto fail;
- }
- }
-
- if (user_data_count > 2) {
- /* cons alert */
- if (I2CAccess
- (0x22, I2C_SENSOR_DEV,
- I2C_SENSOR_CHIP_SEL, &user_data[2],
- I2C_WRITE) != 0) {
- goto fail;
- }
- }
-
- if (user_data_count > 3) {
- /* therm hyst */
- if (I2CAccess
- (0x21, I2C_SENSOR_DEV,
- I2C_SENSOR_CHIP_SEL, &user_data[3],
- I2C_WRITE) != 0) {
- goto fail;
- }
- }
- break;
- default:
- goto usage;
- }
-
- goto done;
-fail:
- printf ("Access to sensor failed\n");
- ret_val = -1;
- goto done;
-usage:
- printf ("Usage:\n%s\n", cmdtp->help);
-
-done:
- return ret_val;
-}
-
-U_BOOT_CMD (temp, 6, 0, do_temp_sensor,
- "interact with the temperature sensor",
- "temp [s]\n"
- " - Show status.\n"
- "temp l LOW [HIGH] [THERM]\n"
- " - Set local limits.\n"
- "temp e LOW [HIGH] [THERM] [OFFSET]\n"
- " - Set external limits.\n"
- "temp c CONFIG [CONVERSION] [CONS. ALERT] [THERM HYST]\n"
- " - Set config options.\n"
- "\n"
- "All values can be decimal or hex (hex preceded with 0x).\n"
- "Only whole numbers are supported for external limits.");
-
-#if 0
-U_BOOT_CMD (loadace, 2, 0, do_loadace,
- "load fpga configuration from System ACE compact flash",
- "N\n"
- " - Load configuration N (0-7) from System ACE compact flash\n"
- "loadace\n" " - loads default configuration");
-#endif
-
-U_BOOT_CMD (swconfig, 2, 0, do_swconfigbyte,
- "display or modify the software configuration byte",
- "N [ADDRESS]\n"
- " - set software configuration byte to N, optionally use ADDRESS as\n"
- " location of buffer for flash copy\n"
- "swconfig\n" " - display software configuration byte");
-
-U_BOOT_CMD (pause, 2, 0, do_pause,
- "sleep processor until any key is pressed with poll time of N seconds",
- "N\n"
- " - sleep processor until any key is pressed with poll time of N seconds\n"
- "pause\n"
- " - sleep processor until any key is pressed with poll time of 1 second");
-
-U_BOOT_CMD (swrecon, 1, 0, do_swreconfig,
- "trigger a board reconfigure to the software selected configuration",
- "\n"
- " - trigger a board reconfigure to the software selected configuration");
-
-int board_eth_init(bd_t *bis)
-{
- return pci_eth_init(bis);
-}
diff --git a/board/amirix/ap1000/ap1000.h b/board/amirix/ap1000/ap1000.h
deleted file mode 100644
index 118c4d1..0000000
--- a/board/amirix/ap1000/ap1000.h
+++ /dev/null
@@ -1,173 +0,0 @@
-/*
- * ap1000.h: AP1000 (e.g. AP1070, AP1100) board specific definitions and functions that are needed globally
- *
- * Author : James MacAulay
- *
- * This software may be used and distributed according to the terms of
- * the GNU General Public License (GPL) version 2, incorporated herein by
- * reference. Drivers based on or derived from this code fall under the GPL
- * and must retain the authorship, copyright and this license notice. This
- * file is not a complete program and may only be used when the entire
- * program is licensed under the GPL.
- *
- */
-
-#ifndef __AP1000_H
-#define __AP1000_H
-
-/*
- * Revision Register stuff
- */
-#define AP1xx_FPGA_REV_ADDR 0x29000000
-
-#define AP1xx_PLATFORM_MASK 0xFF000000
-#define AP100_BASELINE_PLATFORM 0x01000000
-#define AP1xx_QUADGE_PLATFORM 0x02000000
-#define AP1xx_MGT_REF_PLATFORM 0x03000000
-#define AP1xx_STANDARD_PLATFORM 0x04000000
-#define AP1xx_DUAL_PLATFORM 0x05000000
-#define AP1xx_BASE_SRAM_PLATFORM 0x06000000
-
-#define AP1000_BASELINE_PLATFORM 0x21000000
-
-#define AP1xx_TESTPLATFORM_MASK 0xC0000000
-#define AP1xx_PCI_PCB_TESTPLATFORM 0xC0000000
-#define AP1xx_DUAL_GE_MEZZ_TESTPLATFORM 0xC1000000
-#define AP1xx_SFP_MEZZ_TESTPLATFORM 0xC2000000
-
-#define AP1000_PCI_PCB_TESTPLATFORM 0xC3000000
-
-#define AP1xx_TARGET_MASK 0x00FF0000
-#define AP1xx_AP107_TARGET 0x00010000
-#define AP1xx_AP120_TARGET 0x00020000
-#define AP1xx_AP130_TARGET 0x00030000
-#define AP1xx_AP1070_TARGET 0x00040000
-#define AP1xx_AP1100_TARGET 0x00050000
-
-#define AP1xx_UNKNOWN_STR "Unknown"
-
-#define AP1xx_PLATFORM_STR " Platform"
-#define AP1xx_BASELINE_PLATFORM_STR "Baseline"
-#define AP1xx_QUADGE_PLATFORM_STR "Quad GE"
-#define AP1xx_MGT_REF_PLATFORM_STR "MGT Reference"
-#define AP1xx_STANDARD_PLATFORM_STR "Standard"
-#define AP1xx_DUAL_PLATFORM_STR "Dual"
-#define AP1xx_BASE_SRAM_PLATFORM_STR "Baseline with SRAM"
-
-#define AP1xx_TESTPLATFORM_STR " Test Platform"
-#define AP1xx_PCI_PCB_TESTPLATFORM_STR "Base"
-#define AP1xx_DUAL_GE_MEZZ_TESTPLATFORM_STR "Dual GE Mezzanine"
-#define AP1xx_SFP_MEZZ_TESTPLATFORM_STR "SFP Mezzanine"
-
-#define AP1xx_TARGET_STR " Board"
-#define AP1xx_AP107_TARGET_STR "AP107"
-#define AP1xx_AP120_TARGET_STR "AP120"
-#define AP1xx_AP130_TARGET_STR "AP130"
-
-#define AP1xx_AP1070_TARGET_STR "AP1070"
-#define AP1xx_AP1100_TARGET_STR "AP1100"
-
-/*
- * Flash Stuff
- */
-#define AP1xx_PROGRAM_FLASH_INDEX 0
-#define AP1xx_CONFIG_FLASH_INDEX 1
-
-/*
- * System Ace Stuff
- */
-#define AP1000_SYSACE_REGBASE 0x28000000
-
-#define SYSACE_STATREG0 0x04 /* 7:0 */
-#define SYSACE_STATREG1 0x05 /* 15:8 */
-#define SYSACE_STATREG2 0x06 /* 23:16 */
-#define SYSACE_STATREG3 0x07 /* 31:24 */
-
-#define SYSACE_ERRREG0 0x08 /* 7:0 */
-#define SYSACE_ERRREG1 0x09 /* 15:8 */
-#define SYSACE_ERRREG2 0x0a /* 23:16 */
-#define SYSACE_ERRREG3 0x0b /* 31:24 */
-
-#define SYSACE_CTRLREG0 0x18 /* 7:0 */
-#define SYSACE_CTRLREG1 0x19 /* 15:8 */
-#define SYSACE_CTRLREG2 0x1A /* 23:16 */
-#define SYSACE_CTRLREG3 0x1B /* 31:24 */
-
-/*
- * Software reconfig thing
- */
-#define SW_BYTE_SECTOR_ADDR 0x24FE0000
-#define SW_BYTE_SECTOR_OFFSET 0x0001FFFF
-#define SW_BYTE_SECTOR_SIZE 0x00020000
-#define SW_BYTE_MASK 0x00000003
-
-#define DEFAULT_TEMP_ADDR 0x00100000
-
-#define AP1000_CPLD_BASE 0x26000000
-
-/* PowerSpan II Stuff */
-#define PSII_SYNC() asm("eieio")
-#define PSPAN_BASEADDR 0x30000000
-#define EEPROM_DEFAULT { 0x01, /* Byte 0 - Long Load = 0x02, short = 01, use 0xff for try no load */ \
- 0x0,0x0,0x0, /* Bytes 1 - 3 Power span reserved */ \
- 0x0, /* Byte 4 - Powerspan reserved - start of short load */ \
- 0x0F, /* Byte 5 - Enable PCI 1 & 2 as Bus masters and Memory targets. */ \
- 0x0E, /* Byte 6 - PCI 1 Target image prefetch - on for image 0,1,2, off for i20 & 3. */ \
- 0x00, 0x00, /* Byte 7,8 - PCI-1 Subsystem ID - */ \
- 0x00, 0x00, /* Byte 9,10 - PCI-1 Subsystem Vendor Id - */ \
- 0x00, /* Byte 11 - No PCI interrupt generation on PCI-1 PCI-2 int A */ \
- 0x1F, /* Byte 12 - PCI-1 enable bridge registers, all target images */ \
- 0xBA, /* Byte 13 - Target 0 image 128 Meg(Ram), Target 1 image 64 Meg. (config Flash/CPLD )*/ \
- 0xA0, /* Byte 14 - Target 2 image 64 Meg(program Flash), target 3 64k. */ \
- 0x00, /* Byte 15 - Vital Product Data Disabled. */ \
- 0x88, /* Byte 16 - PCI arbiter config complete, all requests routed through PCI-1, Unlock PCI-1 */ \
- 0x40, /* Byte 17 - Interrupt direction control - PCI-1 Int A out, everything else in. */ \
- 0x00, /* Byte 18 - I2O disabled */ \
- 0x00, /* Byte 19 - PCI-2 Target image prefetch - off for all images. */ \
- 0x00,0x00, /* Bytes 20,21 - PCI 2 Subsystem Id */ \
- 0x00,0x00, /* Bytes 22,23 - PCI 2 Subsystem Vendor id */ \
- 0x0C, /* Byte 24 - PCI-2 BAR enables, target image 0, & 1 */ \
- 0xBB, /* Byte 25 - PCI-2 target 0 - 128 Meg(Ram), target 1 - 128 Meg (program/config flash) */ \
- 0x00, /* Byte 26 - PCI-2 target 2 & 3 unused. */ \
- 0x00,0x00,0x00,0x00,0x00, /* Bytes 27,28,29,30, 31 - Reserved */ \
- /* Long Load Information */ \
- 0x82,0x60, /* Bytes 32,33 - PCI-1 Device ID - Powerspan II */ \
- 0x10,0xE3, /* Bytes 24,35 - PCI-1 Vendor ID - Tundra */ \
- 0x06, /* Byte 36 - PCI-1 Class Base - Bridge device. */ \
- 0x80, /* Byte 37 - PCI-1 Class sub class - Other bridge. */ \
- 0x00, /* Byte 38 - PCI-1 Class programing interface - Other bridge */ \
- 0x01, /* Byte 39 - Power span revision 1. */ \
- 0x6E, /* Byte 40 - PB SI0 enabled, translation enabled, decode enabled, 64 Meg */ \
- 0x40, /* Byte 41 - PB SI0 memory command mode, PCI-1 dest */ \
- 0x22, /* Byte 42 - Prefetch discard after read, PCI-little endian conversion, 32 byte prefetch */ \
- 0x00,0x00, /* Bytes 43, 44 - Translation address for SI0, set to zero for now. */ \
- 0x0E, /* Byte 45 - Translation address (0) and PB bus master enables - all. */ \
- 0x2c,00,00, /* Bytes 46,47,48 - PB SI0 processor base address - 0x2C000000 */ \
- 0x30,00,00, /* Bytes 49,50,51 - PB Address for Powerspan registers - 0x30000000, big Endian */ \
- 0x82,0x60, /* Bytes 52, 53 - PCI-2 Device ID - Powerspan II */ \
- 0x10,0xE3, /* Bytes 54,55 - PCI 2 Vendor Id - Tundra */ \
- 0x06, /* Byte 56 - PCI-2 Class Base - Bridge device */ \
- 0x80, /* Byte 57 - PCI-2 Class sub class - Other Bridge. */ \
- 0x00, /* Byte 58 - PCI-2 class programming interface - Other bridge */ \
- 0x01, /* Byte 59 - PCI-2 class revision 1 */ \
- 0x00,0x00,0x00,0x00 }; /* Bytes 60,61, 62, 63 - Powerspan reserved */
-
-
-#define EEPROM_LENGTH 64 /* Long Load */
-
-#define I2C_SENSOR_DEV 0x9
-#define I2C_SENSOR_CHIP_SEL 0x4
-
-/*
- * Board Functions
- */
-void set_eat_machine_checks(int a_flag);
-int get_eat_machine_checks(void);
-unsigned int get_platform(void);
-unsigned int get_device(void);
-void* memcpyb(void * dest,const void *src,size_t count);
-int process_bootflag(ulong bootflag);
-void user_led_on(void);
-void user_led_off(void);
-
-#endif /* __COMMON_H_ */
diff --git a/board/amirix/ap1000/flash.c b/board/amirix/ap1000/flash.c
deleted file mode 100644
index bf8877e..0000000
--- a/board/amirix/ap1000/flash.c
+++ /dev/null
@@ -1,900 +0,0 @@
-/**
- * @file flash.c
- */
-
-/*
- * (C) Copyright 2003
- * AMIRIX Systems Inc.
- *
- * Originated from ppcboot-2.0.0/board/esd/cpci440/strataflash.c
- *
- * (C) Copyright 2002
- * Brad Kemp, Seranoa Networks, Brad.Kemp at seranoa.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/processor.h>
-
-#undef DEBUG_FLASH
-/*
- * This file implements a Common Flash Interface (CFI) driver for ppcboot.
- * The width of the port and the width of the chips are determined at initialization.
- * These widths are used to calculate the address for access CFI data structures.
- * It has been tested on an Intel Strataflash implementation.
- *
- * References
- * JEDEC Standard JESD68 - Common Flash Interface (CFI)
- * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
- * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
- * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
- *
- * TODO
- * Use Primary Extended Query table (PRI) and Alternate Algorithm Query Table (ALT) to determine if protection is available
- * Add support for other command sets Use the PRI and ALT to determine command set
- * Verify erase and program timeouts.
- */
-
-#define FLASH_CMD_CFI 0x98
-#define FLASH_CMD_READ_ID 0x90
-#define FLASH_CMD_RESET 0xff
-#define FLASH_CMD_BLOCK_ERASE 0x20
-#define FLASH_CMD_ERASE_CONFIRM 0xD0
-#define FLASH_CMD_WRITE 0x40
-#define FLASH_CMD_PROTECT 0x60
-#define FLASH_CMD_PROTECT_SET 0x01
-#define FLASH_CMD_PROTECT_CLEAR 0xD0
-#define FLASH_CMD_CLEAR_STATUS 0x50
-#define FLASH_CMD_WRITE_TO_BUFFER 0xE8
-#define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
-
-#define FLASH_STATUS_DONE 0x80
-#define FLASH_STATUS_ESS 0x40
-#define FLASH_STATUS_ECLBS 0x20
-#define FLASH_STATUS_PSLBS 0x10
-#define FLASH_STATUS_VPENS 0x08
-#define FLASH_STATUS_PSS 0x04
-#define FLASH_STATUS_DPS 0x02
-#define FLASH_STATUS_R 0x01
-#define FLASH_STATUS_PROTECT 0x01
-
-#define FLASH_OFFSET_CFI 0x55
-#define FLASH_OFFSET_CFI_RESP 0x10
-#define FLASH_OFFSET_WTOUT 0x1F
-#define FLASH_OFFSET_WBTOUT 0x20
-#define FLASH_OFFSET_ETOUT 0x21
-#define FLASH_OFFSET_CETOUT 0x22
-#define FLASH_OFFSET_WMAX_TOUT 0x23
-#define FLASH_OFFSET_WBMAX_TOUT 0x24
-#define FLASH_OFFSET_EMAX_TOUT 0x25
-#define FLASH_OFFSET_CEMAX_TOUT 0x26
-#define FLASH_OFFSET_SIZE 0x27
-#define FLASH_OFFSET_INTERFACE 0x28
-#define FLASH_OFFSET_BUFFER_SIZE 0x2A
-#define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
-#define FLASH_OFFSET_ERASE_REGIONS 0x2D
-#define FLASH_OFFSET_PROTECT 0x02
-#define FLASH_OFFSET_USER_PROTECTION 0x85
-#define FLASH_OFFSET_INTEL_PROTECTION 0x81
-
-#define FLASH_MAN_CFI 0x01000000
-
-typedef union {
- unsigned char c;
- unsigned short w;
- unsigned long l;
-} cfiword_t;
-
-typedef union {
- unsigned char *cp;
- unsigned short *wp;
- unsigned long *lp;
-} cfiptr_t;
-
-#define NUM_ERASE_REGIONS 4
-
-flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-
-static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c);
-static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf);
-static void flash_write_cmd (flash_info_t * info, int sect, uchar offset,
- uchar cmd);
-static int flash_isequal (flash_info_t * info, int sect, uchar offset,
- uchar cmd);
-static int flash_isset (flash_info_t * info, int sect, uchar offset,
- uchar cmd);
-static int flash_detect_cfi (flash_info_t * info);
-static ulong flash_get_size (ulong base, int banknum);
-static int flash_write_cfiword (flash_info_t * info, ulong dest,
- cfiword_t cword);
-static int flash_full_status_check (flash_info_t * info, ulong sector,
- ulong tout, char *prompt);
-#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
-static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
- int len);
-#endif
-/*-----------------------------------------------------------------------
- * create an address based on the offset and the port width
- */
-uchar *flash_make_addr (flash_info_t * info, int sect, int offset)
-{
- return ((uchar *) (info->start[sect] + (offset * info->chipwidth)));
-}
-
-/*-----------------------------------------------------------------------
- * read a character at a port width address
- */
-uchar flash_read_uchar (flash_info_t * info, uchar offset)
-{
- if (info->portwidth == FLASH_CFI_8BIT) {
- volatile uchar *cp;
- uchar c;
-
- cp = flash_make_addr (info, 0, offset);
- c = *cp;
-#ifdef DEBUG_FLASH
- printf ("flash_read_uchar offset=%04x ptr=%08x c=%02x\n",
- offset, (unsigned int) cp, c);
-#endif
- return (c);
-
- } else if (info->portwidth == FLASH_CFI_16BIT) {
- volatile ushort *sp;
- ushort s;
- uchar c;
-
- sp = (ushort *) flash_make_addr (info, 0, offset);
- s = *sp;
- c = (uchar) s;
-#ifdef DEBUG_FLASH
- printf ("flash_read_uchar offset=%04x ptr=%08x s=%04x c=%02x\n", offset, (unsigned int) sp, s, c);
-#endif
- return (c);
-
- }
-
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * read a short word by swapping for ppc format.
- */
-ushort flash_read_ushort (flash_info_t * info, int sect, uchar offset)
-{
- if (info->portwidth == FLASH_CFI_8BIT) {
- volatile uchar *cp;
- uchar c0, c1;
- ushort s;
-
- cp = flash_make_addr (info, 0, offset);
- c1 = cp[2];
- c0 = cp[0];
- s = c1 << 8 | c0;
-#ifdef DEBUG_FLASH
- printf ("flash_read_ushort offset=%04x ptr=%08x c1=%02x c0=%02x s=%04x\n", offset, (unsigned int) cp, c1, c0, s);
-#endif
- return (s);
-
- } else if (info->portwidth == FLASH_CFI_16BIT) {
- volatile ushort *sp;
- ushort s;
- uchar c0, c1;
-
- sp = (ushort *) flash_make_addr (info, 0, offset);
- s = *sp;
- c1 = (uchar) sp[1];
- c0 = (uchar) sp[0];
- s = c1 << 8 | c0;
-#ifdef DEBUG_FLASH
- printf ("flash_read_ushort offset=%04x ptr=%08x c1=%02x c0=%02x s=%04x\n", offset, (unsigned int) sp, c1, c0, s);
-#endif
- return (s);
-
- }
-
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * read a long word by picking the least significant byte of each maiximum
- * port size word. Swap for ppc format.
- */
-ulong flash_read_long (flash_info_t * info, int sect, uchar offset)
-{
- if (info->portwidth == FLASH_CFI_8BIT) {
- volatile uchar *cp;
- uchar c0, c1, c2, c3;
- ulong l;
-
- cp = flash_make_addr (info, 0, offset);
- c3 = cp[6];
- c2 = cp[4];
- c1 = cp[2];
- c0 = cp[0];
- l = c3 << 24 | c2 << 16 | c1 << 8 | c0;
-#ifdef DEBUG_FLASH
- printf ("flash_read_long offset=%04x ptr=%08x c3=%02x c2=%02x c1=%02x c0=%02x l=%08x\n", offset, (unsigned int) cp, c3, c2, c1, c0, l);
-#endif
- return (l);
-
- } else if (info->portwidth == FLASH_CFI_16BIT) {
- volatile ushort *sp;
- uchar c0, c1, c2, c3;
- ulong l;
-
- sp = (ushort *) flash_make_addr (info, 0, offset);
- c3 = (uchar) sp[3];
- c2 = (uchar) sp[2];
- c1 = (uchar) sp[1];
- c0 = (uchar) sp[0];
- l = c3 << 24 | c2 << 16 | c1 << 8 | c0;
-#ifdef DEBUG_FLASH
- printf ("flash_read_long offset=%04x ptr=%08x c3=%02x c2=%02x c1=%02x c0=%02x l=%08x\n", offset, (unsigned int) sp, c3, c2, c1, c0, l);
-#endif
- return (l);
-
- }
-
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- */
-unsigned long flash_init (void)
-{
- unsigned long size;
-
- size = 0;
-
- flash_info[0].flash_id = FLASH_UNKNOWN;
- flash_info[0].portwidth = FLASH_CFI_16BIT;
- flash_info[0].chipwidth = FLASH_CFI_16BIT;
- size += flash_info[0].size = flash_get_size (CONFIG_SYS_PROGFLASH_BASE, 0);
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n", 1, flash_info[0].size, flash_info[0].size << 20);
- };
-
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[1].portwidth = FLASH_CFI_8BIT;
- flash_info[1].chipwidth = FLASH_CFI_16BIT;
- size += flash_info[1].size = flash_get_size (CONFIG_SYS_CONFFLASH_BASE, 1);
- if (flash_info[1].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n", 2, flash_info[1].size, flash_info[1].size << 20);
- };
-
- return (size);
-}
-
-/*-----------------------------------------------------------------------
- */
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- int rcode = 0;
- int prot;
- int sect;
-
- if (info->flash_id != FLASH_MAN_CFI) {
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
- if ((s_first < 0) || (s_first > s_last)) {
- printf ("- no sectors to erase\n");
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n", prot);
- } else {
- printf ("\n");
- }
-
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- flash_write_cmd (info, sect, 0,
- FLASH_CMD_CLEAR_STATUS);
- flash_write_cmd (info, sect, 0,
- FLASH_CMD_BLOCK_ERASE);
- flash_write_cmd (info, sect, 0,
- FLASH_CMD_ERASE_CONFIRM);
-
- if (flash_full_status_check
- (info, sect, info->erase_blk_tout, "erase")) {
- rcode = 1;
- } else
- printf (".");
- }
- }
- printf (" done\n");
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- if (info->flash_id != FLASH_MAN_CFI) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- printf ("CFI conformant FLASH (x%d device in x%d mode)",
- (info->chipwidth << 3), (info->portwidth << 3));
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
- printf (" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n", info->erase_blk_tout, info->write_tout, info->buffer_write_tout, info->buffer_size);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n");
- printf (" %08lX%5s",
- info->start[i], info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong wp;
- ulong cp;
- int aln;
- cfiword_t cword;
- int i, rc;
-
- /* get lower aligned address */
- wp = (addr & ~(info->portwidth - 1));
-
- /* handle unaligned start */
- if ((aln = addr - wp) != 0) {
- cword.l = 0;
- cp = wp;
- for (i = 0; i < aln; ++i, ++cp)
- flash_add_byte (info, &cword, (*(uchar *) cp));
-
- for (; (i < info->portwidth) && (cnt > 0); i++) {
- flash_add_byte (info, &cword, *src++);
- cnt--;
- cp++;
- }
- for (; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
- flash_add_byte (info, &cword, (*(uchar *) cp));
- if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
- return rc;
- wp = cp;
- }
-#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
- while (cnt >= info->portwidth) {
- i = info->buffer_size > cnt ? cnt : info->buffer_size;
- if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
- return rc;
- wp += i;
- src += i;
- cnt -= i;
- }
-#else
- /* handle the aligned part */
- while (cnt >= info->portwidth) {
- cword.l = 0;
- for (i = 0; i < info->portwidth; i++) {
- flash_add_byte (info, &cword, *src++);
- }
- if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
- return rc;
- wp += info->portwidth;
- cnt -= info->portwidth;
- }
-#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- cword.l = 0;
- for (i = 0, cp = wp; (i < info->portwidth) && (cnt > 0); ++i, ++cp) {
- flash_add_byte (info, &cword, *src++);
- --cnt;
- }
- for (; i < info->portwidth; ++i, ++cp) {
- flash_add_byte (info, &cword, (*(uchar *) cp));
- }
-
- return flash_write_cfiword (info, wp, cword);
-}
-
-/*-----------------------------------------------------------------------
- */
-int flash_real_protect (flash_info_t * info, long sector, int prot)
-{
- int retcode = 0;
-
- flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
- flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
- if (prot)
- flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
- else
- flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
-
- if ((retcode =
- flash_full_status_check (info, sector, info->erase_blk_tout,
- prot ? "protect" : "unprotect")) == 0) {
-
- info->protect[sector] = prot;
- /* Intel's unprotect unprotects all locking */
- if (prot == 0) {
- int i;
-
- for (i = 0; i < info->sector_count; i++) {
- if (info->protect[i])
- flash_real_protect (info, i, 1);
- }
- }
- }
-
- return retcode;
-}
-
-/*-----------------------------------------------------------------------
- * wait for XSR.7 to be set. Time out with an error if it does not.
- * This routine does not set the flash to read-array mode.
- */
-static int flash_status_check (flash_info_t * info, ulong sector, ulong tout,
- char *prompt)
-{
- ulong start;
-
- /* Wait for command completion */
- start = get_timer (0);
- while (!flash_isset (info, sector, 0, FLASH_STATUS_DONE)) {
- if (get_timer (start) > info->erase_blk_tout) {
- printf ("Flash %s timeout at address %lx\n", prompt,
- info->start[sector]);
- flash_write_cmd (info, sector, 0, FLASH_CMD_RESET);
- return ERR_TIMOUT;
- }
- }
- return ERR_OK;
-}
-
-/*-----------------------------------------------------------------------
- * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
- * This routine sets the flash to read-array mode.
- */
-static int flash_full_status_check (flash_info_t * info, ulong sector,
- ulong tout, char *prompt)
-{
- int retcode;
-
- retcode = flash_status_check (info, sector, tout, prompt);
- if ((retcode == ERR_OK)
- && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
- retcode = ERR_INVAL;
- printf ("Flash %s error at address %lx\n", prompt,
- info->start[sector]);
- if (flash_isset
- (info, sector, 0,
- FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)) {
- printf ("Command Sequence Error.\n");
- } else if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS)) {
- printf ("Block Erase Error.\n");
- retcode = ERR_NOT_ERASED;
- } else if (flash_isset (info, sector, 0, FLASH_STATUS_PSLBS)) {
- printf ("Locking Error\n");
- }
- if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
- printf ("Block locked.\n");
- retcode = ERR_PROTECTED;
- }
- if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
- printf ("Vpp Low Error.\n");
- }
- flash_write_cmd (info, sector, 0, FLASH_CMD_RESET);
- return retcode;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
-{
- switch (info->portwidth) {
- case FLASH_CFI_8BIT:
- cword->c = c;
- break;
- case FLASH_CFI_16BIT:
- cword->w = (cword->w << 8) | c;
- break;
- case FLASH_CFI_32BIT:
- cword->l = (cword->l << 8) | c;
- }
-}
-
-/*-----------------------------------------------------------------------
- * make a proper sized command based on the port and chip widths
- */
-static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf)
-{
- /*int i; */
- uchar *cp = (uchar *) cmdbuf;
-
- /* for(i=0; i< info->portwidth; i++) */
- /* *cp++ = ((i+1) % info->chipwidth) ? '\0':cmd; */
- if (info->portwidth == FLASH_CFI_8BIT
- && info->chipwidth == FLASH_CFI_16BIT) {
- cp[0] = cmd;
- } else if (info->portwidth == FLASH_CFI_16BIT
- && info->chipwidth == FLASH_CFI_16BIT) {
- cp[0] = '\0';
- cp[1] = cmd;
- };
-}
-
-/*
- * Write a proper sized command to the correct address
- */
-static void flash_write_cmd (flash_info_t * info, int sect, uchar offset,
- uchar cmd)
-{
-
- volatile cfiptr_t addr;
- cfiword_t cword;
-
- addr.cp = flash_make_addr (info, sect, offset);
- flash_make_cmd (info, cmd, &cword);
- switch (info->portwidth) {
- case FLASH_CFI_8BIT:
- *addr.cp = cword.c;
- break;
- case FLASH_CFI_16BIT:
- *addr.wp = cword.w;
- break;
- case FLASH_CFI_32BIT:
- *addr.lp = cword.l;
- break;
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-static int flash_isequal (flash_info_t * info, int sect, uchar offset,
- uchar cmd)
-{
- cfiptr_t cptr;
- cfiword_t cword;
- int retval;
-
- cptr.cp = flash_make_addr (info, sect, offset);
- flash_make_cmd (info, cmd, &cword);
- switch (info->portwidth) {
- case FLASH_CFI_8BIT:
- retval = (cptr.cp[0] == cword.c);
- break;
- case FLASH_CFI_16BIT:
- retval = (cptr.wp[0] == cword.w);
- break;
- case FLASH_CFI_32BIT:
- retval = (cptr.lp[0] == cword.l);
- break;
- default:
- retval = 0;
- break;
- }
- return retval;
-}
-
-/*-----------------------------------------------------------------------
- */
-static int flash_isset (flash_info_t * info, int sect, uchar offset,
- uchar cmd)
-{
- cfiptr_t cptr;
- cfiword_t cword;
- int retval;
-
- cptr.cp = flash_make_addr (info, sect, offset);
- flash_make_cmd (info, cmd, &cword);
- switch (info->portwidth) {
- case FLASH_CFI_8BIT:
- retval = ((cptr.cp[0] & cword.c) == cword.c);
- break;
- case FLASH_CFI_16BIT:
- retval = ((cptr.wp[0] & cword.w) == cword.w);
- break;
- case FLASH_CFI_32BIT:
- retval = ((cptr.lp[0] & cword.l) == cword.l);
- break;
- default:
- retval = 0;
- break;
- }
- return retval;
-}
-
-/*-----------------------------------------------------------------------
- * detect if flash is compatible with the Common Flash Interface (CFI)
- * http://www.jedec.org/download/search/jesd68.pdf
- *
-*/
-static int flash_detect_cfi (flash_info_t * info)
-{
-
-#if 0
- for (info->portwidth = FLASH_CFI_8BIT;
- info->portwidth <= FLASH_CFI_32BIT; info->portwidth <<= 1) {
- for (info->chipwidth = FLASH_CFI_BY8;
- info->chipwidth <= info->portwidth;
- info->chipwidth <<= 1) {
- flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
- flash_write_cmd (info, 0, FLASH_OFFSET_CFI,
- FLASH_CMD_CFI);
- if (flash_isequal
- (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
- && flash_isequal (info, 0,
- FLASH_OFFSET_CFI_RESP + 1, 'R')
- && flash_isequal (info, 0,
- FLASH_OFFSET_CFI_RESP + 2, 'Y'))
- return 1;
- }
- }
-#endif
- flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
- flash_write_cmd (info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI);
- if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q') &&
- flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') &&
- flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
- return 1;
- } else {
- return 0;
- };
-}
-
-/*
- * The following code cannot be run from FLASH!
- *
- */
-static ulong flash_get_size (ulong base, int banknum)
-{
- flash_info_t *info = &flash_info[banknum];
- int i, j;
- int sect_cnt;
- unsigned long sector;
- unsigned long tmp;
- int size_ratio;
- uchar num_erase_regions;
- int erase_region_size;
- int erase_region_count;
-
- info->start[0] = base;
-
- if (flash_detect_cfi (info)) {
-#ifdef DEBUG_FLASH
- printf ("portwidth=%d chipwidth=%d\n", info->portwidth, info->chipwidth); /* test-only */
-#endif
- size_ratio = 1; /* info->portwidth / info->chipwidth; */
- num_erase_regions =
- flash_read_uchar (info,
- FLASH_OFFSET_NUM_ERASE_REGIONS);
-#ifdef DEBUG_FLASH
- printf ("found %d erase regions\n", num_erase_regions);
-#endif
- sect_cnt = 0;
- sector = base;
- for (i = 0; i < num_erase_regions; i++) {
- if (i > NUM_ERASE_REGIONS) {
- printf ("%d erase regions found, only %d used\n", num_erase_regions, NUM_ERASE_REGIONS);
- break;
- }
- tmp = flash_read_long (info, 0,
- FLASH_OFFSET_ERASE_REGIONS);
- erase_region_count = (tmp & 0xffff) + 1;
- tmp >>= 16;
- erase_region_size =
- (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
- for (j = 0; j < erase_region_count; j++) {
- info->start[sect_cnt] = sector;
- sector += (erase_region_size * size_ratio);
- info->protect[sect_cnt] =
- flash_isset (info, sect_cnt,
- FLASH_OFFSET_PROTECT,
- FLASH_STATUS_PROTECT);
- sect_cnt++;
- }
- }
-
- info->sector_count = sect_cnt;
- /* multiply the size by the number of chips */
- info->size =
- (1 << flash_read_uchar (info, FLASH_OFFSET_SIZE)) *
- size_ratio;
- info->buffer_size =
- (1 <<
- flash_read_ushort (info, 0,
- FLASH_OFFSET_BUFFER_SIZE));
- tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_ETOUT);
- info->erase_blk_tout =
- (tmp *
- (1 <<
- flash_read_uchar (info, FLASH_OFFSET_EMAX_TOUT)));
- tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT);
- info->buffer_write_tout =
- (tmp *
- (1 <<
- flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT)));
- tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT);
- info->write_tout =
- (tmp *
- (1 <<
- flash_read_uchar (info,
- FLASH_OFFSET_WMAX_TOUT))) / 1000;
- info->flash_id = FLASH_MAN_CFI;
- }
-
- flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
- return (info->size);
-}
-
-/*-----------------------------------------------------------------------
- */
-static int flash_write_cfiword (flash_info_t * info, ulong dest,
- cfiword_t cword)
-{
- cfiptr_t cptr;
- int flag;
-
- cptr.cp = (uchar *) dest;
-
- /* Check if Flash is (sufficiently) erased */
- switch (info->portwidth) {
- case FLASH_CFI_8BIT:
- flag = ((cptr.cp[0] & cword.c) == cword.c);
- break;
- case FLASH_CFI_16BIT:
- flag = ((cptr.wp[0] & cword.w) == cword.w);
- break;
- case FLASH_CFI_32BIT:
- flag = ((cptr.lp[0] & cword.l) == cword.l);
- break;
- default:
- return 2;
- }
- if (!flag)
- return 2;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
- flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
-
- switch (info->portwidth) {
- case FLASH_CFI_8BIT:
- cptr.cp[0] = cword.c;
- break;
- case FLASH_CFI_16BIT:
- cptr.wp[0] = cword.w;
- break;
- case FLASH_CFI_32BIT:
- cptr.lp[0] = cword.l;
- break;
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- return flash_full_status_check (info, 0, info->write_tout, "write");
-}
-
-#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
-
-/* loop through the sectors from the highest address
- * when the passed address is greater or equal to the sector address
- * we have a match
- */
-static int find_sector (flash_info_t * info, ulong addr)
-{
- int sector;
-
- for (sector = info->sector_count - 1; sector >= 0; sector--) {
- if (addr >= info->start[sector])
- break;
- }
- return sector;
-}
-
-static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
- int len)
-{
-
- int sector;
- int cnt;
- int retcode;
- volatile cfiptr_t src;
- volatile cfiptr_t dst;
-
- src.cp = cp;
- dst.cp = (uchar *) dest;
- sector = find_sector (info, dest);
- flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
- flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
- if ((retcode =
- flash_status_check (info, sector, info->buffer_write_tout,
- "write to buffer")) == ERR_OK) {
- switch (info->portwidth) {
- case FLASH_CFI_8BIT:
- cnt = len;
- break;
- case FLASH_CFI_16BIT:
- cnt = len >> 1;
- break;
- case FLASH_CFI_32BIT:
- cnt = len >> 2;
- break;
- default:
- return ERR_INVAL;
- break;
- }
- flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
- while (cnt-- > 0) {
- switch (info->portwidth) {
- case FLASH_CFI_8BIT:
- *dst.cp++ = *src.cp++;
- break;
- case FLASH_CFI_16BIT:
- *dst.wp++ = *src.wp++;
- break;
- case FLASH_CFI_32BIT:
- *dst.lp++ = *src.lp++;
- break;
- default:
- return ERR_INVAL;
- break;
- }
- }
- flash_write_cmd (info, sector, 0,
- FLASH_CMD_WRITE_BUFFER_CONFIRM);
- retcode =
- flash_full_status_check (info, sector,
- info->buffer_write_tout,
- "buffer write");
- }
- flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
- return retcode;
-}
-#endif /* CONFIG_SYS_USE_FLASH_BUFFER_WRITE */
diff --git a/board/amirix/ap1000/init.S b/board/amirix/ap1000/init.S
deleted file mode 100644
index eac7cd3..0000000
--- a/board/amirix/ap1000/init.S
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * init.S: Stubs for ppcboot initialization
- *
- * Copyright 2002 Mind NV
- *
- * http://www.mind.be/
- *
- * Author : Peter De Schrijver (p2 at mind.be)
- *
- * This software may be used and distributed according to the terms of
- * the GNU General Public License (GPL) version 2, incorporated herein by
- * reference. Drivers based on or derived from this code fall under the GPL
- * and must retain the authorship, copyright and this license notice. This
- * file is not a complete program and may only be used when the entire
- * program is licensed under the GPL.
- *
- */
-
-#include <asm/ppc4xx.h>
-
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-
-#include <asm/cache.h>
-#include <asm/mmu.h>
-
-
- .globl ext_bus_cntlr_init
-ext_bus_cntlr_init:
- blr
diff --git a/board/amirix/ap1000/pci.c b/board/amirix/ap1000/pci.c
deleted file mode 100644
index d021164..0000000
--- a/board/amirix/ap1000/pci.c
+++ /dev/null
@@ -1,318 +0,0 @@
-/*
- * (C) Copyright 2003
- * AMIRIX Systems Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/ppc4xx.h>
-#include <asm/processor.h>
-#include <pci.h>
-
-#define PCI_MEM_82559ER_CSR_BASE 0x30200000
-#define PCI_IO_82559ER_CSR_BASE 0x40000200
-
-/** AP1100 specific values */
-#define PSII_BASE 0x30000000 /**< PowerSpan II dual bridge local bus register address */
-#define PSII_CONFIG_ADDR 0x30000290 /**< PowerSpan II Configuration Cycle Address configuration register */
-#define PSII_CONFIG_DATA 0x30000294 /**< PowerSpan II Configuration Cycle Data register. */
-#define PSII_CONFIG_DEST_PCI2 0x01000000 /**< PowerSpan II configuration cycle destination selection, set for PCI2 bus */
-#define PSII_PCI_MEM_BASE 0x30200000 /**< Local Bus address for start of PCI memory space on PCI2 bus. */
-#define PSII_PCI_MEM_SIZE 0x1BE00000 /**< PCI Memory space about 510 Meg. */
-#define AP1000_SYS_MEM_START 0x00000000 /**< System memory starts@0. */
-#define AP1000_SYS_MEM_SIZE 0x08000000 /**< System memory is 128 Meg. */
-
-/* static int G_verbosity_level = 1; */
-#define G_verbosity_level 1
-
-void write1 (unsigned long addr, unsigned char val)
-{
- volatile unsigned char *p = (volatile unsigned char *) addr;
-
- if (G_verbosity_level > 1)
- printf ("write1: addr=%08x val=%02x\n", (unsigned int) addr,
- val);
- *p = val;
- asm ("eieio");
-}
-
-unsigned char read1 (unsigned long addr)
-{
- unsigned char val;
- volatile unsigned char *p = (volatile unsigned char *) addr;
-
- if (G_verbosity_level > 1)
- printf ("read1: addr=%08x ", (unsigned int) addr);
- val = *p;
- asm ("eieio");
- if (G_verbosity_level > 1)
- printf ("val=%08x\n", val);
- return val;
-}
-
-void write2 (unsigned long addr, unsigned short val)
-{
- volatile unsigned short *p = (volatile unsigned short *) addr;
-
- if (G_verbosity_level > 1)
- printf ("write2: addr=%08x val=%04x -> *p=%04x\n",
- (unsigned int) addr, val,
- ((val & 0xFF00) >> 8) | ((val & 0x00FF) << 8));
-
- *p = ((val & 0xFF00) >> 8) | ((val & 0x00FF) << 8);
- asm ("eieio");
-}
-
-unsigned short read2 (unsigned long addr)
-{
- unsigned short val;
- volatile unsigned short *p = (volatile unsigned short *) addr;
-
- if (G_verbosity_level > 1)
- printf ("read2: addr=%08x ", (unsigned int) addr);
- val = *p;
- val = ((val & 0xFF00) >> 8) | ((val & 0x00FF) << 8);
- asm ("eieio");
- if (G_verbosity_level > 1)
- printf ("*p=%04x -> val=%04x\n",
- ((val & 0xFF00) >> 8) | ((val & 0x00FF) << 8), val);
- return val;
-}
-
-void write4 (unsigned long addr, unsigned long val)
-{
- volatile unsigned long *p = (volatile unsigned long *) addr;
-
- if (G_verbosity_level > 1)
- printf ("write4: addr=%08x val=%08x -> *p=%08x\n",
- (unsigned int) addr, (unsigned int) val,
- (unsigned int) (((val & 0xFF000000) >> 24) |
- ((val & 0x000000FF) << 24) |
- ((val & 0x00FF0000) >> 8) |
- ((val & 0x0000FF00) << 8)));
-
- *p = ((val & 0xFF000000) >> 24) | ((val & 0x000000FF) << 24) |
- ((val & 0x00FF0000) >> 8) | ((val & 0x0000FF00) << 8);
- asm ("eieio");
-}
-
-unsigned long read4 (unsigned long addr)
-{
- unsigned long val;
- volatile unsigned long *p = (volatile unsigned long *) addr;
-
- if (G_verbosity_level > 1)
- printf ("read4: addr=%08x", (unsigned int) addr);
-
- val = *p;
- val = ((val & 0xFF000000) >> 24) | ((val & 0x000000FF) << 24) |
- ((val & 0x00FF0000) >> 8) | ((val & 0x0000FF00) << 8);
- asm ("eieio");
-
- if (G_verbosity_level > 1)
- printf ("*p=%04x -> val=%04x\n",
- (unsigned int) (((val & 0xFF000000) >> 24) |
- ((val & 0x000000FF) << 24) |
- ((val & 0x00FF0000) >> 8) |
- ((val & 0x0000FF00) << 8)),
- (unsigned int) val);
- return val;
-}
-
-void write4be (unsigned long addr, unsigned long val)
-{
- volatile unsigned long *p = (volatile unsigned long *) addr;
-
- if (G_verbosity_level > 1)
- printf ("write4: addr=%08x val=%08x\n", (unsigned int) addr,
- (unsigned int) val);
- *p = val;
- asm ("eieio");
-}
-
-/** One byte configuration write on PSII.
- * Currently fixes destination PCI bus to PCI2, onboard
- * pci.
- * @param hose PCI Host controller information. Ignored.
- * @param dev Encoded PCI device/Bus and Function value.
- * @param reg PCI Configuration register number.
- * @param val Address of location for received byte.
- * @return Always Zero.
- */
-static int psII_read_config_byte (struct pci_controller *hose,
- pci_dev_t dev, int reg, u8 * val)
-{
- write4be (PSII_CONFIG_ADDR, PSII_CONFIG_DEST_PCI2 | /* Operate on PCI2 bus interface . */
- (PCI_BUS (dev) << 16) | (PCI_DEV (dev) << 11) | (PCI_FUNC (dev) << 8) | ((reg & 0xFF) & ~3)); /* Configuation cycle type 0 */
-
- *val = read1 (PSII_CONFIG_DATA + (reg & 0x03));
- return (0);
-}
-
-/** One byte configuration write on PSII.
- * Currently fixes destination bus to PCI2, onboard
- * pci.
- * @param hose PCI Host controller information. Ignored.
- * @param dev Encoded PCI device/Bus and Function value.
- * @param reg PCI Configuration register number.
- * @param val Output byte.
- * @return Always Zero.
- */
-static int psII_write_config_byte (struct pci_controller *hose,
- pci_dev_t dev, int reg, u8 val)
-{
- write4be (PSII_CONFIG_ADDR, PSII_CONFIG_DEST_PCI2 | /* Operate on PCI2 bus interface . */
- (PCI_BUS (dev) << 16) | (PCI_DEV (dev) << 11) | (PCI_FUNC (dev) << 8) | ((reg & 0xFF) & ~3)); /* Configuation cycle type 0 */
-
- write1 (PSII_CONFIG_DATA + (reg & 0x03), (unsigned char) val);
-
- return (0);
-}
-
-/** One word (16 bit) configuration read on PSII.
- * Currently fixes destination PCI bus to PCI2, onboard
- * pci.
- * @param hose PCI Host controller information. Ignored.
- * @param dev Encoded PCI device/Bus and Function value.
- * @param reg PCI Configuration register number.
- * @param val Address of location for received word.
- * @return Always Zero.
- */
-static int psII_read_config_word (struct pci_controller *hose,
- pci_dev_t dev, int reg, u16 * val)
-{
- write4be (PSII_CONFIG_ADDR, PSII_CONFIG_DEST_PCI2 | /* Operate on PCI2 bus interface . */
- (PCI_BUS (dev) << 16) | (PCI_DEV (dev) << 11) | (PCI_FUNC (dev) << 8) | ((reg & 0xFF) & ~3)); /* Configuation cycle type 0 */
-
- *val = read2 (PSII_CONFIG_DATA + (reg & 0x03));
- return (0);
-}
-
-/** One word (16 bit) configuration write on PSII.
- * Currently fixes destination bus to PCI2, onboard
- * pci.
- * @param hose PCI Host controller information. Ignored.
- * @param dev Encoded PCI device/Bus and Function value.
- * @param reg PCI Configuration register number.
- * @param val Output word.
- * @return Always Zero.
- */
-static int psII_write_config_word (struct pci_controller *hose,
- pci_dev_t dev, int reg, u16 val)
-{
- write4be (PSII_CONFIG_ADDR, PSII_CONFIG_DEST_PCI2 | /* Operate on PCI2 bus interface . */
- (PCI_BUS (dev) << 16) | (PCI_DEV (dev) << 11) | (PCI_FUNC (dev) << 8) | ((reg & 0xFF) & ~3)); /* Configuation cycle type 0 */
-
- write2 (PSII_CONFIG_DATA + (reg & 0x03), (unsigned short) val);
-
- return (0);
-}
-
-/** One DWord (32 bit) configuration read on PSII.
- * Currently fixes destination PCI bus to PCI2, onboard
- * pci.
- * @param hose PCI Host controller information. Ignored.
- * @param dev Encoded PCI device/Bus and Function value.
- * @param reg PCI Configuration register number.
- * @param val Address of location for received byte.
- * @return Always Zero.
- */
-static int psII_read_config_dword (struct pci_controller *hose,
- pci_dev_t dev, int reg, u32 * val)
-{
- write4be (PSII_CONFIG_ADDR, PSII_CONFIG_DEST_PCI2 | /* Operate on PCI2 bus interface . */
- (PCI_BUS (dev) << 16) | (PCI_DEV (dev) << 11) | (PCI_FUNC (dev) << 8) | ((reg & 0xFF) & ~3)); /* Configuation cycle type 0 */
-
- *val = read4 (PSII_CONFIG_DATA);
- return (0);
-}
-
-/** One DWord (32 bit) configuration write on PSII.
- * Currently fixes destination bus to PCI2, onboard
- * pci.
- * @param hose PCI Host controller information. Ignored.
- * @param dev Encoded PCI device/Bus and Function value.
- * @param reg PCI Configuration register number.
- * @param val Output Dword.
- * @return Always Zero.
- */
-static int psII_write_config_dword (struct pci_controller *hose,
- pci_dev_t dev, int reg, u32 val)
-{
- write4be (PSII_CONFIG_ADDR, PSII_CONFIG_DEST_PCI2 | /* Operate on PCI2 bus interface . */
- (PCI_BUS (dev) << 16) | (PCI_DEV (dev) << 11) | (PCI_FUNC (dev) << 8) | ((reg & 0xFF) & ~3)); /* Configuation cycle type 0 */
-
- write4 (PSII_CONFIG_DATA, (unsigned long) val);
-
- return (0);
-}
-
-static struct pci_config_table ap1000_config_table[] = {
-#ifdef CONFIG_AP1000
- {PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
- PCI_BUS (CONFIG_SYS_ETH_DEV_FN), PCI_DEV (CONFIG_SYS_ETH_DEV_FN),
- PCI_FUNC (CONFIG_SYS_ETH_DEV_FN),
- pci_cfgfunc_config_device,
- {CONFIG_SYS_ETH_IOBASE, CONFIG_SYS_ETH_MEMBASE,
- PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER}},
-#endif
- {}
-};
-
-static struct pci_controller psII_hose = {
- config_table:ap1000_config_table,
-};
-
-void pci_init_board (void)
-{
- struct pci_controller *hose = &psII_hose;
-
- /*
- * Register the hose
- */
- hose->first_busno = 0;
- hose->last_busno = 0xff;
-
- /* System memory space */
- pci_set_region (hose->regions + 0,
- AP1000_SYS_MEM_START, AP1000_SYS_MEM_START,
- AP1000_SYS_MEM_SIZE,
- PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
-
- /* PCI Memory space */
- pci_set_region (hose->regions + 1,
- PSII_PCI_MEM_BASE, PSII_PCI_MEM_BASE,
- PSII_PCI_MEM_SIZE, PCI_REGION_MEM);
-
- /* No IO Memory space - for now */
-
- pci_set_ops (hose,
- psII_read_config_byte,
- psII_read_config_word,
- psII_read_config_dword,
- psII_write_config_byte,
- psII_write_config_word, psII_write_config_dword);
-
- hose->region_count = 2;
-
- pci_register_hose (hose);
-
- hose->last_busno = pci_hose_scan (hose);
-}
diff --git a/board/amirix/ap1000/powerspan.c b/board/amirix/ap1000/powerspan.c
deleted file mode 100644
index 55451b1..0000000
--- a/board/amirix/ap1000/powerspan.c
+++ /dev/null
@@ -1,750 +0,0 @@
-/**
- * @file powerspan.c Source file for PowerSpan II code.
- */
-
-/*
- * (C) Copyright 2005
- * AMIRIX Systems Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <command.h>
-#include <asm/processor.h>
-#include "powerspan.h"
-#define tolower(x) x
-#include "ap1000.h"
-
-#ifdef INCLUDE_PCI
-
-/** Write one byte with byte swapping.
- * @param addr [IN] the address to write to
- * @param val [IN] the value to write
- */
-void write1 (unsigned long addr, unsigned char val)
-{
- volatile unsigned char *p = (volatile unsigned char *) addr;
-
-#ifdef VERBOSITY
- if (gVerbosityLevel > 1) {
- printf ("write1: addr=%08x val=%02x\n", addr, val);
- }
-#endif
- *p = val;
- PSII_SYNC ();
-}
-
-/** Read one byte with byte swapping.
- * @param addr [IN] the address to read from
- * @return the value at addr
- */
-unsigned char read1 (unsigned long addr)
-{
- unsigned char val;
- volatile unsigned char *p = (volatile unsigned char *) addr;
-
- val = *p;
- PSII_SYNC ();
-#ifdef VERBOSITY
- if (gVerbosityLevel > 1) {
- printf ("read1: addr=%08x val=%02x\n", addr, val);
- }
-#endif
- return val;
-}
-
-/** Write one 2-byte word with byte swapping.
- * @param addr [IN] the address to write to
- * @param val [IN] the value to write
- */
-void write2 (unsigned long addr, unsigned short val)
-{
- volatile unsigned short *p = (volatile unsigned short *) addr;
-
-#ifdef VERBOSITY
- if (gVerbosityLevel > 1) {
- printf ("write2: addr=%08x val=%04x -> *p=%04x\n", addr, val,
- ((val & 0xFF00) >> 8) | ((val & 0x00FF) << 8));
- }
-#endif
- *p = ((val & 0xFF00) >> 8) | ((val & 0x00FF) << 8);
- PSII_SYNC ();
-}
-
-/** Read one 2-byte word with byte swapping.
- * @param addr [IN] the address to read from
- * @return the value@addr
- */
-unsigned short read2 (unsigned long addr)
-{
- unsigned short val;
- volatile unsigned short *p = (volatile unsigned short *) addr;
-
- val = *p;
- val = ((val & 0xFF00) >> 8) | ((val & 0x00FF) << 8);
- PSII_SYNC ();
-#ifdef VERBOSITY
- if (gVerbosityLevel > 1) {
- printf ("read2: addr=%08x *p=%04x -> val=%04x\n", addr, *p,
- val);
- }
-#endif
- return val;
-}
-
-/** Write one 4-byte word with byte swapping.
- * @param addr [IN] the address to write to
- * @param val [IN] the value to write
- */
-void write4 (unsigned long addr, unsigned long val)
-{
- volatile unsigned long *p = (volatile unsigned long *) addr;
-
-#ifdef VERBOSITY
- if (gVerbosityLevel > 1) {
- printf ("write4: addr=%08x val=%08x -> *p=%08x\n", addr, val,
- ((val & 0xFF000000) >> 24) |
- ((val & 0x000000FF) << 24) |
- ((val & 0x00FF0000) >> 8) |
- ((val & 0x0000FF00) << 8));
- }
-#endif
- *p = ((val & 0xFF000000) >> 24) | ((val & 0x000000FF) << 24) |
- ((val & 0x00FF0000) >> 8) | ((val & 0x0000FF00) << 8);
- PSII_SYNC ();
-}
-
-/** Read one 4-byte word with byte swapping.
- * @param addr [IN] the address to read from
- * @return the value@addr
- */
-unsigned long read4 (unsigned long addr)
-{
- unsigned long val;
- volatile unsigned long *p = (volatile unsigned long *) addr;
-
- val = *p;
- val = ((val & 0xFF000000) >> 24) | ((val & 0x000000FF) << 24) |
- ((val & 0x00FF0000) >> 8) | ((val & 0x0000FF00) << 8);
- PSII_SYNC ();
-#ifdef VERBOSITY
- if (gVerbosityLevel > 1) {
- printf ("read4: addr=%08x *p=%08x -> val=%08x\n", addr, *p,
- val);
- }
-#endif
- return val;
-}
-
-int PCIReadConfig (int bus, int dev, int fn, int reg, int width,
- unsigned long *val)
-{
- unsigned int conAdrVal;
- unsigned int conDataReg = REG_CONFIG_DATA;
- unsigned int status;
- int ret_val = 0;
-
-
- /* DEST bit hardcoded to 1: local pci is PCI-2 */
- /* TYPE bit is hardcoded to 1: all config cycles are local */
- conAdrVal = (1 << 24)
- | ((bus & 0xFF) << 16)
- | ((dev & 0xFF) << 11)
- | ((fn & 0x07) << 8)
- | (reg & 0xFC);
-
- /* clear any pending master aborts */
- write4 (REG_P1_CSR, CLEAR_MASTER_ABORT);
-
- /* Load the conAdrVal value first, then read from pb_conf_data */
- write4 (REG_CONFIG_ADDRESS, conAdrVal);
- PSII_SYNC ();
-
-
- /* Note: documentation does not match the pspan library code */
- /* Note: *pData comes back as -1 if device is not present */
- switch (width) {
- case 4:
- *(unsigned int *) val = read4 (conDataReg);
- break;
- case 2:
- *(unsigned short *) val = read2 (conDataReg);
- break;
- case 1:
- *(unsigned char *) val = read1 (conDataReg);
- break;
- default:
- ret_val = ILLEGAL_REG_OFFSET;
- break;
- }
- PSII_SYNC ();
-
- /* clear any pending master aborts */
- status = read4 (REG_P1_CSR);
- if (status & CLEAR_MASTER_ABORT) {
- ret_val = NO_DEVICE_FOUND;
- write4 (REG_P1_CSR, CLEAR_MASTER_ABORT);
- }
-
- return ret_val;
-}
-
-
-int PCIWriteConfig (int bus, int dev, int fn, int reg, int width,
- unsigned long val)
-{
- unsigned int conAdrVal;
- unsigned int conDataReg = REG_CONFIG_DATA;
- unsigned int status;
- int ret_val = 0;
-
-
- /* DEST bit hardcoded to 1: local pci is PCI-2 */
- /* TYPE bit is hardcoded to 1: all config cycles are local */
- conAdrVal = (1 << 24)
- | ((bus & 0xFF) << 16)
- | ((dev & 0xFF) << 11)
- | ((fn & 0x07) << 8)
- | (reg & 0xFC);
-
- /* clear any pending master aborts */
- write4 (REG_P1_CSR, CLEAR_MASTER_ABORT);
-
- /* Load the conAdrVal value first, then read from pb_conf_data */
- write4 (REG_CONFIG_ADDRESS, conAdrVal);
- PSII_SYNC ();
-
-
- /* Note: documentation does not match the pspan library code */
- /* Note: *pData comes back as -1 if device is not present */
- switch (width) {
- case 4:
- write4 (conDataReg, val);
- break;
- case 2:
- write2 (conDataReg, val);
- break;
- case 1:
- write1 (conDataReg, val);
- break;
- default:
- ret_val = ILLEGAL_REG_OFFSET;
- break;
- }
- PSII_SYNC ();
-
- /* clear any pending master aborts */
- status = read4 (REG_P1_CSR);
- if (status & CLEAR_MASTER_ABORT) {
- ret_val = NO_DEVICE_FOUND;
- write4 (REG_P1_CSR, CLEAR_MASTER_ABORT);
- }
-
- return ret_val;
-}
-
-
-int pci_read_config_byte (int bus, int dev, int fn, int reg,
- unsigned char *val)
-{
- unsigned long read_val;
- int ret_val;
-
- ret_val = PCIReadConfig (bus, dev, fn, reg, 1, &read_val);
- *val = read_val & 0xFF;
-
- return ret_val;
-}
-
-int pci_write_config_byte (int bus, int dev, int fn, int reg,
- unsigned char val)
-{
- return PCIWriteConfig (bus, dev, fn, reg, 1, val);
-}
-
-int pci_read_config_word (int bus, int dev, int fn, int reg,
- unsigned short *val)
-{
- unsigned long read_val;
- int ret_val;
-
- ret_val = PCIReadConfig (bus, dev, fn, reg, 2, &read_val);
- *val = read_val & 0xFFFF;
-
- return ret_val;
-}
-
-int pci_write_config_word (int bus, int dev, int fn, int reg,
- unsigned short val)
-{
- return PCIWriteConfig (bus, dev, fn, reg, 2, val);
-}
-
-int pci_read_config_dword (int bus, int dev, int fn, int reg,
- unsigned long *val)
-{
- return PCIReadConfig (bus, dev, fn, reg, 4, val);
-}
-
-int pci_write_config_dword (int bus, int dev, int fn, int reg,
- unsigned long val)
-{
- return PCIWriteConfig (bus, dev, fn, reg, 4, val);
-}
-
-#endif /* INCLUDE_PCI */
-
-int I2CAccess (unsigned char theI2CAddress, unsigned char theDevCode,
- unsigned char theChipSel, unsigned char *theValue, int RWFlag)
-{
- int ret_val = 0;
- unsigned int reg_value;
-
- reg_value = PowerSpanRead (REG_I2C_CSR);
-
- if (reg_value & I2C_CSR_ACT) {
- printf ("Error: I2C busy\n");
- ret_val = I2C_BUSY;
- } else {
- reg_value = ((theI2CAddress & 0xFF) << 24)
- | ((theDevCode & 0x0F) << 12)
- | ((theChipSel & 0x07) << 9)
- | I2C_CSR_ERR;
- if (RWFlag == I2C_WRITE) {
- reg_value |= I2C_CSR_RW | ((*theValue & 0xFF) << 16);
- }
-
- PowerSpanWrite (REG_I2C_CSR, reg_value);
- udelay (1);
-
- do {
- reg_value = PowerSpanRead (REG_I2C_CSR);
-
- if ((reg_value & I2C_CSR_ACT) == 0) {
- if (reg_value & I2C_CSR_ERR) {
- ret_val = I2C_ERR;
- } else {
- *theValue =
- (reg_value & I2C_CSR_DATA) >>
- 16;
- }
- }
- } while (reg_value & I2C_CSR_ACT);
- }
-
- return ret_val;
-}
-
-int EEPROMRead (unsigned char theI2CAddress, unsigned char *theValue)
-{
- return I2CAccess (theI2CAddress, I2C_EEPROM_DEV, I2C_EEPROM_CHIP_SEL,
- theValue, I2C_READ);
-}
-
-int EEPROMWrite (unsigned char theI2CAddress, unsigned char theValue)
-{
- return I2CAccess (theI2CAddress, I2C_EEPROM_DEV, I2C_EEPROM_CHIP_SEL,
- &theValue, I2C_WRITE);
-}
-
-int do_eeprom (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
-{
- char cmd;
- int ret_val = 0;
- unsigned int address = 0;
- unsigned char value = 1;
- unsigned char read_value;
- int ii;
- int error = 0;
- unsigned char *mem_ptr;
- unsigned char default_eeprom[] = EEPROM_DEFAULT;
-
- if (argc < 2) {
- goto usage;
- }
-
- cmd = argv[1][0];
- if (argc > 2) {
- address = simple_strtoul (argv[2], NULL, 16);
- if (argc > 3) {
- value = simple_strtoul (argv[3], NULL, 16) & 0xFF;
- }
- }
-
- switch (cmd) {
- case 'r':
- if (address > 256) {
- printf ("Illegal Address\n");
- goto usage;
- }
- printf ("@0x%x: ", address);
- for (ii = 0; ii < value; ii++) {
- if (EEPROMRead (address + ii, &read_value) !=
- 0) {
- printf ("Read Error\n");
- } else {
- printf ("0x%02x ", read_value);
- }
-
- if (((ii + 1) % 16) == 0) {
- printf ("\n");
- }
- }
- printf ("\n");
- break;
- case 'w':
- if (address > 256) {
- printf ("Illegal Address\n");
- goto usage;
- }
- if (argc < 4) {
- goto usage;
- }
- if (EEPROMWrite (address, value) != 0) {
- printf ("Write Error\n");
- }
- break;
- case 'g':
- if (argc != 3) {
- goto usage;
- }
- mem_ptr = (unsigned char *) address;
- for (ii = 0; ((ii < EEPROM_LENGTH) && (error == 0));
- ii++) {
- if (EEPROMRead (ii, &read_value) != 0) {
- printf ("Read Error\n");
- error = 1;
- } else {
- *mem_ptr = read_value;
- mem_ptr++;
- }
- }
- break;
- case 'p':
- if (argc != 3) {
- goto usage;
- }
- mem_ptr = (unsigned char *) address;
- for (ii = 0; ((ii < EEPROM_LENGTH) && (error == 0));
- ii++) {
- if (EEPROMWrite (ii, *mem_ptr) != 0) {
- printf ("Write Error\n");
- error = 1;
- }
-
- mem_ptr++;
- }
- break;
- case 'd':
- if (argc != 2) {
- goto usage;
- }
- for (ii = 0; ((ii < EEPROM_LENGTH) && (error == 0));
- ii++) {
- if (EEPROMWrite (ii, default_eeprom[ii]) != 0) {
- printf ("Write Error\n");
- error = 1;
- }
- }
- break;
- default:
- goto usage;
- }
-
- goto done;
- usage:
- printf ("Usage:\n%s\n", cmdtp->help);
-
- done:
- return ret_val;
-
-}
-
-U_BOOT_CMD (eeprom, 4, 0, do_eeprom,
- "read/write/copy to/from the PowerSpan II eeprom",
- "eeprom r OFF [NUM]\n"
- " - read NUM words starting at OFF\n"
- "eeprom w OFF VAL\n"
- " - write word VAL at offset OFF\n"
- "eeprom g ADD\n"
- " - store contents of eeprom at address ADD\n"
- "eeprom p ADD\n"
- " - put data stored at address ADD into the eeprom\n"
- "eeprom d\n" " - return eeprom to default contents");
-
-unsigned int PowerSpanRead (unsigned int theOffset)
-{
- volatile unsigned int *ptr =
- (volatile unsigned int *) (PSPAN_BASEADDR + theOffset);
- unsigned int ret_val;
-
-#ifdef VERBOSITY
- if (gVerbosityLevel > 1) {
- printf ("PowerSpanRead: offset=%08x ", theOffset);
- }
-#endif
- ret_val = *ptr;
- PSII_SYNC ();
-
-#ifdef VERBOSITY
- if (gVerbosityLevel > 1) {
- printf ("value=%08x\n", ret_val);
- }
-#endif
-
- return ret_val;
-}
-
-void PowerSpanWrite (unsigned int theOffset, unsigned int theValue)
-{
- volatile unsigned int *ptr =
- (volatile unsigned int *) (PSPAN_BASEADDR + theOffset);
-#ifdef VERBOSITY
- if (gVerbosityLevel > 1) {
- printf ("PowerSpanWrite: offset=%08x val=%02x\n", theOffset,
- theValue);
- }
-#endif
- *ptr = theValue;
- PSII_SYNC ();
-}
-
-/**
- * Sets the indicated bits in the indicated register.
- * @param theOffset [IN] the register to access.
- * @param theMask [IN] bits set in theMask will be set in the register.
- */
-void PowerSpanSetBits (unsigned int theOffset, unsigned int theMask)
-{
- volatile unsigned int *ptr =
- (volatile unsigned int *) (PSPAN_BASEADDR + theOffset);
- unsigned int register_value;
-
-#ifdef VERBOSITY
- if (gVerbosityLevel > 1) {
- printf ("PowerSpanSetBits: offset=%08x mask=%02x\n",
- theOffset, theMask);
- }
-#endif
- register_value = *ptr;
- PSII_SYNC ();
-
- register_value |= theMask;
- *ptr = register_value;
- PSII_SYNC ();
-}
-
-/**
- * Clears the indicated bits in the indicated register.
- * @param theOffset [IN] the register to access.
- * @param theMask [IN] bits set in theMask will be cleared in the register.
- */
-void PowerSpanClearBits (unsigned int theOffset, unsigned int theMask)
-{
- volatile unsigned int *ptr =
- (volatile unsigned int *) (PSPAN_BASEADDR + theOffset);
- unsigned int register_value;
-
-#ifdef VERBOSITY
- if (gVerbosityLevel > 1) {
- printf ("PowerSpanClearBits: offset=%08x mask=%02x\n",
- theOffset, theMask);
- }
-#endif
- register_value = *ptr;
- PSII_SYNC ();
-
- register_value &= ~theMask;
- *ptr = register_value;
- PSII_SYNC ();
-}
-
-/**
- * Configures a slave image on the local bus, based on the parameters and some hardcoded system values.
- * Slave Images are images that cause the PowerSpan II to be a master on the PCI bus. Thus, they
- * are outgoing from the standpoint of the local bus.
- * @param theImageIndex [IN] the PowerSpan II image to set (assumed to be 0-7).
- * @param theBlockSize [IN] the block size of the image (as used by PowerSpan II: PB_SIx_CTL[BS]).
- * @param theMemIOFlag [IN] if PX_TGT_USE_MEM_IO, this image will have the MEM_IO bit set.
- * @param theEndianness [IN] the endian bits for the image (already shifted, use defines).
- * @param theLocalBaseAddr [IN] the Local address for the image (assumed to be valid with provided block size).
- * @param thePCIBaseAddr [IN] the PCI address for the image (assumed to be valid with provided block size).
- */
-int SetSlaveImage (int theImageIndex, unsigned int theBlockSize,
- int theMemIOFlag, int theEndianness,
- unsigned int theLocalBaseAddr, unsigned int thePCIBaseAddr)
-{
- unsigned int reg_offset = theImageIndex * PB_SLAVE_IMAGE_OFF;
- unsigned int reg_value = 0;
-
- /* Make sure that the Slave Image is disabled */
- PowerSpanClearBits ((REGS_PB_SLAVE_CSR + reg_offset),
- PB_SLAVE_CSR_IMG_EN);
-
- /* Setup the mask required for requested PB Slave Image configuration */
- reg_value = PB_SLAVE_CSR_TA_EN | theEndianness | (theBlockSize << 24);
- if (theMemIOFlag == PB_SLAVE_USE_MEM_IO) {
- reg_value |= PB_SLAVE_CSR_MEM_IO;
- }
-
- /* hardcoding the following:
- TA_EN = 1
- MD_EN = 0
- MODE = 0
- PRKEEP = 0
- RD_AMT = 0
- */
- PowerSpanWrite ((REGS_PB_SLAVE_CSR + reg_offset), reg_value);
-
- /* these values are not checked by software */
- PowerSpanWrite ((REGS_PB_SLAVE_BADDR + reg_offset), theLocalBaseAddr);
- PowerSpanWrite ((REGS_PB_SLAVE_TADDR + reg_offset), thePCIBaseAddr);
-
- /* Enable the Slave Image */
- PowerSpanSetBits ((REGS_PB_SLAVE_CSR + reg_offset),
- PB_SLAVE_CSR_IMG_EN);
-
- return 0;
-}
-
-/**
- * Configures a target image on the local bus, based on the parameters and some hardcoded system values.
- * Target Images are used when the PowerSpan II is acting as a target for an access. Thus, they
- * are incoming from the standpoint of the local bus.
- * In order to behave better on the host PCI bus, if thePCIBaseAddr is NULL (0x00000000), then the PCI
- * base address will not be updated; makes sense given that the hosts own memory should be mapped to
- * PCI address 0x00000000.
- * @param theImageIndex [IN] the PowerSpan II image to set.
- * @param theBlockSize [IN] the block size of the image (as used by PowerSpan II: Px_TIx_CTL[BS]).
- * @param theMemIOFlag [IN] if PX_TGT_USE_MEM_IO, this image will have the MEM_IO bit set.
- * @param theEndianness [IN] the endian bits for the image (already shifted, use defines).
- * @param theLocalBaseAddr [IN] the Local address for the image (assumed to be valid with provided block size).
- * @param thePCIBaseAddr [IN] the PCI address for the image (assumed to be valid with provided block size).
- */
-int SetTargetImage (int theImageIndex, unsigned int theBlockSize,
- int theMemIOFlag, int theEndianness,
- unsigned int theLocalBaseAddr,
- unsigned int thePCIBaseAddr)
-{
- unsigned int csr_reg_offset = theImageIndex * P1_TGT_IMAGE_OFF;
- unsigned int pci_reg_offset = theImageIndex * P1_BST_OFF;
- unsigned int reg_value = 0;
-
- /* Make sure that the Slave Image is disabled */
- PowerSpanClearBits ((REGS_P1_TGT_CSR + csr_reg_offset),
- PB_SLAVE_CSR_IMG_EN);
-
- /* Setup the mask required for requested PB Slave Image configuration */
- reg_value =
- PX_TGT_CSR_TA_EN | PX_TGT_CSR_BAR_EN | (theBlockSize << 24) |
- PX_TGT_CSR_RTT_READ | PX_TGT_CSR_WTT_WFLUSH | theEndianness;
- if (theMemIOFlag == PX_TGT_USE_MEM_IO) {
- reg_value |= PX_TGT_MEM_IO;
- }
-
- /* hardcoding the following:
- TA_EN = 1
- BAR_EN = 1
- MD_EN = 0
- MODE = 0
- DEST = 0
- RTT = 01010
- GBL = 0
- CI = 0
- WTT = 00010
- PRKEEP = 0
- MRA = 0
- RD_AMT = 0
- */
- PowerSpanWrite ((REGS_P1_TGT_CSR + csr_reg_offset), reg_value);
-
- PowerSpanWrite ((REGS_P1_TGT_TADDR + csr_reg_offset),
- theLocalBaseAddr);
-
- if (thePCIBaseAddr != (unsigned int) NULL) {
- PowerSpanWrite ((REGS_P1_BST + pci_reg_offset),
- thePCIBaseAddr);
- }
-
- /* Enable the Slave Image */
- PowerSpanSetBits ((REGS_P1_TGT_CSR + csr_reg_offset),
- PB_SLAVE_CSR_IMG_EN);
-
- return 0;
-}
-
-int do_bridge (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
-{
- char cmd;
- int ret_val = 1;
- unsigned int image_index;
- unsigned int block_size;
- unsigned int mem_io;
- unsigned int local_addr;
- unsigned int pci_addr;
- int endianness;
-
- if (argc != 8) {
- goto usage;
- }
-
- cmd = argv[1][0];
- image_index = simple_strtoul (argv[2], NULL, 16);
- block_size = simple_strtoul (argv[3], NULL, 16);
- mem_io = simple_strtoul (argv[4], NULL, 16);
- endianness = argv[5][0];
- local_addr = simple_strtoul (argv[6], NULL, 16);
- pci_addr = simple_strtoul (argv[7], NULL, 16);
-
-
- switch (cmd) {
- case 'i':
- if (tolower (endianness) == 'b') {
- endianness = PX_TGT_CSR_BIG_END;
- } else if (tolower (endianness) == 'l') {
- endianness = PX_TGT_CSR_TRUE_LEND;
- } else {
- goto usage;
- }
- SetTargetImage (image_index, block_size, mem_io,
- endianness, local_addr, pci_addr);
- break;
- case 'o':
- if (tolower (endianness) == 'b') {
- endianness = PB_SLAVE_CSR_BIG_END;
- } else if (tolower (endianness) == 'l') {
- endianness = PB_SLAVE_CSR_TRUE_LEND;
- } else {
- goto usage;
- }
- SetSlaveImage (image_index, block_size, mem_io,
- endianness, local_addr, pci_addr);
- break;
- default:
- goto usage;
- }
-
- goto done;
-usage:
- printf ("Usage:\n%s\n", cmdtp->help);
-
-done:
- return ret_val;
-}
diff --git a/board/amirix/ap1000/powerspan.h b/board/amirix/ap1000/powerspan.h
deleted file mode 100644
index 4e9a8c1..0000000
--- a/board/amirix/ap1000/powerspan.h
+++ /dev/null
@@ -1,170 +0,0 @@
-/**
- * @file powerspan.h Header file for PowerSpan II code.
- */
-
-/*
- * (C) Copyright 2005
- * AMIRIX Systems Inc.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef POWERSPAN_H
-#define POWERSPAN_H
-
-#define CLEAR_MASTER_ABORT 0xdeadbeef
-#define NO_DEVICE_FOUND -1
-#define ILLEGAL_REG_OFFSET -2
-#define I2C_BUSY -3
-#define I2C_ERR -4
-
-#define REG_P1_CSR 0x004
-#define REGS_P1_BST 0x018
-#define REG_P1_ERR_CSR 0x150
-#define REG_P1_MISC_CSR 0x160
-#define REGS_P1_TGT_CSR 0x100
-#define REGS_P1_TGT_TADDR 0x104
-#define REGS_PB_SLAVE_CSR 0x200
-#define REGS_PB_SLAVE_TADDR 0x204
-#define REGS_PB_SLAVE_BADDR 0x208
-#define REG_CONFIG_ADDRESS 0x290
-#define REG_CONFIG_DATA 0x294
-#define REG_PB_ERR_CSR 0x2B0
-#define REG_PB_MISC_CSR 0x2C0
-#define REG_MISC_CSR 0x400
-#define REG_I2C_CSR 0x408
-#define REG_RESET_CSR 0x40C
-#define REG_ISR0 0x410
-#define REG_ISR1 0x414
-#define REG_IER0 0x418
-#define REG_MBOX_MAP 0x420
-#define REG_HW_MAP 0x42C
-#define REG_IDR 0x444
-
-#define CSR_MEMORY_SPACE_ENABLE 0x00000002
-#define CSR_PCI_MASTER_ENABLE 0x00000004
-
-#define P1_BST_OFF 0x04
-
-#define PX_ERR_ERR_STATUS 0x01000000
-
-#define PX_MISC_CSR_MAX_RETRY_MASK 0x00000F00
-#define PX_MISC_CSR_MAX_RETRY 0x00000F00
-#define PX_MISC_REG_BAR_ENABLE 0x00008000
-#define PB_MISC_TEA_ENABLE 0x00000010
-#define PB_MISC_MAC_TEA 0x00000040
-
-#define P1_TGT_IMAGE_OFF 0x010
-#define PX_TGT_CSR_IMG_EN 0x80000000
-#define PX_TGT_CSR_TA_EN 0x40000000
-#define PX_TGT_CSR_BAR_EN 0x20000000
-#define PX_TGT_CSR_MD_EN 0x10000000
-#define PX_TGT_CSR_MODE 0x00800000
-#define PX_TGT_CSR_DEST 0x00400000
-#define PX_TGT_CSR_MEM_IO 0x00200000
-#define PX_TGT_CSR_GBL 0x00080000
-#define PX_TGT_CSR_CL 0x00040000
-#define PX_TGT_CSR_PRKEEP 0x00000080
-
-#define PX_TGT_CSR_BS_MASK 0x0F000000
-#define PX_TGT_MEM_IO 0x00200000
-#define PX_TGT_CSR_RTT_MASK 0x001F0000
-#define PX_TGT_CSR_RTT_READ 0x000A0000
-#define PX_TGT_CSR_WTT_MASK 0x00001F00
-#define PX_TGT_CSR_WTT_WFLUSH 0x00000200
-#define PX_TGT_CSR_END_MASK 0x00000060
-#define PX_TGT_CSR_BIG_END 0x00000040
-#define PX_TGT_CSR_TRUE_LEND 0x00000060
-#define PX_TGT_CSR_RDAMT_MASK 0x00000007
-
-#define PX_TGT_CSR_BS_64MB 0xa
-#define PX_TGT_CSR_BS_16MB 0x8
-
-#define PX_TGT_USE_MEM_IO 1
-#define PX_TGT_NOT_MEM_IO 0
-
-#define PB_SLAVE_IMAGE_OFF 0x010
-#define PB_SLAVE_CSR_IMG_EN 0x80000000
-#define PB_SLAVE_CSR_TA_EN 0x40000000
-#define PB_SLAVE_CSR_MD_EN 0x20000000
-#define PB_SLAVE_CSR_MODE 0x00800000
-#define PB_SLAVE_CSR_DEST 0x00400000
-#define PB_SLAVE_CSR_MEM_IO 0x00200000
-#define PB_SLAVE_CSR_PRKEEP 0x00000080
-
-#define PB_SLAVE_CSR_BS_MASK 0x1F000000
-#define PB_SLAVE_CSR_END_MASK 0x00000060
-#define PB_SLAVE_CSR_BIG_END 0x00000040
-#define PB_SLAVE_CSR_TRUE_LEND 0x00000060
-#define PB_SLAVE_CSR_RDAMT_MASK 0x00000007
-
-#define PB_SLAVE_USE_MEM_IO 1
-#define PB_SLAVE_NOT_MEM_IO 0
-
-
-#define MISC_CSR_PCI1_LOCK 0x00000080
-
-#define I2C_CSR_ADDR 0xFF000000 /* Specifies I2C Device Address to be Accessed */
-#define I2C_CSR_DATA 0x00FF0000 /* Specifies the Required Data for a Write */
-#define I2C_CSR_DEV_CODE 0x0000F000 /* Device Select. I2C 4-bit Device Code */
-#define I2C_CSR_CS 0x00000E00 /* Chip Select */
-#define I2C_CSR_RW 0x00000100 /* Read/Write */
-#define I2C_CSR_ACT 0x00000080 /* I2C Interface Active */
-#define I2C_CSR_ERR 0x00000040 /* Error */
-
-#define I2C_EEPROM_DEV 0xa
-#define I2C_EEPROM_CHIP_SEL 0
-
-#define I2C_READ 0
-#define I2C_WRITE 1
-
-#define RESET_CSR_EEPROM_LOAD 0x00000010
-
-#define ISR_CLEAR_ALL 0xFFFFFFFF
-
-#define IER0_DMA_INTS_EN 0x0F000000
-#define IER0_PCI_1_EN 0x00400000
-#define IER0_HW_INTS_EN 0x003F0000
-#define IER0_MB_INTS_EN 0x000000FF
-#define IER0_DEFAULT (IER0_DMA_INTS_EN | IER0_PCI_1_EN | IER0_HW_INTS_EN | IER0_MB_INTS_EN)
-
-#define MBOX_MAP_TO_INT4 0xCCCCCCCC
-
-#define HW_MAP_HW4_TO_INT4 0x000C0000
-
-#define IDR_PCI_A_OUT 0x40000000
-#define IDR_MBOX_OUT 0x10000000
-
-
-int pci_read_config_byte(int bus, int dev, int fn, int reg, unsigned char* val);
-int pci_write_config_byte(int bus, int dev, int fn, int reg, unsigned char val);
-int pci_read_config_word(int bus, int dev, int fn, int reg, unsigned short* val);
-int pci_write_config_word(int bus, int dev, int fn, int reg, unsigned short val);
-int pci_read_config_dword(int bus, int dev, int fn, int reg, unsigned long* val);
-int pci_write_config_dword(int bus, int dev, int fn, int reg, unsigned long val);
-
-unsigned int PowerSpanRead(unsigned int theOffset);
-void PowerSpanWrite(unsigned int theOffset, unsigned int theValue);
-
-int I2CAccess(unsigned char theI2CAddress, unsigned char theDevCode, unsigned char theChipSel, unsigned char* theValue, int RWFlag);
-
-int PCIWriteConfig(int bus, int dev, int fn, int reg, int width, unsigned long val);
-int PCIReadConfig(int bus, int dev, int fn, int reg, int width, unsigned long* val);
-
-int SetSlaveImage(int theImageIndex, unsigned int theBlockSize, int theMemIOFlag, int theEndianness, unsigned int theLocalBaseAddr, unsigned int thePCIBaseAddr);
-int SetTargetImage(int theImageIndex, unsigned int theBlockSize, int theMemIOFlag, int theEndianness, unsigned int theLocalBaseAddr, unsigned int thePCIBaseAddr);
-
-#endif
diff --git a/board/amirix/ap1000/serial.c b/board/amirix/ap1000/serial.c
deleted file mode 100644
index 87003be..0000000
--- a/board/amirix/ap1000/serial.c
+++ /dev/null
@@ -1,111 +0,0 @@
-/*
- * (C) Copyright 2002
- * Peter De Schrijver (p2 at mind.be), Mind Linux Solutions, NV.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-#include <common.h>
-#include <asm/u-boot.h>
-#include <asm/processor.h>
-#include <command.h>
-#include <config.h>
-
-#include <ns16550.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-const NS16550_t COM_PORTS[] =
- { (NS16550_t) CONFIG_SYS_NS16550_COM1, (NS16550_t) CONFIG_SYS_NS16550_COM2 };
-
-#undef CONFIG_SYS_DUART_CHAN
-#define CONFIG_SYS_DUART_CHAN gComPort
-static int gComPort = 0;
-
-int serial_init (void)
-{
- int clock_divisor = CONFIG_SYS_NS16550_CLK / 16 / gd->baudrate;
-
- (void) NS16550_init (COM_PORTS[0], clock_divisor);
- gComPort = 0;
-
- return 0;
-}
-
-void serial_putc (const char c)
-{
- if (c == '\n') {
- NS16550_putc (COM_PORTS[CONFIG_SYS_DUART_CHAN], '\r');
- }
-
- NS16550_putc (COM_PORTS[CONFIG_SYS_DUART_CHAN], c);
-}
-
-int serial_getc (void)
-{
- return NS16550_getc (COM_PORTS[CONFIG_SYS_DUART_CHAN]);
-}
-
-int serial_tstc (void)
-{
- return NS16550_tstc (COM_PORTS[CONFIG_SYS_DUART_CHAN]);
-}
-
-void serial_setbrg (void)
-{
- int clock_divisor = CONFIG_SYS_NS16550_CLK / 16 / gd->baudrate;
-
-#ifdef CONFIG_SYS_INIT_CHAN1
- NS16550_reinit (COM_PORTS[0], clock_divisor);
-#endif
-#ifdef CONFIG_SYS_INIT_CHAN2
- NS16550_reinit (COM_PORTS[1], clock_divisor);
-#endif
-}
-
-void serial_puts (const char *s)
-{
- while (*s) {
- serial_putc (*s++);
- }
-}
-
-#if defined(CONFIG_CMD_KGDB)
-void kgdb_serial_init (void)
-{
-}
-
-void putDebugChar (int c)
-{
- serial_putc (c);
-}
-
-void putDebugStr (const char *str)
-{
- serial_puts (str);
-}
-
-int getDebugChar (void)
-{
- return serial_getc ();
-}
-
-void kgdb_interruptible (int yes)
-{
- return;
-}
-#endif
diff --git a/board/amirix/ap1000/u-boot.lds b/board/amirix/ap1000/u-boot.lds
deleted file mode 100644
index cd8f5ce..0000000
--- a/board/amirix/ap1000/u-boot.lds
+++ /dev/null
@@ -1,96 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- arch/powerpc/cpu/ppc4xx/start.o (.text)
- board/amirix/ap1000/init.o (.text)
- *(.text*)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
- }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- _GOT2_TABLE_ = .;
- KEEP(*(.got2))
- KEEP(*(.got))
- PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
- _FIXUP_TABLE_ = .;
- KEEP(*(.fixup))
- }
- __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data*)
- *(.sdata*)
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss (NOLOAD) :
- {
- *(.bss*)
- *(.sbss*)
- *(COMMON)
- . = ALIGN(4);
- }
- __bss_end__ = . ;
- PROVIDE (end = .);
-}
diff --git a/boards.cfg b/boards.cfg
index 226c7cb..7d4fe39 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -1000,7 +1000,6 @@ walnut powerpc ppc4xx walnut amcc
yellowstone powerpc ppc4xx yosemite amcc - yosemite:YELLOWSTONE
yosemite powerpc ppc4xx yosemite amcc - yosemite:YOSEMITE
yucca powerpc ppc4xx - amcc
-AP1000 powerpc ppc4xx ap1000 amirix
fx12mm powerpc ppc4xx fx12mm avnet - fx12mm:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000,INIT_TLB=board/xilinx/ppc405-generic/init.o
fx12mm_flash powerpc ppc4xx fx12mm avnet - fx12mm:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC,INIT_TLB=board/xilinx/ppc405-generic/init.o
v5fx30teval powerpc ppc4xx v5fx30teval avnet - v5fx30teval:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000,BOOT_FROM_XMD=1,INIT_TLB=board/xilinx/ppc440-generic/init.o
diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c
index 94b2a41..2d4da4b 100644
--- a/drivers/net/e1000.c
+++ b/drivers/net/e1000.c
@@ -135,7 +135,6 @@ static void e1000_set_media_type(struct e1000_hw *hw);
static int32_t e1000_swfw_sync_acquire(struct e1000_hw *hw, uint16_t mask);
static int32_t e1000_check_phy_reset_block(struct e1000_hw *hw);
-#ifndef CONFIG_AP1000 /* remove for warnings */
static int32_t e1000_read_eeprom(struct e1000_hw *hw, uint16_t offset,
uint16_t words,
uint16_t *data);
@@ -942,7 +941,6 @@ e1000_set_phy_mode(struct e1000_hw *hw)
return E1000_SUCCESS;
}
-#endif /* #ifndef CONFIG_AP1000 */
/***************************************************************************
*
@@ -1123,7 +1121,6 @@ static boolean_t e1000_is_second_port(struct e1000_hw *hw)
static int
e1000_read_mac_addr(struct eth_device *nic)
{
-#ifndef CONFIG_AP1000
struct e1000_hw *hw = nic->priv;
uint16_t offset;
uint16_t eeprom_data;
@@ -1152,31 +1149,6 @@ e1000_read_mac_addr(struct eth_device *nic)
memcpy (nic->enetaddr, fb_mac, NODE_ADDRESS_SIZE);
}
#endif
-#else
- /*
- * The AP1000's e1000 has no eeprom; the MAC address is stored in the
- * environment variables. Currently this does not support the addition
- * of a PMC e1000 card, which is certainly a possibility, so this should
- * be updated to properly use the env variable only for the onboard e1000
- */
-
- int ii;
- char *s, *e;
-
- DEBUGFUNC();
-
- s = getenv ("ethaddr");
- if (s == NULL) {
- return -E1000_ERR_EEPROM;
- } else {
- for(ii = 0; ii < 6; ii++) {
- nic->enetaddr[ii] = s ? simple_strtoul (s, &e, 16) : 0;
- if (s){
- s = (*e) ? e + 1 : e;
- }
- }
- }
-#endif
return 0;
}
@@ -1808,7 +1780,6 @@ e1000_setup_link(struct eth_device *nic)
if (e1000_check_phy_reset_block(hw))
return E1000_SUCCESS;
-#ifndef CONFIG_AP1000
/* Read and store word 0x0F of the EEPROM. This word contains bits
* that determine the hardware's default PAUSE (flow control) mode,
* a bit that determines whether the HW defaults to enabling or
@@ -1822,11 +1793,6 @@ e1000_setup_link(struct eth_device *nic)
DEBUGOUT("EEPROM Read Error\n");
return -E1000_ERR_EEPROM;
}
-#else
- /* we have to hardcode the proper value for our hardware. */
- /* this value is for the 82540EM pci card used for prototyping, and it works. */
- eeprom_data = 0xb220;
-#endif
if (hw->fc == e1000_fc_default) {
switch (hw->mac_type) {
@@ -1836,16 +1802,12 @@ e1000_setup_link(struct eth_device *nic)
hw->fc = e1000_fc_full;
break;
default:
-#ifndef CONFIG_AP1000
ret_val = e1000_read_eeprom(hw,
EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
if (ret_val) {
DEBUGOUT("EEPROM Read Error\n");
return -E1000_ERR_EEPROM;
}
-#else
- eeprom_data = 0xb220;
-#endif
if ((eeprom_data & EEPROM_WORD0F_PAUSE_MASK) == 0)
hw->fc = e1000_fc_none;
else if ((eeprom_data & EEPROM_WORD0F_PAUSE_MASK) ==
@@ -2109,12 +2071,10 @@ e1000_copper_link_preconfig(struct e1000_hw *hw)
}
DEBUGOUT("Phy ID = %x \n", hw->phy_id);
-#ifndef CONFIG_AP1000
/* Set PHY to class A mode (if necessary) */
ret_val = e1000_set_phy_mode(hw);
if (ret_val)
return ret_val;
-#endif
if ((hw->mac_type == e1000_82545_rev_3) ||
(hw->mac_type == e1000_82546_rev_3)) {
ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL,
@@ -5242,7 +5202,7 @@ e1000_initialize(bd_t * bis)
list_add_tail(&hw->list_node, &e1000_hw_list);
/* Validate the EEPROM and get chipset information */
-#if !(defined(CONFIG_AP1000) || defined(CONFIG_MVBC_1G))
+#if !defined(CONFIG_MVBC_1G)
if (e1000_init_eeprom_params(hw)) {
E1000_ERR(nic, "EEPROM is invalid!\n");
continue;
diff --git a/include/common.h b/include/common.h
index 100e550..fc48d3b 100644
--- a/include/common.h
+++ b/include/common.h
@@ -41,7 +41,7 @@ typedef volatile unsigned char vu_char;
#include <linux/string.h>
#include <asm/ptrace.h>
#include <stdarg.h>
-#if defined(CONFIG_PCI) && (defined(CONFIG_4xx) && !defined(CONFIG_AP1000))
+#if defined(CONFIG_PCI) && defined(CONFIG_4xx)
#include <pci.h>
#endif
#if defined(CONFIG_8xx)
@@ -387,7 +387,7 @@ void pci_init (void);
void pci_init_board(void);
void pciinfo (int, int);
-#if defined(CONFIG_PCI) && (defined(CONFIG_4xx) && !defined(CONFIG_AP1000))
+#if defined(CONFIG_PCI) && defined(CONFIG_4xx)
int pci_pre_init (struct pci_controller *);
int is_pci_host (struct pci_controller *);
#endif
diff --git a/include/configs/AP1000.h b/include/configs/AP1000.h
deleted file mode 100644
index 09cfef6..0000000
--- a/include/configs/AP1000.h
+++ /dev/null
@@ -1,247 +0,0 @@
-/*
- * AMIRIX.h: AMIRIX specific config options
- *
- * Author : Frank Smith (smith at amirix dot com)
- *
- * Derived from : other configuration header files in this tree
- *
- * This software may be used and distributed according to the terms of
- * the GNU General Public License (GPL) version 2, incorporated herein by
- * reference. Drivers based on or derived from this code fall under the GPL
- * and must retain the authorship, copyright and this license notice. This
- * file is not a complete program and may only be used when the entire
- * program is licensed under the GPL.
- *
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-
-#define CONFIG_405 1 /* This is a PPC405 CPU */
-#define CONFIG_4xx 1 /* ...member of PPC4xx family */
-
-#define CONFIG_AP1000 1 /* ...on an AP1000 board */
-
-/*
- * Start at bottom of RAM, but at an aliased address so that it looks
- * like it's not in RAM. This is a bit of voodoo to allow it to be
- * run from RAM instead of Flash.
- */
-#define CONFIG_SYS_TEXT_BASE 0x08000000
-#define CONFIG_SYS_LDSCRIPT "board/amirix/ap1000/u-boot.lds"
-
-#define CONFIG_PCI 1
-
-#define CONFIG_SYS_HUSH_PARSER 1 /* use "hush" command parser */
-#define CONFIG_SYS_PROMPT "0> "
-
-#define CONFIG_COMMAND_EDIT 1
-#define CONFIG_COMPLETE_ADDRESSES 1
-
-#define CONFIG_ENV_IS_IN_FLASH 1
-#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
-
-#ifdef CONFIG_ENV_IS_IN_NVRAM
-#undef CONFIG_ENV_IS_IN_FLASH
-#else
-#ifdef CONFIG_ENV_IS_IN_FLASH
-#undef CONFIG_ENV_IS_IN_NVRAM
-#endif
-#endif
-
-#define CONFIG_BAUDRATE 57600
-#define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */
-
-#define CONFIG_BOOTCOMMAND "" /* autoboot command */
-
-#define CONFIG_BOOTARGS "console=ttyS0,57600"
-
-#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
-#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_ASKENV
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_ELF
-#define CONFIG_CMD_IRQ
-#define CONFIG_CMD_MVENV
-#define CONFIG_CMD_PCI
-#define CONFIG_CMD_PING
-
-
-#undef CONFIG_WATCHDOG /* watchdog disabled */
-
-#define CONFIG_SYS_CLK_FREQ 30000000
-
-#define CONFIG_SPD_EEPROM 1 /* use SPD EEPROM for setup */
-
-/*
- * I2C
- */
-#define CONFIG_HARD_I2C /* I2C with hardware support */
-#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
-#define CONFIG_SYS_I2C_SLAVE 0x7F
-#define CONFIG_SYS_I2C_SPEED 400000
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
-#else
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-#endif
-/* usually: (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+4+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-
-#define CONFIG_SYS_ALT_MEMTEST 1
-#define CONFIG_SYS_MEMTEST_START 0x00400000 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END 0x01000000 /* 4 ... 16 MB in DRAM */
-
-/*
- * If CONFIG_SYS_EXT_SERIAL_CLOCK, then the UART divisor is 1.
- * If CONFIG_SYS_405_UART_ERRATA_59, then UART divisor is 31.
- * Otherwise, UART divisor is determined by CPU Clock and CONFIG_SYS_BASE_BAUD value.
- * The Linux BASE_BAUD define should match this configuration.
- * baseBaud = cpuClock/(uartDivisor*16)
- * If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock,
- * set Linux BASE_BAUD to 403200.
- */
-#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* external serial clock */
-#undef CONFIG_SYS_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */
-
-#define CONFIG_SYS_NS16550_CLK 40000000
-#define CONFIG_SYS_DUART_CHAN 0
-#define CONFIG_SYS_NS16550_COM1 (0x4C000000 + 0x1000)
-#define CONFIG_SYS_NS16550_COM2 (0x4C800000 + 0x1000)
-#define CONFIG_SYS_NS16550_REG_SIZE 4
-#define CONFIG_SYS_NS16550 1
-#define CONFIG_SYS_INIT_CHAN1 1
-#define CONFIG_SYS_INIT_CHAN2 0
-
-/* The following table includes the supported baudrates */
-#define CONFIG_SYS_BAUDRATE_TABLE \
- {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
-
-#define CONFIG_SYS_LOAD_ADDR 0x00200000 /* default load address */
-#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
-/*-----------------------------------------------------------------------
- * Start addresses for the final memory configuration
- * (Set up by the startup code)
- * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
- */
-#define CONFIG_SYS_SDRAM_BASE 0x00000000
-#define CONFIG_SYS_FLASH_BASE 0x20000000
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_MONITOR_LEN (192 * 1024) /* Reserve 196 kB for Monitor */
-#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
-
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
-/*-----------------------------------------------------------------------
- * FLASH organization
- */
-#define CONFIG_SYS_FLASH_CFI 1
-#define CONFIG_SYS_PROGFLASH_BASE CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_CONFFLASH_BASE 0x24000000
-
-#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
-#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
-
-#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
-
-#define CONFIG_SYS_FLASH_PROTECTION 1 /* use hardware protection */
-
-/* BEG ENVIRONNEMENT FLASH */
-#ifdef CONFIG_ENV_IS_IN_FLASH
-#define CONFIG_ENV_OFFSET 0x00040000 /* Offset of Environment Sector */
-#define CONFIG_ENV_SIZE 0x1000 /* Total Size of Environment Sector */
-#define CONFIG_ENV_SECT_SIZE 0x20000 /* see README - env sector total size */
-#endif
-/* END ENVIRONNEMENT FLASH */
-/*-----------------------------------------------------------------------
- * NVRAM organization
- */
-#define CONFIG_SYS_NVRAM_BASE_ADDR 0xf0000000 /* NVRAM base address */
-#define CONFIG_SYS_NVRAM_SIZE 0x1ff8 /* NVRAM size */
-
-#ifdef CONFIG_ENV_IS_IN_NVRAM
-#define CONFIG_ENV_SIZE 0x1000 /* Size of Environment vars */
-#define CONFIG_ENV_ADDR \
- (CONFIG_SYS_NVRAM_BASE_ADDR+CONFIG_SYS_NVRAM_SIZE-CONFIG_ENV_SIZE) /* Env */
-#endif
-
-/*
- * Init Memory Controller:
- *
- * BR0/1 and OR0/1 (FLASH)
- */
-
-#define FLASH_BASE0_PRELIM CONFIG_SYS_FLASH_BASE /* FLASH bank #0 */
-#define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */
-
-/* Configuration Port location */
-#define CONFIG_PORT_ADDR 0xF0000500
-
-/*-----------------------------------------------------------------------
- * Definitions for initial stack pointer and data area (in DPRAM)
- */
-
-#define CONFIG_SYS_INIT_RAM_ADDR 0x400000 /* inside of SDRAM */
-#define CONFIG_SYS_INIT_RAM_SIZE 0x2000 /* Size of used area in RAM */
-#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-
-/*-----------------------------------------------------------------------
- * Definitions for Serial Presence Detect EEPROM address
- * (to get SDRAM settings)
- */
-#define SPD_EEPROM_ADDRESS 0x50
-
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
-#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
-#endif
-
-/* JFFS2 stuff */
-
-#define CONFIG_SYS_JFFS2_FIRST_BANK 0
-#define CONFIG_SYS_JFFS2_NUM_BANKS 1
-#define CONFIG_SYS_JFFS2_FIRST_SECTOR 1
-
-#define CONFIG_E1000
-
-#define CONFIG_SYS_ETH_DEV_FN 0x0800
-#define CONFIG_SYS_ETH_IOBASE 0x31000000
-#define CONFIG_SYS_ETH_MEMBASE 0x32000000
-
-#endif /* __CONFIG_H */
--
1.7.12.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [U-Boot] [PATCH] mpc82xx: Remove BMW board port
2012-09-19 13:18 [U-Boot] [PATCH] ppc4xx: Remove ML2 board support Stefan Roese
2012-09-19 13:18 ` [U-Boot] [PATCH] ppc4xx: Remove AP1000 " Stefan Roese
@ 2012-09-19 13:18 ` Stefan Roese
2012-09-19 22:52 ` Marek Vasut
2012-10-17 14:56 ` [U-Boot] " Tom Rini
2012-09-19 22:53 ` [U-Boot] [PATCH] ppc4xx: Remove ML2 board support Marek Vasut
2 siblings, 2 replies; 10+ messages in thread
From: Stefan Roese @ 2012-09-19 13:18 UTC (permalink / raw)
To: u-boot
As the board seems to be unmaintained for some time, lets remove
the support in mainline completely.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: James F. Dougherty <jfd@broadcom.com>
Cc: Wolfgang Denk <wd@denx.de>
---
arch/powerpc/cpu/mpc824x/cpu_init.c | 4 +-
arch/powerpc/cpu/mpc824x/start.S | 9 +-
board/bmw/Makefile | 50 --
board/bmw/README | 331 ----------
board/bmw/bmw.c | 159 -----
board/bmw/bmw.h | 86 ---
board/bmw/config.mk | 30 -
board/bmw/early_init.S | 1170 -----------------------------------
board/bmw/flash.c | 779 -----------------------
board/bmw/m48t59y.c | 324 ----------
board/bmw/m48t59y.h | 57 --
board/bmw/ns16550.c | 57 --
board/bmw/ns16550.h | 79 ---
board/bmw/serial.c | 81 ---
boards.cfg | 1 -
include/configs/BMW.h | 302 ---------
16 files changed, 4 insertions(+), 3515 deletions(-)
delete mode 100644 board/bmw/Makefile
delete mode 100644 board/bmw/README
delete mode 100644 board/bmw/bmw.c
delete mode 100644 board/bmw/bmw.h
delete mode 100644 board/bmw/config.mk
delete mode 100644 board/bmw/early_init.S
delete mode 100644 board/bmw/flash.c
delete mode 100644 board/bmw/m48t59y.c
delete mode 100644 board/bmw/m48t59y.h
delete mode 100644 board/bmw/ns16550.c
delete mode 100644 board/bmw/ns16550.h
delete mode 100644 board/bmw/serial.c
delete mode 100644 include/configs/BMW.h
diff --git a/arch/powerpc/cpu/mpc824x/cpu_init.c b/arch/powerpc/cpu/mpc824x/cpu_init.c
index 395f776..cfc665d 100644
--- a/arch/powerpc/cpu/mpc824x/cpu_init.c
+++ b/arch/powerpc/cpu/mpc824x/cpu_init.c
@@ -63,7 +63,7 @@ void
cpu_init_f (void)
{
/* MOUSSE board is initialized in asm */
-#if !defined(CONFIG_MOUSSE) && !defined(CONFIG_BMW)
+#if !defined(CONFIG_MOUSSE)
register unsigned long val;
CONFIG_WRITE_HALFWORD(PCICR, 0x06); /* Bus Master, respond to PCI memory space acesses*/
/* CONFIG_WRITE_HALFWORD(PCISR, 0xffff); */ /*reset PCISR*/
@@ -321,7 +321,7 @@ cpu_init_f (void)
CONFIG_WRITE_WORD(MCCR1, val | MCCR1_MEMGO); /* set memory access going */
__asm__ __volatile__("eieio");
-#endif /* !CONFIG_MOUSSE && !CONFIG_BMW */
+#endif /* !CONFIG_MOUSSE */
}
diff --git a/arch/powerpc/cpu/mpc824x/start.S b/arch/powerpc/cpu/mpc824x/start.S
index 70db73e..076df70 100644
--- a/arch/powerpc/cpu/mpc824x/start.S
+++ b/arch/powerpc/cpu/mpc824x/start.S
@@ -113,9 +113,6 @@ _start:
in_flash:
-#if defined(CONFIG_BMW)
- bl early_init_f /* Must be ASM: no stack yet! */
-#endif
/*
* Setup BATs - cannot be done in C since we don't have a stack yet
*/
@@ -126,7 +123,7 @@ in_flash:
mfmsr r3
ori r3, r3, (MSR_IR | MSR_DR)
mtmsr r3
-#if !defined(CONFIG_BMW)
+
/* Enable and invalidate data cache.
*/
mfspr r3, HID0
@@ -158,7 +155,7 @@ in_flash:
ori r3, r3, 0x0080
sync
mtspr 1011, r3
-#endif /* !CONFIG_BMW */
+
/*
* Thisk the stack pointer *somewhere* sensible. Doesnt
* matter much where as we'll move it when we relocate
@@ -498,7 +495,6 @@ relocate_code:
bdnz 3b
4:
-#if !defined(CONFIG_BMW)
/* Unlock the data cache and invalidate locked area */
xor r0, r0, r0
mtspr 1011, r0
@@ -510,7 +506,6 @@ relocate_code:
dcbi r0, r4
addi r4, r4, 32
bdnz 41b
-#endif
/*
* Now flush the cache: note that we must start from a cache aligned
diff --git a/board/bmw/Makefile b/board/bmw/Makefile
deleted file mode 100644
index 4f88efa..0000000
--- a/board/bmw/Makefile
+++ /dev/null
@@ -1,50 +0,0 @@
-#
-# (C) Copyright 2006
-# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
-#
-# (C) Copyright 2002
-# James F. Dougherty, Broadcom Corporation, jfd at broadcom.com
-# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o ns16550.o serial.o m48t59y.o
-
-SOBJS = early_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
diff --git a/board/bmw/README b/board/bmw/README
deleted file mode 100644
index 1fbef79..0000000
--- a/board/bmw/README
+++ /dev/null
@@ -1,331 +0,0 @@
-Broadcom 95xx BMW CPCI Platform
-
-Overview
-=========
-BMW is an MPC8245 system controller featuring:
-* 3U CPCI Form Factor
-* BCM5703 Gigabit Ethernet
-* M48T59Y NVRAM
-* 16MB DOC
-* DIP Socket for Socketed DOC up to 1GB
-* 64MB SDRAM
-* LCD Display
-* Configurable Jumper options for 66,85, and 100Mhz memory bus
-
-
-BMW System Address Map
-======================
-BMW uses the MPC8245 CHRP Address MAP B found in the MPC8245 Users Manual
-(P.121, Section 3.1 Address Maps, Address Map B). Other I/O devices found
-onboard the processor module are listed briefly below:
-
-0x00000000 - 0x40000000 - 64MB SDRAM SIMM
- (Unregistered PC-100 SDRAM DIMM Module)
-
-0xFF000000 - 0xFF001FFF - M-Systems DiskOnChip (TM) 2000
- TSOP 16MB (MD2211-D16-V3)
-
-0x70000000 - 0x70001FFF - M-Systems DiskOnChip (TM) 2000
- DIP32 (Socketed 16MB - 1GB ) *
- NOTE: this is not populated on all systems.
-
-0x7c000000 - 0x7c000000 - Reset Register
- (Write 0 to reset)
-
-0x7c000001 - 0x7c000001 - System LED
- (Clear Bit 7 to turn on, set to shut off)
-
-0x7c000002 - 0x7c000002 - M48T59 Watchdog IRQ3
- (Clear bit 7 to reset, set to assert IRQ3)
-
-0x7c000003 - 0x7c000003 - M48T59 Write-Protect Register
- (Clear bit 7 to make R/W, set to make R/O)
-
-0x7c002000 - 0x7c002003 - Infineon OSRAM DLR2416 4 Character
- 5x7 Dot Matrix Alphanumeric Display
- (Each byte sets the appropriate character)
-
-0x7c004000 - 0x7c005FF0 - SGS-THOMSON M48T59Y 8K NVRAM/RTC
- NVRAM Memory Region
-
-0x7c005FF0 - 0x7c005FFF - SGS-THOMSON M48T59Y 8K NVRAM/RTC
- Realtime Clock Registers
-
-0xFFF00000 - 0xFFF80000 - 512K PLCC32 BootRom
- (AMD AM29F040, ST 29W040B)
-
-0xFFF00100 - System Reset Vector
-
-
-IO/MMU (BAT) Configuration
-======================
-The following Block-Address-Translation (BAT) configuration
-is recommended to access all I/O devices.
-
-#define CONFIG_SYS_IBAT0L (0x00000000 | BATL_PP_10 | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT0U (0x00000000 | BATU_BL_256M | BATU_VS | BATU_VP)
-
-#define CONFIG_SYS_IBAT1L (0x70000000 | BATL_PP_10 | BATL_CACHEINHIBIT)
-#define CONFIG_SYS_IBAT1U (0x70000000 | BATU_BL_256M | BATU_VS | BATU_VP)
-
-#define CONFIG_SYS_IBAT2L (0x80000000 | BATL_PP_10 | BATL_CACHEINHIBIT)
-#define CONFIG_SYS_IBAT2U (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP)
-
-#define CONFIG_SYS_IBAT3L (0xF0000000 | BATL_PP_10 | BATL_CACHEINHIBIT)
-#define CONFIG_SYS_IBAT3U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
-
-#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
-#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
-#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
-#define CONFIG_SYS_DBAT2L CONFIG_SYS_IBAT2L
-#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
-#define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L
-#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
-
-
-Interrupt Mappings
-======================
-BMW uses MPC8245 discrete mode interrupts. With the following
-hardwired mappings:
-
-BCM5701 10/100/1000 Ethernet IRQ1
-CompactPCI Interrupt A IRQ2
-RTC/Watchdog Interrupt IRQ3
-Internal NS16552 UART IRQ4
-
-
-Jumper Settings
-======================
-
-BMW has a jumper (JP600) for selecting 66, 85, or 100Mhz memory bus.
-A jumper (X) is a 0 bit.
-
-Hence 66= 10110
- 85= 11000
- 100= 10000
-
-Jumper Settings for various Speeds
-=======================
-J1 J2 J3 J4 J5
- X X 66Mhz
-=======================
-J1 J2 J3 J4 J5
- X X X 85Mhz
-=======================
-J1 J2 J3 J4 J5
- X X X X 100Mhz
-=======================
-
-Obviously, 100Mhz memory bus is recommended for optimum performance.
-
-
-U-Boot
-===============
-Broadcom BMW board is supported under config_BWM option.
-Supported features:
-
-- NVRAM setenv/getenv (used by Linux Kernel for configuration variables)
-- BCM570x TFTP file transfer support
-- LCD Display Support
-- DOC Support - (underway)
-
-
-U-Boot 1.2.0 (Aug 6 2002 - 17:44:48)
-
-CPU: MPC8245 Revision 16.20 at 264 MHz: 16 kB I-Cache 16 kB D-Cache
-Board: BMW MPC8245/KAHLUA2 - CHRP (MAP B)
-Built: Aug 6 2002 at 17:44:37
-Local Bus at 66 MHz
-DRAM: 64 MB
-FLASH: 4095 MB
-In: serial
-Out: serial
-Err: serial
-DOC: No DiskOnChip found
-Hit any key to stop autoboot: 0
-=>printenv
-bootdelay=5
-baudrate=9600
-clocks_in_mhz=1
-hostname=switch-2
-bootcmd=tftp 100000 vmlinux.img;bootm
-gateway=10.16.64.1
-ethaddr=00:00:10:18:10:10
-nfsroot=172.16.40.111:/boot/root-fs
-filesize=5ec8c
-netmask=255.255.240.0
-ipaddr=172.16.40.114
-serverip=172.16.40.111
-root=/dev/nfs
-stdin=serial
-stdout=serial
-stderr=serial
-
-Environment size: 315/8172 bytes
-=>boot
-
-
-DevTools
-========
-ELDK
- DENX Embedded Linux Development Kit
-
-ROM Emulator
- Grammar Engine PROMICE P1160-90-AI21E (2MBx8bit, 90ns access time)
- Grammar Engine PL32E 32Pin PLCC Emulation cables
- Grammar Engine 3VA8CON (3Volt adapter with Short cables)
- Grammar Engine FPNET PromICE Ethernet Adapters
-
-ICE
- WRS/EST VisionICE-II (PPC8240)
-
-
-=>reset
-
-
-U-Boot 1.2.0 (Aug 6 2002 - 17:44:48)
-
-CPU: MPC8245 Revision 16.20 at 264 MHz: 16 kB I-Cache 16 kB D-Cache
-Board: BMW MPC8245/KAHLUA2 - CHRP (MAP B)
-Built: Aug 6 2002 at 17:44:37
-Local Bus at 66 MHz
-DRAM: 64 MB
-FLASH: 4095 MB
-In: serial
-Out: serial
-Err: serial
-DOC: No DiskOnChip found
-Hit any key to stop autoboot: 0
-
-Broadcom BCM5701 1000Base-T: bus 0, device 13, function 0: MBAR=0x80100000
-BCM570x PCI Memory base address @0x80100000
-eth0:Broadcom BCM5701 1000Base-T: 100 Mbps half duplex link up, flow control OFF
-eth0: Broadcom BCM5701 1000Base-T @0x80100000,node addr 000010181010
-eth0: BCM5700 with Broadcom BCM5701 Integrated Copper transceiver found
-eth0: 32-bit PCI 33MHz, MTU: 1500,Rx Checksum ON
-ARP broadcast 1
-TFTP from server 172.16.40.111; our IP address is 172.16.40.114
-Filename 'vmlinux.img'.
-Load address: 0x100000
-Loading: #################################################################
- ####################################T #############################
- ######################
-done
-Bytes transferred = 777199 (bdbef hex)
-
-eth0:Broadcom BCM5701 1000Base-T,HALT,POWER DOWN,done - offline.
-## Booting image at 00100000 ...
- Image Name: vmlinux.bin.gz
- Created: 2002-08-06 6:30:13 UTC
- Image Type: PowerPC Linux Kernel Image (gzip compressed)
- Data Size: 777135 Bytes = 758 kB = 0 MB
- Load Address: 00000000
- Entry Point: 00000000
- Verifying Checksum ... OK
- Uncompressing Kernel Image ... OK
-Memory BAT mapping: BAT2=64Mb, BAT3=0Mb, residual: 0Mb
-Linux version 2.4.19-rc3 (jfd at que) (gcc version 2.95.3 20010111 (prerelease/franzo/20010111)) #168 Mon Aug 5 23:29:20 PDT 2002
-CPU:82xx: 32 I-Cache Block Size, 32 D-Cache Block Size PVR: 0x810000
-U-Boot Environment: 0xc01b08f0
-IP PNP: 802.3 Ethernet Address=<0:0:10:18:10:10>
-cpu0: MPC8245/KAHLUA-II : BMW Platform : 64MB RAM: BPLD Rev. 6e
-NOTICE: mounting root file system via NFS
-IP PNP: switch-2: eth0 IP 172.16.40.114/255.255.240.0 gateway 10.16.64.1 server 172.16.40.111
-On node 0 totalpages: 16384
-zone(0): 16384 pages.
-zone(1): 0 pages.
-zone(2): 0 pages.
-Kernel command line: console=ttyS0,9600 ip=172.16.40.114:172.16.40.111:10.16.64.1:255.255.240.0:switch-2:eth0 root=/dev/nfs rw nfsroot=172.16.40.111:/boot/root-fs,timeo=200,retrans=500 nfsaddrs=172.16.40.114:172.16.40.111
-root_dev_setup:/dev/nfs or 00:ff
-time_init: decrementer frequency = 16.501145 MHz
-Calibrating delay loop... 175.71 BogoMIPS
-Memory: 62572k available (1396k kernel code, 436k data, 100k init, 0k highmem)
-Dentry cache hash table entries: 8192 (order: 4, 65536 bytes)
-Inode cache hash table entries: 4096 (order: 3, 32768 bytes)
-Mount-cache hash table entries: 1024 (order: 1, 8192 bytes)
-Buffer-cache hash table entries: 4096 (order: 2, 16384 bytes)
-Page-cache hash table entries: 16384 (order: 4, 65536 bytes)
-POSIX conformance testing by UNIFIX
-PCI: Probing PCI hardware
-Linux NET4.0 for Linux 2.4
-Based upon Swansea University Computer Society NET3.039
-Initializing RT netlink socket
-Starting kswapd
-devfs: v1.12a (20020514) Richard Gooch (rgooch at atnf.csiro.au)
-devfs: devfs_debug: 0x0
-devfs: boot_options: 0x1
-Installing knfsd (copyright (C) 1996 okir at monad.swb.de).
-pty: 256 Unix98 ptys configured
-Serial driver version 5.05c (2001-07-08) with MANY_PORTS SHARE_IRQ SERIAL_PCI enabled
-Testing ttyS0 (0xf7f51500, 0xf7f51500)...
-Testing ttyS1 (0xfc004600, 0xfc004600)...
-ttyS00 at 0xf7f51500 (irq = 24) is a ST16650
-ttyS01 at 0xfc004600 (irq = 25) is a 16550A
-Real Time Clock Driver v1.10e
-RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize
-loop: loaded (max 8 devices)
-TFFS 5.1.1 Flash disk driver for DiskOnChip
-Copyright (C) 1998,2001 M-Systems Flash Disk Pioneers Ltd.
-DOC device(s) found: 1
-fl_init: registered device at major: 100
-fl_geninit: registered device at major: 100
-Partition check:
- fla: p1
-partition: /dev/fl/0: start_sect: 0,nr_sects: 32000 Fl_blk_size[]: 16000KB
-partition: /dev/fl/1: start_sect: 2,nr_sects: 31998 Fl_blk_size[]: 15999KB
-partition: /dev/fl/2: start_sect: 0,nr_sects: 0 Fl_blk_size[]: 0KB
-partition: /dev/fl/3: start_sect: 0,nr_sects: 0 Fl_blk_size[]: 0KB
-Broadcom Gigabit Ethernet Driver bcm5700 ver. 3.0.7 (07/17/02)
-eth0: Broadcom BCM5701 found at mem bfff0000, IRQ 1, node addr 000010181010
-eth0: Broadcom BCM5701 Integrated Copper transceiver found
-eth0: Scatter-gather ON, 64-bit DMA ON, Tx Checksum ON, Rx Checksum ON, 802.1Q VLAN ON
-bond0 registered without MII link monitoring, in bonding mode.
-rtc: unable to get misc minor
-NET4: Linux TCP/IP 1.0 for NET4.0
-IP Protocols: ICMP, UDP, TCP, IGMP
-IP: routing cache hash table of 512 buckets, 4Kbytes
-TCP: Hash tables configured (established 4096 bind 4096)
-bcm5700: eth0 NIC Link is UP, 100 Mbps half duplex
-IP-Config: Gateway not on directly connected network.
-NET4: Unix domain sockets 1.0/SMP for Linux NET4.0.
-802.1Q VLAN Support v1.7 Ben Greear <greearb@candelatech.com>
-All bugs added by David S. Miller <davem@redhat.com>
-Looking up port of RPC 100003/2 on 172.16.40.111
-Looking up port of RPC 100005/1 on 172.16.40.111
-VFS: Mounted root (nfs filesystem).
-Mounted devfs on /dev
-Freeing unused kernel memory: 100k init
-INIT: version 2.78 booting
-Mounting local filesystems...
-not mounted anything
-Setting up symlinks in /dev...done.
-Setting up extra devices in /dev...done.
-Starting devfsd...Started device management daemon for /dev
-INIT: Entering runlevel: 2
-Starting internet superserver: inetd.
-
-
-Welcome to Linux/PPC
-MPC8245/BMW
-
-
-switch-2 login: root
-Password:
-PAM_unix[49]: (login) session opened for user root by LOGIN(uid=0)
-Last login: Thu Nov 25 11:51:14 1920 on console
-
-
-Welcome to Linux/PPC
-MPC8245/BMW
-
-
-login[49]: ROOT LOGIN on `console'
-
-root at switch-2:~# cat /proc/cpuinfo
-cpu : 82xx
-revision : 16.20 (pvr 8081 1014)
-bogomips : 175.71
-vendor : Broadcom
-machine : BMW/MPC8245
-root at switch-2:~#
diff --git a/board/bmw/bmw.c b/board/bmw/bmw.c
deleted file mode 100644
index 5ba6c09..0000000
--- a/board/bmw/bmw.c
+++ /dev/null
@@ -1,159 +0,0 @@
-/*
- * (C) Copyright 2002
- * James F. Dougherty, Broadcom Corporation, jfd at broadcom.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <watchdog.h>
-#include <command.h>
-#include <malloc.h>
-#include <stdio_dev.h>
-#include <net.h>
-#include <timestamp.h>
-#include <dtt.h>
-#include <mpc824x.h>
-#include <asm/processor.h>
-#include <linux/mtd/doc2000.h>
-
-#include "bmw.h"
-#include "m48t59y.h"
-#include <pci.h>
-
-
-int checkboard(void)
-{
- ulong busfreq = get_bus_freq(0);
- char buf[32];
-
- puts ("Board: BMW MPC8245/KAHLUA2 - CHRP (MAP B)\n");
- printf("Built: %s at %s\n", U_BOOT_DATE, U_BOOT_TIME);
- /* printf("MPLD: Revision %d\n", SYS_REVID_GET()); */
- printf("Local Bus at %s MHz\n", strmhz(buf, busfreq));
- return 0;
-}
-
-phys_size_t initdram(int board_type)
-{
- return 64*1024*1024;
-}
-
-
-void
-get_tod(void)
-{
- int year, month, day, hour, minute, second;
-
- m48_tod_get(&year,
- &month,
- &day,
- &hour,
- &minute,
- &second);
-
- printf(" Current date/time: %d/%d/%d %d:%d:%d \n",
- month, day, year, hour, minute, second);
-
-}
-
-/*
- * EPIC, PCI, and I/O devices.
- * Initialize Mousse Platform, probe for PCI devices,
- * Query configuration parameters if not set.
- */
-int misc_init_f (void)
-{
-#if 0
- m48_tod_init(); /* Init SGS M48T59Y TOD/NVRAM */
- printf("RTC: M48T589 TOD/NVRAM (%d) bytes\n",
- TOD_NVRAM_SIZE);
- get_tod();
-#endif
-
- sys_led_msg("BOOT");
- return 0;
-}
-
-
-/*
- * Initialize PCI Devices, report devices found.
- */
-struct pci_controller hose;
-
-void pci_init_board (void)
-{
- pci_mpc824x_init(&hose);
- /* pci_dev_init(0); */
-}
-
-/*
- * Write characters to LCD display.
- * Note that the bytes for the first character is the last address.
- */
-void
-sys_led_msg(char* msg)
-{
- LED_REG(0) = msg[3];
- LED_REG(1) = msg[2];
- LED_REG(2) = msg[1];
- LED_REG(3) = msg[0];
-}
-
-#ifdef CONFIG_CMD_DOC
-/*
- * Map onboard TSOP-16MB DOC FLASH chip.
- */
-void doc_init (void)
-{
- doc_probe(DOC_BASE_ADDR);
-}
-#endif
-
-#define NV_ADDR ((volatile unsigned char *) CONFIG_ENV_ADDR)
-
-/* Read from NVRAM */
-void*
-nvram_read(void *dest, const long src, size_t count)
-{
- int i;
- volatile unsigned char* d = (unsigned char*)dest;
- volatile unsigned char* s = (unsigned char*)src;
-
- for( i = 0; i < count;i++)
- d[i] = s[i];
-
- return dest;
-}
-
-/* Write to NVRAM */
-void
-nvram_write(long dest, const void *src, size_t count)
-{
- int i;
- volatile unsigned char* d = (unsigned char*)dest;
- volatile unsigned char* s = (unsigned char*)src;
-
- SYS_TOD_UNPROTECT();
-
- for( i = 0; i < count;i++)
- d[i] = s[i];
-
- SYS_TOD_PROTECT();
-}
diff --git a/board/bmw/bmw.h b/board/bmw/bmw.h
deleted file mode 100644
index dd97569..0000000
--- a/board/bmw/bmw.h
+++ /dev/null
@@ -1,86 +0,0 @@
-/*
- * BMW/MPC8245 Board definitions.
- * For more info, see http://www.vooha.com/
- *
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
- *
- * (C) Copyright 2002
- * James Dougherty (jfd@broadcom.com)
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __BMW_H
-#define __BMW_H
-
-/* System addresses */
-
-#define PCI_SPECIAL_BASE 0xfe000000
-#define PCI_SPECIAL_SIZE 0x01000000
-
-#define EUMBBAR_VAL 0x80500000 /* Location of EUMB region */
-#define EUMBSIZE 0x00100000 /* Size of EUMB region */
-
-/* Extended ROM space devices */
-#define DOC_BASE_ADDR 0xff000000 /* Onboard DOC TSOP 16MB */
-#define DOC2_BASE_ADDR 0x70000000 /* DIP32 socket -> 1GB */
-#define XROM_BASE_ADDR 0x7c000000 /* RCS2 (PAL / Satellite IO) */
-#define PLD_REG_BASE XROM_BASE_ADDR
-#define LED_REG_BASE (XROM_BASE_ADDR | 0x2000)
-#define TOD_BASE (XROM_BASE_ADDR | 0x4000)
-#define LED_REG(x) (*(volatile unsigned char *) \
- (LED_REG_BASE + (x)))
-#define XROM_DEV_SIZE 0x00006000
-
-#define ENET_DEV_BASE 0x80000000
-
-#define PLD_REG(off) (*(volatile unsigned char *)\
- (PLD_REG_BASE + (off)))
-
-#define PLD_REVID_B1 0x7f /* Fix me */
-#define PLD_REVID_B2 0x01 /* Fix me */
-
-#define SYS_HARD_RESET() { for (;;) PLD_REG(0) = 0; } /* clr 0x80 bit */
-#define SYS_REVID_GET() ((int) PLD_REG(0) & 0x7f)
-#define SYS_LED_OFF() (PLD_REG(1) |= 0x80)
-#define SYS_LED_ON() (PLD_REG(1) &= ~0x80)
-#define SYS_WATCHDOG_IRQ3() (PLD_REG(2) |= 0x80)
-#define SYS_WATCHDOG_RESET() (PLD_REG(2) &= ~0x80)
-#define SYS_TOD_PROTECT() (PLD_REG(3) |= 0x80)
-#define SYS_TOD_UNPROTECT() (PLD_REG(3) &= ~0x80)
-
-#define TOD_REG_BASE (TOD_BASE | 0x1ff0)
-#define TOD_NVRAM_BASE TOD_BASE
-#define TOD_NVRAM_SIZE 0x1ff0
-#define TOD_NVRAM_LIMIT (TOD_NVRAM_BASE + TOD_NVRAM_SIZE)
-#define RTC(r) (TOD_BASE + r)
-
-/* Onboard BCM570x device */
-#define PCI_ENET_IOADDR 0x80000000
-#define PCI_ENET_MEMADDR 0x80000000
-
-
-#ifndef __ASSEMBLY__
-/* C Function prototypes */
-void sys_led_msg(char* msg);
-
-#endif /* !__ASSEMBLY__ */
-
-#endif /* __BMW_H */
diff --git a/board/bmw/config.mk b/board/bmw/config.mk
deleted file mode 100644
index a1a44e5..0000000
--- a/board/bmw/config.mk
+++ /dev/null
@@ -1,30 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# BMW board
-#
-
-# NOTE: The flags below affect how the BCM570x driver is compiled
-PLATFORM_CPPFLAGS += -DEMBEDDED -DBIG_ENDIAN_HOST -DINCLUDE_5701_AX_FIX=1\
- -DDBG=0 -DT3_JUMBO_RCV_RCB_ENTRY_COUNT=256
diff --git a/board/bmw/early_init.S b/board/bmw/early_init.S
deleted file mode 100644
index 63c29d5..0000000
--- a/board/bmw/early_init.S
+++ /dev/null
@@ -1,1170 +0,0 @@
-#include <ppc_asm.tmpl>
-#include <mpc824x.h>
-#include <ppc_defs.h>
-#include <asm/cache.h>
-#include <asm/mmu.h>
-
-#define USE_V2_INIT 1 /* Jimmy Blair's initialization. */
-
-
-/*
- * Initialize the MMU using BAT entries and hardwired TLB
- * This obviates the need for any code in cpu_init_f which
- * configures the BAT registers.
-*/
-#define MEMORY_MGMT_MSR_BITS (MSR_DR | MSR_IR) /* Data and Inst Relocate */
- .global iommu_setup
- /* Initialize IO/MMU mappings via BAT method Ch. 7,
- * PPC Programming Reference
- */
-iommu_setup:
-
-/* initialize the BAT registers (SPRs 528 - 543 */
-#define mtibat0u(x) mtspr 528,(x) /* SPR 528 (IBAT0U) */
-#define mtibat0l(x) mtspr 529,(x) /* SPR 529 (IBAT0L) */
-#define mtibat1u(x) mtspr 530,(x) /* SPR 530 (IBAT1U) */
-#define mtibat1l(x) mtspr 531,(x) /* SPR 531 (IBAT1L) */
-#define mtibat2u(x) mtspr 532,(x) /* SPR 532 (IBAT2U) */
-#define mtibat2l(x) mtspr 533,(x) /* SPR 533 (IBAT2L) */
-#define mtibat3u(x) mtspr 534,(x) /* SPR 534 (IBAT3U) */
-#define mtibat3l(x) mtspr 535,(x) /* SPR 535 (IBAT3L) */
-#define mtdbat0u(x) mtspr 536,(x) /* SPR 536 (DBAT0U) */
-#define mtdbat0l(x) mtspr 537,(x) /* SPR 537 (DBAT0L) */
-#define mtdbat1u(x) mtspr 538,(x) /* SPR 538 (DBAT1U) */
-#define mtdbat1l(x) mtspr 539,(x) /* SPR 539 (DBAT1L) */
-#define mtdbat2u(x) mtspr 540,(x) /* SPR 540 (DBAT2U) */
-#define mtdbat2l(x) mtspr 541,(x) /* SPR 541 (DBAT2L) */
-#define mtdbat3u(x) mtspr 542,(x) /* SPR 542 (DBAT3U) */
-#define mtdbat3l(x) mtspr 543,(x) /* SPR 543 (DBAT3L) */
-
-
-/* PowerPC processors do not necessarily initialize the BAT
- registers on power-up or reset. So they are in an unknown
- state. Before programming the BATs for the first time, all
- BAT registers MUST have their Vs and Vp bits cleared in the
- upper BAT half in order to avoid possibly having 2 BATs
- valid and mapping the same memory region.
-
- The reason for this is that, even with address translation
- disabled, multiple BAT hits for an address are treated as
- programming errors and can cause unpredictable results.
-
- It is up to the software to make sure it never has 2 IBAT
- mappings or 2 DBAT mappings that are valid for the same
- addresses. It is not necessary to perform this code
- sequence every time the BATs are programmed, only when
- there is a possibility that there may be overlapping BAT
- entries.
-
- When programming the BATs in non-reset scenarios, even if
- you are sure that your new mapping will not temporarily
- create overlapping regions, it is still a wise idea to
- invalidate a BAT entry by setting its upper BAT register to
- all 0's before programming it. This will avoid having a
- BAT marked valid that is in an unknown or transient state
-*/
-
- addis r5,0,0x0000
- mtibat0u(r5)
- mtibat0l(r5)
- mtibat1u(r5)
- mtibat1l(r5)
- mtibat2u(r5)
- mtibat2l(r5)
- mtibat3u(r5)
- mtibat3l(r5)
- mtdbat0u(r5)
- mtdbat0l(r5)
- mtdbat1u(r5)
- mtdbat1l(r5)
- mtdbat2u(r5)
- mtdbat2l(r5)
- mtdbat3u(r5)
- mtdbat3l(r5)
- isync
-
-/*
- * Set up I/D BAT0
- */
- lis r4, CONFIG_SYS_DBAT0L at h
- ori r4, r4, CONFIG_SYS_DBAT0L at l
- lis r3, CONFIG_SYS_DBAT0U at h
- ori r3, r3, CONFIG_SYS_DBAT0U at l
-
- mtdbat0l(r4)
- isync
- mtdbat0u(r3)
- isync
- sync
-
- lis r4, CONFIG_SYS_IBAT0L at h
- ori r4, r4, CONFIG_SYS_IBAT0L at l
- lis r3, CONFIG_SYS_IBAT0U at h
- ori r3, r3, CONFIG_SYS_IBAT0U at l
-
- isync
- mtibat0l(r4)
- isync
- mtibat0u(r3)
- isync
-
-/*
- * Set up I/D BAT1
- */
- lis r4, CONFIG_SYS_IBAT1L at h
- ori r4, r4, CONFIG_SYS_IBAT1L at l
- lis r3, CONFIG_SYS_IBAT1U at h
- ori r3, r3, CONFIG_SYS_IBAT1U at l
-
- isync
- mtibat1l(r4)
- isync
- mtibat1u(r3)
- isync
- mtdbat1l(r4)
- isync
- mtdbat1u(r3)
- isync
- sync
-
-/*
- * Set up I/D BAT2
- */
- lis r4, CONFIG_SYS_IBAT2L at h
- ori r4, r4, CONFIG_SYS_IBAT2L at l
- lis r3, CONFIG_SYS_IBAT2U at h
- ori r3, r3, CONFIG_SYS_IBAT2U at l
-
- isync
- mtibat2l(r4)
- isync
- mtibat2u(r3)
- isync
- mtdbat2l(r4)
- isync
- mtdbat2u(r3)
- isync
- sync
-
-/*
- * Setup I/D BAT3
- */
- lis r4, CONFIG_SYS_IBAT3L at h
- ori r4, r4, CONFIG_SYS_IBAT3L at l
- lis r3, CONFIG_SYS_IBAT3U at h
- ori r3, r3, CONFIG_SYS_IBAT3U at l
-
- isync
- mtibat3l(r4)
- isync
- mtibat3u(r3)
- isync
- mtdbat3l(r4)
- isync
- mtdbat3u(r3)
- isync
- sync
-
-
-/*
- * Invalidate all 64 TLB's
- */
- lis r3, 0
- mtctr r3
- lis r5, 4
-
-tlblp:
- tlbie r3
- sync
- addi r3, r3, 0x1000
- cmplw r3, r5
- blt tlblp
-
- sync
-
-/*
- * Enable Data Translation
- */
- lis r4, MEMORY_MGMT_MSR_BITS at h
- ori r4, r4, MEMORY_MGMT_MSR_BITS at l
- mfmsr r3
- or r3, r4, r3
- mtmsr r3
- isync
- sync
-
- blr
-
-
-#ifdef USE_V2_INIT
-/* #define USER_I_CACHE_ENABLE 1*/ /* Fast rom boots */
-/* Macro for hiadjust and lo */
-#define HIADJ(arg) arg at ha
-#define HI(arg) arg at h
-#define LO(arg) arg at l
-
-#undef LOADPTR
-#define LOADPTR(reg,const32) \
- addis reg,r0,HIADJ(const32); addi reg,reg,LO(const32)
-
-.globl early_init_f
-
-early_init_f:
-/* MPC8245/BMW CPCI System Init
- * Jimmy Blair, Broadcom Corp, 2002.
- */
- mflr r11
- /* Zero-out registers */
-
- addis r0,r0,0
- mtspr SPRG0,r0
- mtspr SPRG1,r0
- mtspr SPRG2,r0
- mtspr SPRG3,r0
-
- /* Set MPU/MSR to a known state. Turn on FP */
-
- LOADPTR (r3, MSR_FP)
- sync
- mtmsr r3
- isync
-
- /* Init the floating point control/status register */
-
- mtfsfi 7,0x0
- mtfsfi 6,0x0
- mtfsfi 5,0x0
- mtfsfi 4,0x0
- mtfsfi 3,0x0
- mtfsfi 2,0x0
- mtfsfi 1,0x0
- mtfsfi 0,0x0
- isync
-
- /* Set MPU/MSR to a known state. Turn off FP */
-
-#if 1 /* Turn off floating point (remove to keep FP on) */
- andi. r3, r3, 0
- sync
- mtmsr r3
- isync
-#endif
-
- /* Init the Segment registers */
-
- andi. r3, r3, 0
- isync
- mtsr 0,r3
- isync
- mtsr 1,r3
- isync
- mtsr 2,r3
- isync
- mtsr 3,r3
- isync
- mtsr 4,r3
- isync
- mtsr 5,r3
- isync
- mtsr 6,r3
- isync
- mtsr 7,r3
- isync
- mtsr 8,r3
- isync
- mtsr 9,r3
- isync
- mtsr 10,r3
- isync
- mtsr 11,r3
- isync
- mtsr 12,r3
- isync
- mtsr 13,r3
- isync
- mtsr 14,r3
- isync
- mtsr 15,r3
- isync
-
- /* Turn off data and instruction cache control bits */
-
- mfspr r3, HID0
- isync
- rlwinm r4, r3, 0, 18, 15 /* r4 has ICE and DCE bits cleared */
- sync
- isync
- mtspr HID0, r4 /* HID0 = r4 */
- isync
-
- /* Get cpu type */
-
- mfspr r28, PVR
- rlwinm r28, r28, 16, 16, 31
-
- /* invalidate the MPU's data/instruction caches */
-
- lis r3, 0x0
- cmpli 0, 0, r28, CPU_TYPE_603
- beq cpuIs603
- cmpli 0, 0, r28, CPU_TYPE_603E
- beq cpuIs603
- cmpli 0, 0, r28, CPU_TYPE_603P
- beq cpuIs603
- cmpli 0, 0, r28, CPU_TYPE_604R
- bne cpuNot604R
-
-cpuIs604R:
- lis r3, 0x0
- mtspr HID0, r3 /* disable the caches */
- isync
- ori r4, r4, 0x0002 /* disable BTAC by setting bit 30 */
-
-cpuNot604R:
- ori r3, r3, (HID0_ICFI |HID0_DCI)
-
-cpuIs603:
- ori r3, r3, (HID0_ICE | HID0_DCE)
- or r4, r4, r3 /* set bits */
- sync
- isync
- mtspr HID0, r4 /* HID0 = r4 */
- andc r4, r4, r3 /* clear bits */
- isync
- cmpli 0, 0, r28, CPU_TYPE_604
- beq cpuIs604
- cmpli 0, 0, r28, CPU_TYPE_604E
- beq cpuIs604
- cmpli 0, 0, r28, CPU_TYPE_604R
- beq cpuIs604
- mtspr HID0, r4
- isync
-
-#ifdef USER_I_CACHE_ENABLE
- b instCacheOn603
-#else
- b cacheEnableDone
-#endif
-
-cpuIs604:
- LOADPTR (r5, 0x1000) /* loop count, 0x1000 */
- mtspr CTR, r5
-loopDelay:
- nop
- bdnz loopDelay
- isync
- mtspr HID0, r4
- isync
-
- /* turn the Instruction cache ON for faster FLASH ROM boots */
-
-#ifdef USER_I_CACHE_ENABLE
-
- ori r4, r4, (HID0_ICE | HID0_ICFI)
- isync /* Synchronize for ICE enable */
- b writeReg4
-instCacheOn603:
- ori r4, r4, (HID0_ICE | HID0_ICFI)
- rlwinm r3, r4, 0, 21, 19 /* clear the ICFI bit */
-
- /*
- * The setting of the instruction cache enable (ICE) bit must be
- * preceded by an isync instruction to prevent the cache from being
- * enabled or disabled while an instruction access is in progress.
- */
- isync
-writeReg4:
- mtspr HID0, r4 /* Enable Instr Cache & Inval cache */
- cmpli 0, 0, r28, CPU_TYPE_604
- beq cacheEnableDone
- cmpli 0, 0, r28, CPU_TYPE_604E
- beq cacheEnableDone
-
- mtspr HID0, r3 /* using 2 consec instructions */
- /* PPC603 recommendation */
-#endif
-cacheEnableDone:
-
- /* Detect map A or B */
-
- addis r5,r0, HI(CHRP_REG_ADDR)
- addis r6,r0, HI(CHRP_REG_DATA)
- LOADPTR (r7, KAHLUA_ID) /* Kahlua PCI controller ID */
- LOADPTR (r8, BMC_BASE)
-
- stwbrx r8,0,(r5)
- lwbrx r3,0,(r6) /* Store read value to r3 */
- cmp 0,0,r3,r7
- beq cr0, X4_KAHLUA_START
-
- /* It's not an 8240, is it an 8245? */
-
- LOADPTR (r7, KAHLUA2_ID) /* Kahlua PCI controller ID */
- cmp 0,0,r3,r7
- beq cr0, X4_KAHLUA_START
-
- /* Save the PCI controller type in r7 */
- mr r7, r3
-
- LOADPTR (r5, PREP_REG_ADDR)
- LOADPTR (r6, PREP_REG_DATA)
-
-X4_KAHLUA_START:
- /* MPC8245 changes begin here */
- LOADPTR (r3, MPC107_PCI_CMD) /* PCI command reg */
- stwbrx r3,0,r5
- li r4, 6 /* Command register value */
- sthbrx r4, 0, r6
-
- LOADPTR (r3, MPC107_PCI_STAT) /* PCI status reg */
- stwbrx r3,0,r5
- li r4, -1 /* Write-to-clear all bits */
- li r3, 2 /* PCI_STATUS is at +2 offset */
- sthbrx r4, r3, r6
-
- /*-------PROC_INT1_ADR */
-
- LOADPTR (r3, PROC_INT1_ADR) /* Processor I/F Config 1 reg. */
- stwbrx r3,0,r5
- LOADPTR (r4, 0xff141b98)
- stwbrx r4,0,r6
-
- /*-------PROC_INT2_ADR */
-
- LOADPTR (r3, PROC_INT2_ADR) /* Processor I/F Config 2 reg. */
- stwbrx r3,0,r5
- lis r4, 0x2000 /* Flush PCI config writes */
- stwbrx r4,0,r6
-
- LOADPTR (r9, KAHLUA2_ID)
- cmpl 0, 0, r7, r9
- bne L1not8245
-
- /* MIOCR1 -- turn on bit for DLL delay */
-
- LOADPTR (r3, MIOCR1_ADR_X)
- stwbrx r3,0,r5
- li r4, 0x04
- stb r4, MIOCR1_SHIFT(r6)
-
- /* For the MPC8245, set register 77 to %00100000 (see Errata #15) */
- /* SDRAM_CLK_DEL (0x77)*/
-
- LOADPTR (r3, MIOCR2_ADR_X)
- stwbrx r3,0,r5
- li r4, 0x10
- stb r4, MIOCR2_SHIFT(r6)
-
- /* PMCR2 -- set PCI hold delay to <10>b for 33 MHz */
-
- LOADPTR (r3, PMCR2_ADR_X)
- stwbrx r3,0,r5
- li r4, 0x20
- stb r4, PMCR2_SHIFT(r6)
-
- /* Initialize EUMBBAR early since 8245 has internal UART in EUMB */
-
- LOADPTR (r3, EUMBBAR)
- stwbrx r3,0,r5
- LOADPTR (r4, CONFIG_SYS_EUMB_ADDR)
- stwbrx r4,0,r6
-
-L1not8245:
-
- /* Toggle the DLL reset bit in AMBOR */
-
- LOADPTR (r3, AMBOR)
- stwbrx r3,0,r5
- lbz r4, 0(r6)
-
- andi. r4, r4, 0xdf
- stb r4, 0(r6) /* Clear DLL_RESET */
- sync
-
- ori r4, r4, 0x20 /* Set DLL_RESET */
- stb r4, 0(r6)
- sync
-
- andi. r4, r4, 0xdf
- stb r4, 0(r6) /* Clear DLL_RESET */
-
-
- /* Enable RCS2, use supplied timings */
- LOADPTR (r3, ERCR1)
- stwbrx r3,0,r5
- LOADPTR (r4, 0x80408000)
- stwbrx r4,0,r6
-
- /* Disable RCS3 parameters */
- LOADPTR (r3, ERCR2)
- stwbrx r3,0,r5
- LOADPTR (r4, 0x00000000)
- stwbrx r4,0,r6
-
- /* RCS3 at 0x70000000, 64KBytes */
- LOADPTR (r3, ERCR2)
- stwbrx r3,0,r5
- LOADPTR (r4, 0x00000004)
- stwbrx r4,0,r6
-
- /*-------MCCR1 */
-
-#ifdef INCLUDE_ECC
-#define MC_ECC 1
-#else /* INCLUDE_ECC */
-#define MC_ECC 0
-#endif /* INCLUDE_ECC */
-
-#define MC1_ROMNAL 8 /* 0-15 */
-#define MC1_ROMFAL 11 /* 0-31 */
-#define MC1_DBUS_SIZE 0 /* 0-3, read only */
-#define MC1_BURST 0 /* 0-1 */
-#define MC1_MEMGO 0 /* 0-1 */
-#define MC1_SREN 1 /* 0-1 */
-#define MC1_RAM_TYPE 0 /* 0-1 */
-#define MC1_PCKEN MC_ECC /* 0-1 */
-#define MC1_BANKBITS 0x5555 /* 2 bits/bank 7-0 */
-
- LOADPTR (r3, MEM_CONT1_ADR) /* Set MCCR1 (F0) */
- stwbrx r3,0,r5
- LOADPTR(r4, \
- MC1_ROMNAL << 28 | MC1_ROMFAL << 23 | \
- MC1_DBUS_SIZE << 21 | MC1_BURST << 20 | \
- MC1_MEMGO << 19 | MC1_SREN << 18 | \
- MC1_RAM_TYPE << 17 | MC1_PCKEN << 16 )
- li r3, MC1_BANKBITS
- cmpl 0, 0, r7, r9 /* Check for Kahlua2 */
- bne BankBitsAdd
- cmpli 0, 0, r3, 0x5555
- beq K2BankBitsHack /* On 8245, 5555 ==> 0 */
-BankBitsAdd:
- ori r4, r3, 0
-K2BankBitsHack:
- stwbrx r4, 0, r6
-
- /*------- MCCR2 */
-
-#define MC2_TS_WAIT_TIMER 0 /* 0-7 */
-#define MC2_ASRISE 8 /* 0-15 */
-#define MC2_ASFALL 4 /* 0-15 */
-#define MC2_INLINE_PAR_NOT_ECC 0 /* 0-1 */
-#define MC2_WRITE_PARITY_CHK_EN MC_ECC /* 0-1 */
-#define MC2_INLRD_PARECC_CHK_EN MC_ECC /* 0-1 */
-#define MC2_ECC_EN 0 /* 0-1 */
-#define MC2_EDO 0 /* 0-1 */
-/*
-* N.B. This refresh interval looks good up to 85 MHz with Hynix SDRAM.
-* May need to be decreased for 100 MHz
-*/
-#define MC2_REFINT 0x3a5 /* 0-0x3fff */
-#define MC2_RSV_PG 0 /* 0-1 */
-#define MC2_RMW_PAR MC_ECC /* 0-1 */
-
- LOADPTR (r3, MEM_CONT2_ADR) /* Set MCCR2 (F4) */
- stwbrx r3,0,r5
- LOADPTR(r4, \
- MC2_TS_WAIT_TIMER << 29 | MC2_ASRISE << 25 | \
- MC2_ASFALL << 21 | MC2_INLINE_PAR_NOT_ECC << 20 | \
- MC2_WRITE_PARITY_CHK_EN << 19 | \
- MC2_INLRD_PARECC_CHK_EN << 18 | \
- MC2_ECC_EN << 17 | MC2_EDO << 16 | \
- MC2_REFINT << 2 | MC2_RSV_PG << 1 | MC2_RMW_PAR)
- cmpl 0, 0, r7, r9 /* Check for Kahlua2 */
- bne notK2
- /* clear Kahlua2 reserved bits */
- LOADPTR (r3, 0xfffcffff)
- and r4, r4, r3
-notK2:
- stwbrx r4,0,r6
-
- /*------- MCCR3 */
-
-#define MC_BSTOPRE 0x079 /* 0-0x7ff */
-
-#define MC3_BSTOPRE_U (MC_BSTOPRE >> 4 & 0xf)
-#define MC3_REFREC 8 /* 0-15 */
-#define MC3_RDLAT (4+MC_ECC) /* 0-15 */
-#define MC3_CPX 0 /* 0-1 */
-#define MC3_RAS6P 0 /* 0-15 */
-#define MC3_CAS5 0 /* 0-7 */
-#define MC3_CP4 0 /* 0-7 */
-#define MC3_CAS3 0 /* 0-7 */
-#define MC3_RCD2 0 /* 0-7 */
-#define MC3_RP1 0 /* 0-7 */
-
- LOADPTR (r3, MEM_CONT3_ADR) /* Set MCCR3 (F8) */
- stwbrx r3,0,r5
- LOADPTR(r4, \
- MC3_BSTOPRE_U << 28 | MC3_REFREC << 24 | \
- MC3_RDLAT << 20 | MC3_CPX << 19 | \
- MC3_RAS6P << 15 | MC3_CAS5 << 12 | MC3_CP4 << 9 | \
- MC3_CAS3 << 6 | MC3_RCD2 << 3 | MC3_RP1)
- cmpl 0, 0, r7, r9 /* Check for Kahlua2 */
- bne notK2b
- /* clear Kahlua2 reserved bits */
- LOADPTR (r3, 0xff000000)
- and r4, r4, r3
-notK2b:
- stwbrx r4,0,r6
-
- /*------- MCCR4 */
-
-#define MC4_PRETOACT 3 /* 0-15 */
-#define MC4_ACTOPRE 5 /* 0-15 */
-#define MC4_WMODE 0 /* 0-1 */
-#define MC4_INLINE MC_ECC /* 0-1 */
-#define MC4_REGISTERED (1-MC_ECC) /* 0-1 */
-#define MC4_BSTOPRE_UU (MC_BSTOPRE >> 8 & 3)
-#define MC4_REGDIMM 0 /* 0-1 */
-#define MC4_SDMODE_CAS 2 /* 0-7 */
-#define MC4_DBUS_RCS1 1 /* 0-1, 8-bit */
-#define MC4_SDMODE_WRAP 0 /* 0-1 */
-#define MC4_SDMODE_BURST 2 /* 0-7 */
-#define MC4_ACTORW 3 /* 0-15 */
-#define MC4_BSTOPRE_L (MC_BSTOPRE & 0xf)
-
- LOADPTR (r3, MEM_CONT4_ADR) /* Set MCCR4 (FC) */
- stwbrx r3,0,r5
- LOADPTR(r4, \
- MC4_PRETOACT << 28 | MC4_ACTOPRE << 24 | \
- MC4_WMODE << 23 | MC4_INLINE << 22 | \
- MC4_REGISTERED << 20 | MC4_BSTOPRE_UU << 18 | \
- MC4_DBUS_RCS1 << 17 | \
- MC4_REGDIMM << 15 | MC4_SDMODE_CAS << 12 | \
- MC4_SDMODE_WRAP << 11 | MC4_SDMODE_BURST << 8 | \
- MC4_ACTORW << 4 | MC4_BSTOPRE_L)
- cmpl 0, 0, r7, r9 /* Check for Kahlua 2 */
- bne notK2c
- /* Turn on Kahlua2 extended ROM space */
- LOADPTR (r3, 0x00200000)
- or r4, r4, r3
-notK2c:
- stwbrx r4,0,r6
-
-#ifdef INCLUDE_ECC
- /*------- MEM_ERREN1 */
-
- LOADPTR (r3, MEM_ERREN1_ADR) /* Set MEM_ERREN1 (c0) */
- stwbrx r3,0,r5
- lwbrx r4,0,r6
- ori r4,r4,4 /* Set MEM_PERR_EN */
- stwbrx r4,0,r6
-#endif /* INCLUDE_ECC */
-
- /*------- MSAR/MEAR */
-
- LOADPTR (r3, MEM_START1_ADR) /* Set MSAR1 (80) */
- stwbrx r3,0,r5
- LOADPTR (r4, 0xc0804000)
- stwbrx r4,0,r6
-
- LOADPTR (r3, MEM_START2_ADR) /* Set MSAR2 (84) */
- stwbrx r3,0,r5
- LOADPTR (r4, 0xc0804000)
- stwbrx r4,0,r6
-
- LOADPTR (r3, XMEM_START1_ADR) /* Set MESAR1 (88) */
- stwbrx r3,0,r5
- LOADPTR (r4, 0x00000000)
- stwbrx r4,0,r6
-
- LOADPTR (r3, XMEM_START2_ADR) /* Set MESAR2 (8c) */
- stwbrx r3,0,r5
- LOADPTR (r4, 0x01010101)
- stwbrx r4,0,r6
-
- LOADPTR (r3, MEM_END1_ADR) /* Set MEAR1 (90) */
- stwbrx r3,0,r5
- LOADPTR (r4, 0xffbf7f3f)
- stwbrx r4,0,r6
-
- LOADPTR (r3, MEM_END2_ADR) /* Set MEAR2 (94) */
- stwbrx r3,0,r5
- LOADPTR (r4, 0xffbf7f3f)
- stwbrx r4,0,r6
-
- LOADPTR (r3, XMEM_END1_ADR) /* MEEAR1 (98) */
- stwbrx r3,0,r5
- LOADPTR (r4, 0x00000000)
- stwbrx r4,0,r6
-
- LOADPTR (r3, XMEM_END2_ADR) /* MEEAR2 (9c) */
- stwbrx r3,0,r5
- LOADPTR (r4, 0x01010101)
- stwbrx r4,0,r6
-
- /*-------ODCR */
-
- LOADPTR (r3, ODCR_ADR_X) /* Set ODCR */
- stwbrx r3,0,r5
-
- li r4, 0x7f
- stb r4, ODCR_SHIFT(r6) /* ODCR is at +3 offset */
-
- /*-------MBEN */
-
- LOADPTR (r3, MEM_EN_ADR) /* Set MBEN (a0) */
- stwbrx r3,0,r5
- li r4, 0x01 /* Enable bank 0 */
- stb r4, 0(r6) /* MBEN is at +0 offset */
-
-#if 0 /* Jimmy: I think page made is broken */
- /*-------PGMAX */
-
- LOADPTR (r3, MPM_ADR_X)
- stwbrx r3,0,r5
- li r4, 0x32
- stb r4, MPM_SHIFT(r6) /* PAGE_MODE is at +3 offset */
-#endif
-
- /* Wait before initializing other registers */
-
- lis r4,0x0001
- mtctr r4
-
-KahluaX4wait200us:
- bdnz KahluaX4wait200us
-
- /* Set MEMGO bit */
-
- LOADPTR (r3, MEM_CONT1_ADR) /* MCCR1 (F0) |= PGMAX */
- stwbrx r3,0,r5
- lwbrx r4,0,r6 /* old MCCR1 */
- oris r4,r4,0x0008 /* MEMGO=1 */
- stwbrx r4, 0, r6
-
- /* Wait again */
-
- addis r4,r0,0x0002
- ori r4,r4,0xffff
-
- mtctr r4
-
-KahluaX4wait8ref:
- bdnz KahluaX4wait8ref
-
- sync
- eieio
- mtlr r11
- blr
-
-#else /* USE_V2_INIT */
-
-
-/* U-Boot works, but memory will not run reliably for all address ranges.
- * Early U-Boot Working init, but 2.4.19 kernel will crash since memory is not
- * initialized correctly. Could work if debugged.
- */
-/* PCI Support routines */
-
- .globl __pci_config_read_32
-__pci_config_read_32:
- lis r4, 0xfec0
- stwbrx r3, r0, r4
- sync
- lis r4, 0xfee0
- lwbrx r3, 0, r4
- blr
- .globl __pci_config_read_16
-__pci_config_read_16:
- lis r4, 0xfec0
- andi. r5, r3, 2
- stwbrx r3, r0, r4
- sync
- oris r4, r5, 0xfee0
- lhbrx r3, r0, r4
- blr
- .globl __pci_config_read_8
-__pci_config_read_8:
- lis r4, 0xfec0
- andi. r5, r3, 3
- stwbrx r3, r0, r4
- sync
- oris r4, r5, 0xfee0
- lbz r3, 0(4)
- blr
- .globl __pci_config_write_32
-__pci_config_write_32:
- lis r5, 0xfec0
- stwbrx r3, r0, r5
- sync
- lis r5, 0xfee0
- stwbrx r4, r0, r5
- sync
- blr
- .globl __pci_config_write_16
-__pci_config_write_16:
- lis r5, 0xfec0
- andi. r6, r3, 2
- stwbrx r3, r0, 5
- sync
- oris r5, r6, 0xfee0
- sthbrx r4, r0, r5
- sync
- blr
- .globl __pci_config_write_8
-__pci_config_write_8:
- lis r5, 0xfec0
- andi. r6, r3, 3
- stwbrx r3, r0, r5
- sync
- oris r5, r6, 0xfee0
- stb r4, 0(r5)
- sync
- blr
- .globl in_8
-in_8:
- oris r3, r3, 0xfe00
- lbz r3,0(r3)
- blr
- .globl in_16
-in_16:
- oris r3, r3, 0xfe00
- lhbrx r3, 0, r3
- blr
- .globl in_16_ne
-in_16_ne:
- oris r3, r3, 0xfe00
- lhzx r3, 0, r3
- blr
- .globl in_32
-in_32:
- oris r3, r3, 0xfe00
- lwbrx r3, 0, r3
- blr
- .globl out_8
-out_8:
- oris r3, r3, 0xfe00
- stb r4, 0(r3)
- eieio
- blr
- .globl out_16
-out_16:
- oris r3, r3, 0xfe00
- sthbrx r4, 0, r3
- eieio
- blr
- .globl out_16_ne
-out_16_ne:
- oris r3, r3, 0xfe00
- sth r4, 0(r3)
- eieio
- blr
- .globl out_32
-out_32:
- oris r3, r3, 0xfe00
- stwbrx r4, 0, r3
- eieio
- blr
- .globl read_8
-read_8:
- lbz r3,0(r3)
- blr
- .globl read_16
-read_16:
- lhbrx r3, 0, r3
- blr
- .globl read_32
-read_32:
- lwbrx r3, 0, r3
- blr
- .globl read_32_ne
-read_32_ne:
- lwz r3, 0(r3)
- blr
- .globl write_8
-write_8:
- stb r4, 0(r3)
- eieio
- blr
- .globl write_16
-write_16:
- sthbrx r4, 0, r3
- eieio
- blr
- .globl write_32
-write_32:
- stwbrx r4, 0, r3
- eieio
- blr
- .globl write_32_ne
-write_32_ne:
- stw r4, 0(r3)
- eieio
- blr
-
-
-.globl early_init_f
-
-early_init_f:
- mflr r11
- lis r10, 0x8000
-
- /* PCI Latency Timer */
- li r4, 0x0d
- ori r3, r10, PLTR at l
- bl __pci_config_write_8
-
- /* Cache Line Size */
- li r4, 0x08
- ori r3, r10, PCLSR at l
- bl __pci_config_write_8
-
- /* PCI Cmd */
- li r4, 6
- ori r3, r10, PCICR at l
- bl __pci_config_write_16
-
-#if 1
- /* PCI Stat */
- ori r3, r10, PCISR at l
- bl __pci_config_read_16
- ori r4, r4, 0xffff
- ori r3, r10, PCISR at l
- bl __pci_config_write_16
-#endif
-
- /* PICR1 */
- lis r4, 0xff14
- ori r4, r4, 0x1b98
- ori r3, r10, PICR1 at l
- bl __pci_config_write_32
-
-
- /* PICR2 */
- lis r4, 0x0404
- ori r4, r4, 0x0004
- ori r3, r10, PICR2 at l
- bl __pci_config_write_32
-
- /* MIOCR1 */
- li r4, 0x04
- ori r3, r10, MIOCR1 at l
- bl __pci_config_write_8
-
- /* For the MPC8245, set register 77 to %00100000 (see Errata #15) */
- /* SDRAM_CLK_DEL (0x77)*/
- li r4, 0x10
- ori r3, r10, MIOCR2 at l
- bl __pci_config_write_8
-
- /* EUMBBAR */
- lis r4, 0xfc00
- ori r3, r10, EUMBBAR at l
- bl __pci_config_write_32
-
- /* AMBOR */
-
- /* Even if Address Map B is not being used (though it should),
- * the memory DLL needs to be cleared/set/cleared before using memory.
- */
-
- ori r3, r10, AMBOR at l
- bl __pci_config_read_8 /* get Current bits */
-
- andi. r4, r4, 0xffdf
- ori r3, r10, AMBOR at l
- bl __pci_config_write_16 /* Clear DLL_RESET */
-
- ori r4, r4, 0x0020
- ori r3, r10, AMBOR at l
- bl __pci_config_write_16 /* Set DLL_RESET */
-
- andi. r4, r4, 0xffdf
- ori r3, r10, AMBOR at l
- bl __pci_config_write_16 /* Clear DLL_RESET */
-
- /* ERCR1 */
- lis r4, 0x8040 /* Enable RCS2, use supplied timings */
- ori r4, r4, 0x8000
- ori r3, r10, ERCR1 at l
- bl __pci_config_write_32
-
- /* ERCR2 */
- lis r4, 0x0000 /* Disable RCS3 parms */
- ori r4, r4, 0x0000
- ori r3, r10, ERCR2 at l
- bl __pci_config_write_32
-
- /* ERCR3 */
- lis r4, 0x0000 /* RCS3 at 0x70000000, 64K bytes */
- ori r4, r4, 0x0004
- ori r3, r10, ERCR2 at l
- bl __pci_config_write_32
-
- /* Preserve memgo bit */
- /* MCCR1 */
-
-/* lis r4, 0x75a8 / Safe Local ROM = 11+3 clocks */
- lis r4, 0x75a0 /* Safe Local ROM = 11+3 clocks */
-/* lis r4, 0x73a0 / Fast Local ROM = 7+3 clocks */
-/* oris r4, r4, 0x0010 / Burst ROM/Flash enable */
-/* oris r4, r4, 0x0004 / Self-refresh enable */
-
-/* ori r4,r4,0xFFFF / 16Mbit 2bank SDRAM */
-/* ori r4,r4,0xAAAA / 256Mbit 4bank SDRAM (8245 only) */
-/* ori r4,r4,0x5555 / 64Mbit 2bank SDRAM */
- ori r4,r4,0x0000 /* 64Mbit 4bank SDRAM */
-
- ori r3, r10, MCCR1 at l
- bl __pci_config_write_32
-
- /* MCCR2 */
-
- lis r4,0x0000
-/* oris r4,r4,0x4000 / TS_WAIT_TIMER = 3 clocks */
- oris r4,r4,0x1000 /* ASRISE = 8 clocks */
- oris r4,r4,0x0080 /* ASFALL = 8 clocks */
-/* oris r4,r4,0x0010 / SDRAM Parity (else ECC) */
-/* oris r4,r4,0x0008 / Write parity check */
-/* oris r4,r4,0x0004 / SDRAM inline reads */
-
-
-/* Select a refresh rate; it needs to match the bus speed; if too */
-/* slow, data may be lost; if too fast, performance is lost. We */
-/* use the fastest value so we run at all speeds. */
-/* Refresh = (15600ns/busclk) - (213 (see UM)). */
-
-/* ori r4,r4,0x1d2c / 133 MHz mem bus = 1867 */
-/* ori r4,r4,0x150c / 100 MHz mem bus = 1347 */
-/* ori r4,r4,0x10fc / 83 MHz mem bus = 1087 */
-/* ori r4,r4,0x0cc4 / 66 MHz mem bus = 817 */
- ori r4,r4,0x04cc /* 33 MHz mem bus (SAFE) = 307 */
-/* ori r4,r4,0x0002 / Reserve a page */
-/* ori r4,r4,0x0001 / RWM parity */
-
- ori r3, r10, MCCR2 at l
- bl __pci_config_write_32
-
-
- /* MCCR3 */
- lis r4,0x0000 /* BSTOPRE_M = 7 (see A/N) */
- oris r4,r4,0x0500 /* REFREC = 8 clocks */
- ori r3, r10, MCCR3 at l
- bl __pci_config_write_32
-
- /* MCCR4 */ /* Turn on registered buffer mode */
- lis r4, 0x2000 /* PRETOACT = 3 clocks */
- oris r4,r4,0x0400 /* ACTOPRE = 5 clocks */
-/* oris r4,r4,0x0080 / Enable 8-beat burst (32-bit bus) */
-/* oris r4,r4,0x0040 / Enable Inline ECC/Parity */
- oris r4,r4,0x0020 /* EXTROM enabled */
- oris r4,r4,0x0010 /* Registered buffers */
-/* oris r4,r4,0x0000 / BSTOPRE_U = 0 (see A/N) */
- oris r4,r4,0x0002 /* DBUS_SIZ[2] (8 bit on RCS1) */
-
-/* ori r4,r4,0x8000 / Registered DIMMs */
- ori r4,r4,0x2000 /*CAS Latency (CL=3) (see RDLAT) */
-/* ori r4,r4,0x2000 / CAS Latency (CL=2) (see RDLAT) */
-/* ori r4,r4,0x0300 / Sequential wrap/8-beat burst */
- ori r4,r4,0x0200 /* Sequential wrap/4-beat burst */
- ori r4,r4,0x0030 /* ACTORW = 3 clocks */
- ori r4,r4,0x0009 /* BSTOPRE_L = 9 (see A/N) */
-
- ori r3, r10, MCCR4 at l
- bl __pci_config_write_32
-
- /* MSAR1 */
- lis r4, 0xc0804000 at h
- ori r4, r4, 0xc0804000 at l
- ori r3, r10, MSAR1 at l
- bl __pci_config_write_32
-
- /* MSAR2 */
- lis r4, 0xc0804000 at h
- ori r4, r4, 0xc0804000 at l
- ori r3, r10, MSAR2 at l
- bl __pci_config_write_32
-
- /* MESAR1 */
- lis r4, 0x00000000 at h
- ori r4, r4, 0x00000000 at l
- ori r3, r10, EMSAR1 at l
- bl __pci_config_write_32
-
- /* MESAR2 */
- lis r4, 0x01010101 at h
- ori r4, r4, 0x01010101 at l
- ori r3, r10, EMSAR2 at l
- bl __pci_config_write_32
-
- /* MEAR1 */
- lis r4, 0xffbf7f3f at h
- ori r4, r4, 0xffbf7f3f at l
- ori r3, r10, MEAR1 at l
- bl __pci_config_write_32
-
- /* MEAR2 */
- lis r4, 0xffbf7f3f at h
- ori r4, r4, 0xffbf7f3f at l
- ori r3, r10, MEAR2 at l
- bl __pci_config_write_32
-
- /* MEEAR1 */
- lis r4, 0x00000000 at h
- ori r4, r4, 0x00000000 at l
- ori r3, r10, EMEAR1 at l
- bl __pci_config_write_32
-
- /* MEEAR2 */
- lis r4, 0x01010101 at h
- ori r4, r4, 0x01010101 at l
- ori r3, r10, EMEAR2 at l
- bl __pci_config_write_32
-
- /* ODCR */
- li r4, 0x7f
- ori r3, r10, ODCR at l
- bl __pci_config_write_8
-
- /* MBER */
- li r4, 0x01
- ori r3, r10, MBER at l
- bl __pci_config_write_8
-
- /* Page CTR aka PGMAX */
- li r4, 0x32
- ori r3, r10, 0x70
- bl __pci_config_write_8
-
-#if 0
- /* CLK Drive */
- ori r4, r10, 0xfc01 /* Top bit will be ignored */
- ori r3, r10, 0x74
- bl __pci_config_write_16
-#endif
-
- /* delay */
- lis r7, 1
- mtctr r7
-label1: bdnz label1
-
- /* Set memgo bit */
- /* MCCR1 */
- ori r3, r10, MCCR1 at l
- bl __pci_config_read_32
- lis r7, 0x0008
- or r4, r3, r7
- ori r3, r10, MCCR1 at l
- bl __pci_config_write_32
-
- /* delay again */
- lis r7, 1
- mtctr r7
-label2: bdnz label2
-#if 0
-/* DEBUG: Infinite loop, write then read */
-loop:
- lis r7, 0xffff
- mtctr r7
- li r3, 0x5004
- lis r4, 0xa0a0
- ori r4, r4, 0x5050
- bl write_32_ne
- li r3, 0x5004
- bl read_32_ne
- bdnz loop
-#endif
- mtlr r11
- blr
-#endif
diff --git a/board/bmw/flash.c b/board/bmw/flash.c
deleted file mode 100644
index 57ffe08..0000000
--- a/board/bmw/flash.c
+++ /dev/null
@@ -1,779 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc824x.h>
-#include <asm/processor.h>
-#include <asm/pci_io.h>
-
-#define ROM_CS0_START 0xFF800000
-#define ROM_CS1_START 0xFF000000
-
-flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-#if defined(CONFIG_ENV_IS_IN_FLASH)
-# ifndef CONFIG_ENV_ADDR
-# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
-# endif
-# ifndef CONFIG_ENV_SIZE
-# define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
-# endif
-# ifndef CONFIG_ENV_SECT_SIZE
-# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
-# endif
-#endif
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static int write_word (flash_info_t * info, ulong dest, ulong data);
-
-#if 0
-static void flash_get_offsets (ulong base, flash_info_t * info);
-#endif /* 0 */
-
-/*flash command address offsets*/
-
-#if 0
-#define ADDR0 (0x555)
-#define ADDR1 (0x2AA)
-#define ADDR3 (0x001)
-#else
-#define ADDR0 (0xAAA)
-#define ADDR1 (0x555)
-#define ADDR3 (0x001)
-#endif
-
-#define FLASH_WORD_SIZE unsigned char
-
-/*-----------------------------------------------------------------------
- */
-
-#if 0
-static int byte_parity_odd (unsigned char x) __attribute__ ((const));
-#endif /* 0 */
-static unsigned long flash_id (unsigned char mfct, unsigned char chip)
- __attribute__ ((const));
-
-typedef struct {
- FLASH_WORD_SIZE extval;
- unsigned short intval;
-} map_entry;
-
-#if 0
-static int byte_parity_odd (unsigned char x)
-{
- x ^= x >> 4;
- x ^= x >> 2;
- x ^= x >> 1;
- return (x & 0x1) != 0;
-}
-#endif /* 0 */
-
-
-static unsigned long flash_id (unsigned char mfct, unsigned char chip)
-{
- static const map_entry mfct_map[] = {
- {(FLASH_WORD_SIZE) AMD_MANUFACT,
- (unsigned short) ((unsigned long) FLASH_MAN_AMD >> 16)},
- {(FLASH_WORD_SIZE) FUJ_MANUFACT,
- (unsigned short) ((unsigned long) FLASH_MAN_FUJ >> 16)},
- {(FLASH_WORD_SIZE) STM_MANUFACT,
- (unsigned short) ((unsigned long) FLASH_MAN_STM >> 16)},
- {(FLASH_WORD_SIZE) MT_MANUFACT,
- (unsigned short) ((unsigned long) FLASH_MAN_MT >> 16)},
- {(FLASH_WORD_SIZE) INTEL_MANUFACT,
- (unsigned short) ((unsigned long) FLASH_MAN_INTEL >> 16)},
- {(FLASH_WORD_SIZE) INTEL_ALT_MANU,
- (unsigned short) ((unsigned long) FLASH_MAN_INTEL >> 16)}
- };
-
- static const map_entry chip_map[] = {
- {AMD_ID_F040B, FLASH_AM040},
- {(FLASH_WORD_SIZE) STM_ID_x800AB, FLASH_STM800AB}
- };
-
- const map_entry *p;
- unsigned long result = FLASH_UNKNOWN;
-
- /* find chip id */
- for (p = &chip_map[0];
- p < &chip_map[sizeof chip_map / sizeof chip_map[0]]; p++)
- if (p->extval == chip) {
- result = FLASH_VENDMASK | p->intval;
- break;
- }
-
- /* find vendor id */
- for (p = &mfct_map[0];
- p < &mfct_map[sizeof mfct_map / sizeof mfct_map[0]]; p++)
- if (p->extval == mfct) {
- result &= ~FLASH_VENDMASK;
- result |= (unsigned long) p->intval << 16;
- break;
- }
-
- return result;
-}
-
-
-unsigned long flash_init (void)
-{
- unsigned long i;
- unsigned char j;
- static const ulong flash_banks[] = CONFIG_SYS_FLASH_BANKS;
-
- /* Init: no FLASHes known */
- for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
- flash_info_t *const pflinfo = &flash_info[i];
-
- pflinfo->flash_id = FLASH_UNKNOWN;
- pflinfo->size = 0;
- pflinfo->sector_count = 0;
- }
-
- for (i = 0; i < sizeof flash_banks / sizeof flash_banks[0]; i++) {
- flash_info_t *const pflinfo = &flash_info[i];
- const unsigned long base_address = flash_banks[i];
- volatile FLASH_WORD_SIZE *const flash =
- (FLASH_WORD_SIZE *) base_address;
-#if 0
- volatile FLASH_WORD_SIZE *addr2;
-#endif
-#if 0
- /* write autoselect sequence */
- flash[0x5555] = 0xaa;
- flash[0x2aaa] = 0x55;
- flash[0x5555] = 0x90;
-#else
- flash[0xAAA << (3 * i)] = 0xaa;
- flash[0x555 << (3 * i)] = 0x55;
- flash[0xAAA << (3 * i)] = 0x90;
-#endif
- __asm__ __volatile__ ("sync");
-
-#if 0
- pflinfo->flash_id = flash_id (flash[0x0], flash[0x1]);
-#else
- pflinfo->flash_id =
- flash_id (flash[0x0], flash[0x2 + 14 * i]);
-#endif
-
- switch (pflinfo->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM040:
- pflinfo->size = 0x00080000;
- pflinfo->sector_count = 8;
- for (j = 0; j < 8; j++) {
- pflinfo->start[j] =
- base_address + 0x00010000 * j;
- pflinfo->protect[j] = flash[(j << 16) | 0x2];
- }
- break;
- case FLASH_STM800AB:
- pflinfo->size = 0x00100000;
- pflinfo->sector_count = 19;
- pflinfo->start[0] = base_address;
- pflinfo->start[1] = base_address + 0x4000;
- pflinfo->start[2] = base_address + 0x6000;
- pflinfo->start[3] = base_address + 0x8000;
- for (j = 1; j < 16; j++) {
- pflinfo->start[j + 3] =
- base_address + 0x00010000 * j;
- }
-#if 0
- /* check for protected sectors */
- for (j = 0; j < pflinfo->sector_count; j++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr2 = (volatile FLASH_WORD_SIZE
- *) (pflinfo->start[j]);
- if (pflinfo->flash_id & FLASH_MAN_SST)
- pflinfo->protect[j] = 0;
- else
- pflinfo->protect[j] = addr2[2] & 1;
- }
-#endif
- break;
- }
- /* Protect monitor and environment sectors
- */
-#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
- flash_protect (FLAG_PROTECT_SET,
- CONFIG_SYS_MONITOR_BASE,
- CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-#endif
-
-#if defined(CONFIG_ENV_IS_IN_FLASH) && defined(CONFIG_ENV_ADDR)
- flash_protect (FLAG_PROTECT_SET,
- CONFIG_ENV_ADDR,
- CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1,
- &flash_info[0]);
-#endif
-
- /* reset device to read mode */
- flash[0x0000] = 0xf0;
- __asm__ __volatile__ ("sync");
- }
-
- return flash_info[0].size + flash_info[1].size;
-}
-
-#if 0
-static void flash_get_offsets (ulong base, flash_info_t * info)
-{
- int i;
-
- /* set up sector start address table */
- if (info->flash_id & FLASH_MAN_SST) {
- for (i = 0; i < info->sector_count; i++)
- info->start[i] = base + (i * 0x00010000);
- } else if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000) - 0x00030000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
- }
-
-}
-#endif /* 0 */
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- static const char unk[] = "Unknown";
- const char *mfct = unk, *type = unk;
- unsigned int i;
-
- if (info->flash_id != FLASH_UNKNOWN) {
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD:
- mfct = "AMD";
- break;
- case FLASH_MAN_FUJ:
- mfct = "FUJITSU";
- break;
- case FLASH_MAN_STM:
- mfct = "STM";
- break;
- case FLASH_MAN_SST:
- mfct = "SST";
- break;
- case FLASH_MAN_BM:
- mfct = "Bright Microelectonics";
- break;
- case FLASH_MAN_INTEL:
- mfct = "Intel";
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM040:
- type = "AM29F040B (512K * 8, uniform sector size)";
- break;
- case FLASH_AM400B:
- type = "AM29LV400B (4 Mbit, bottom boot sect)";
- break;
- case FLASH_AM400T:
- type = "AM29LV400T (4 Mbit, top boot sector)";
- break;
- case FLASH_AM800B:
- type = "AM29LV800B (8 Mbit, bottom boot sect)";
- break;
- case FLASH_AM800T:
- type = "AM29LV800T (8 Mbit, top boot sector)";
- break;
- case FLASH_AM160T:
- type = "AM29LV160T (16 Mbit, top boot sector)";
- break;
- case FLASH_AM320B:
- type = "AM29LV320B (32 Mbit, bottom boot sect)";
- break;
- case FLASH_AM320T:
- type = "AM29LV320T (32 Mbit, top boot sector)";
- break;
- case FLASH_STM800AB:
- type = "M29W800AB (8 Mbit, bottom boot sect)";
- break;
- case FLASH_SST800A:
- type = "SST39LF/VF800 (8 Mbit, uniform sector size)";
- break;
- case FLASH_SST160A:
- type = "SST39LF/VF160 (16 Mbit, uniform sector size)";
- break;
- }
- }
-
- printf ("\n Brand: %s Type: %s\n"
- " Size: %lu KB in %d Sectors\n",
- mfct, type, info->size >> 10, info->sector_count);
-
- printf (" Sector Start Addresses:");
-
- for (i = 0; i < info->sector_count; i++) {
- unsigned long size;
- unsigned int erased;
- unsigned long *flash = (unsigned long *) info->start[i];
-
- /*
- * Check if whole sector is erased
- */
- size = (i != (info->sector_count - 1)) ?
- (info->start[i + 1] - info->start[i]) >> 2 :
- (info->start[0] + info->size - info->start[i]) >> 2;
-
- for (flash = (unsigned long *) info->start[i], erased = 1;
- (flash != (unsigned long *) info->start[i] + size)
- && erased; flash++)
- erased = *flash == ~0x0UL;
-
- printf ("%s %08lX %s %s",
- (i % 5) ? "" : "\n ",
- info->start[i],
- erased ? "E" : " ", info->protect[i] ? "RO" : " ");
- }
-
- puts ("\n");
- return;
-}
-
-#if 0
-
-/*
- * The following code cannot be run from FLASH!
- */
-ulong flash_get_size (vu_long * addr, flash_info_t * info)
-{
- short i;
- FLASH_WORD_SIZE value;
- ulong base = (ulong) addr;
- volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *) addr;
-
- printf ("flash_get_size: \n");
- /* Write auto select command: read Manufacturer ID */
- eieio ();
- addr2[ADDR0] = (FLASH_WORD_SIZE) 0xAA;
- addr2[ADDR1] = (FLASH_WORD_SIZE) 0x55;
- addr2[ADDR0] = (FLASH_WORD_SIZE) 0x90;
- value = addr2[0];
-
- switch (value) {
- case (FLASH_WORD_SIZE) AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
- case (FLASH_WORD_SIZE) FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ;
- break;
- case (FLASH_WORD_SIZE) SST_MANUFACT:
- info->flash_id = FLASH_MAN_SST;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
- printf ("recognised manufacturer");
-
- value = addr2[ADDR3]; /* device ID */
- debug ("\ndev_code=%x\n", value);
-
- switch (value) {
- case (FLASH_WORD_SIZE) AMD_ID_LV400T:
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00080000;
- break; /* => 0.5 MB */
-
- case (FLASH_WORD_SIZE) AMD_ID_LV400B:
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00080000;
- break; /* => 0.5 MB */
-
- case (FLASH_WORD_SIZE) AMD_ID_LV800T:
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (FLASH_WORD_SIZE) AMD_ID_LV800B:
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (FLASH_WORD_SIZE) AMD_ID_LV160T:
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (FLASH_WORD_SIZE) AMD_ID_LV160B:
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (FLASH_WORD_SIZE) SST_ID_xF800A:
- info->flash_id += FLASH_SST800A;
- info->sector_count = 16;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (FLASH_WORD_SIZE) SST_ID_xF160A:
- info->flash_id += FLASH_SST160A;
- info->sector_count = 32;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (FLASH_WORD_SIZE) AMD_ID_F040B:
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x00080000;
- break; /* => 0.5 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
-
- printf ("flash id %lx; sector count %x, size %lx\n", info->flash_id,
- info->sector_count, info->size);
- /* set up sector start address table */
- if (info->flash_id & FLASH_MAN_SST) {
- for (i = 0; i < info->sector_count; i++)
- info->start[i] = base + (i * 0x00010000);
- } else if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000) - 0x00030000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr2 = (volatile FLASH_WORD_SIZE *) (info->start[i]);
- if (info->flash_id & FLASH_MAN_SST)
- info->protect[i] = 0;
- else
- info->protect[i] = addr2[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- addr2 = (FLASH_WORD_SIZE *) info->start[0];
- *addr2 = (FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
- }
-
- return (info->size);
-}
-
-#endif
-
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *) (info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
- unsigned char sh8b;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > (FLASH_MAN_STM | FLASH_AMD_COMP))) {
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n", prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Check the ROM CS */
- if ((info->start[0] >= ROM_CS1_START)
- && (info->start[0] < ROM_CS0_START))
- sh8b = 3;
- else
- sh8b = 0;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00AA00AA;
- addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE) 0x00550055;
- addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00800080;
- addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00AA00AA;
- addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE) 0x00550055;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (FLASH_WORD_SIZE *) (info->start[0] + ((info->
- start
- [sect]
- -
- info->
- start
- [0]) <<
- sh8b));
- if (info->flash_id & FLASH_MAN_SST) {
- addr[ADDR0 << sh8b] =
- (FLASH_WORD_SIZE) 0x00AA00AA;
- addr[ADDR1 << sh8b] =
- (FLASH_WORD_SIZE) 0x00550055;
- addr[ADDR0 << sh8b] =
- (FLASH_WORD_SIZE) 0x00800080;
- addr[ADDR0 << sh8b] =
- (FLASH_WORD_SIZE) 0x00AA00AA;
- addr[ADDR1 << sh8b] =
- (FLASH_WORD_SIZE) 0x00550055;
- addr[0] = (FLASH_WORD_SIZE) 0x00500050; /* block erase */
- udelay (30000); /* wait 30 ms */
- } else
- addr[0] = (FLASH_WORD_SIZE) 0x00300030; /* sector erase */
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- /* wait@least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (FLASH_WORD_SIZE *) (info->start[0] + ((info->start[l_sect] -
- info->
- start[0]) << sh8b));
- while ((addr[0] & (FLASH_WORD_SIZE) 0x00800080) !=
- (FLASH_WORD_SIZE) 0x00800080) {
- if ((now = get_timer (start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- serial_putc ('.');
- last = now;
- }
- }
-
- DONE:
- /* reset to read mode */
- addr = (FLASH_WORD_SIZE *) info->start[0];
- addr[0] = (FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
- for (; i < 4 && cnt > 0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < 4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i = 0; i < 4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i < 4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- return (write_word (info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t * info, ulong dest, ulong data)
-{
- volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *) info->start[0];
- volatile FLASH_WORD_SIZE *dest2;
- volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *) & data;
- ulong start;
- int flag;
- int i;
- unsigned char sh8b;
-
- /* Check the ROM CS */
- if ((info->start[0] >= ROM_CS1_START)
- && (info->start[0] < ROM_CS0_START))
- sh8b = 3;
- else
- sh8b = 0;
-
- dest2 = (FLASH_WORD_SIZE *) (((dest - info->start[0]) << sh8b) +
- info->start[0]);
-
- /* Check if Flash is (sufficiently) erased */
- if ((*dest2 & (FLASH_WORD_SIZE) data) != (FLASH_WORD_SIZE) data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- for (i = 0; i < 4 / sizeof (FLASH_WORD_SIZE); i++) {
- addr2[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00AA00AA;
- addr2[ADDR1 << sh8b] = (FLASH_WORD_SIZE) 0x00550055;
- addr2[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00A000A0;
-
- dest2[i << sh8b] = data2[i];
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((dest2[i << sh8b] & (FLASH_WORD_SIZE) 0x00800080) !=
- (data2[i] & (FLASH_WORD_SIZE) 0x00800080)) {
- if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- }
-
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/bmw/m48t59y.c b/board/bmw/m48t59y.c
deleted file mode 100644
index 4e83b90..0000000
--- a/board/bmw/m48t59y.c
+++ /dev/null
@@ -1,324 +0,0 @@
-/*
- * SGS M48-T59Y TOD/NVRAM Driver
- *
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
- *
- * (C) Copyright 1999, by Curt McDowell, 08-06-99, Broadcom Corp.
- *
- * (C) Copyright 2001, James Dougherty, 07/18/01, Broadcom Corp.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * SGS M48-T59Y TOD/NVRAM Driver
- *
- * The SGS M48 an 8K NVRAM starting at offset M48_BASE_ADDR and
- * continuing for 8176 bytes. After that starts the Time-Of-Day (TOD)
- * registers which are used to set/get the internal date/time functions.
- *
- * This module implements Y2K compliance by taking full year numbers
- * and translating back and forth from the TOD 2-digit year.
- *
- * NOTE: for proper interaction with an operating system, the TOD should
- * be used to store Universal Coordinated Time (GMT) and timezone
- * conversions should be used.
- *
- * Here is a diagram of the memory layout:
- *
- * +---------------------------------------------+ 0xffe0a000
- * | Non-volatile memory | .
- * | | .
- * | (8176 bytes of Non-volatile memory) | .
- * | | .
- * +---------------------------------------------+ 0xffe0bff0
- * | Flags |
- * +---------------------------------------------+ 0xffe0bff1
- * | Unused |
- * +---------------------------------------------+ 0xffe0bff2
- * | Alarm Seconds |
- * +---------------------------------------------+ 0xffe0bff3
- * | Alarm Minutes |
- * +---------------------------------------------+ 0xffe0bff4
- * | Alarm Date |
- * +---------------------------------------------+ 0xffe0bff5
- * | Interrupts |
- * +---------------------------------------------+ 0xffe0bff6
- * | WatchDog |
- * +---------------------------------------------+ 0xffe0bff7
- * | Calibration |
- * +---------------------------------------------+ 0xffe0bff8
- * | Seconds |
- * +---------------------------------------------+ 0xffe0bff9
- * | Minutes |
- * +---------------------------------------------+ 0xffe0bffa
- * | Hours |
- * +---------------------------------------------+ 0xffe0bffb
- * | Day |
- * +---------------------------------------------+ 0xffe0bffc
- * | Date |
- * +---------------------------------------------+ 0xffe0bffd
- * | Month |
- * +---------------------------------------------+ 0xffe0bffe
- * | Year (2 digits only) |
- * +---------------------------------------------+ 0xffe0bfff
- */
-#include <common.h>
-#include <rtc.h>
-#include "bmw.h"
-
-/*
- * Imported from mousse.h:
- *
- * TOD_REG_BASE Base of m48t59y TOD registers
- * SYS_TOD_UNPROTECT() Disable NVRAM write protect
- * SYS_TOD_PROTECT() Re-enable NVRAM write protect
- */
-
-#define YEAR 0xf
-#define MONTH 0xe
-#define DAY 0xd
-#define DAY_OF_WEEK 0xc
-#define HOUR 0xb
-#define MINUTE 0xa
-#define SECOND 0x9
-#define CONTROL 0x8
-#define WATCH 0x7
-#define INTCTL 0x6
-#define WD_DATE 0x5
-#define WD_HOUR 0x4
-#define WD_MIN 0x3
-#define WD_SEC 0x2
-#define _UNUSED 0x1
-#define FLAGS 0x0
-
-#define M48_ADDR ((volatile unsigned char *) TOD_REG_BASE)
-
-int m48_tod_init(void)
-{
- SYS_TOD_UNPROTECT();
-
- M48_ADDR[CONTROL] = 0;
- M48_ADDR[WATCH] = 0;
- M48_ADDR[INTCTL] = 0;
-
- /*
- * If the oscillator is currently stopped (as on a new part shipped
- * from the factory), start it running.
- *
- * Here is an example of the TOD bytes on a brand new M48T59Y part:
- * 00 00 00 00 00 00 00 00 00 88 8c c3 bf c8 f5 01
- */
-
- if (M48_ADDR[SECOND] & 0x80)
- M48_ADDR[SECOND] = 0;
-
- /* Is battery low */
- if ( M48_ADDR[FLAGS] & 0x10) {
- printf("NOTICE: Battery low on Real-Time Clock (replace SNAPHAT).\n");
- }
-
- SYS_TOD_PROTECT();
-
- return 0;
-}
-
-/*
- * m48_tod_set
- */
-
-static int to_bcd(int value)
-{
- return value / 10 * 16 + value % 10;
-}
-
-static int from_bcd(int value)
-{
- return value / 16 * 10 + value % 16;
-}
-
-static int day_of_week(int y, int m, int d) /* 0-6 ==> Sun-Sat */
-{
- static int t[] = {0, 3, 2, 5, 0, 3, 5, 1, 4, 6, 2, 4};
- y -= m < 3;
- return (y + y/4 - y/100 + y/400 + t[m-1] + d) % 7;
-}
-
-/*
- * Note: the TOD should store the current GMT
- */
-
-int m48_tod_set(int year, /* 1980-2079 */
- int month, /* 01-12 */
- int day, /* 01-31 */
- int hour, /* 00-23 */
- int minute, /* 00-59 */
- int second) /* 00-59 */
-
-{
- SYS_TOD_UNPROTECT();
-
- M48_ADDR[CONTROL] |= 0x80; /* Set WRITE bit */
-
- M48_ADDR[YEAR] = to_bcd(year % 100);
- M48_ADDR[MONTH] = to_bcd(month);
- M48_ADDR[DAY] = to_bcd(day);
- M48_ADDR[DAY_OF_WEEK] = day_of_week(year, month, day) + 1;
- M48_ADDR[HOUR] = to_bcd(hour);
- M48_ADDR[MINUTE] = to_bcd(minute);
- M48_ADDR[SECOND] = to_bcd(second);
-
- M48_ADDR[CONTROL] &= ~0x80; /* Clear WRITE bit */
-
- SYS_TOD_PROTECT();
-
- return 0;
-}
-
-/*
- * Note: the TOD should store the current GMT
- */
-
-int m48_tod_get(int *year, /* 1980-2079 */
- int *month, /* 01-12 */
- int *day, /* 01-31 */
- int *hour, /* 00-23 */
- int *minute, /* 00-59 */
- int *second) /* 00-59 */
-{
- int y;
-
- SYS_TOD_UNPROTECT();
-
- M48_ADDR[CONTROL] |= 0x40; /* Set READ bit */
-
- y = from_bcd(M48_ADDR[YEAR]);
- *year = y < 80 ? 2000 + y : 1900 + y;
- *month = from_bcd(M48_ADDR[MONTH]);
- *day = from_bcd(M48_ADDR[DAY]);
- /* day_of_week = M48_ADDR[DAY_OF_WEEK] & 0xf; */
- *hour = from_bcd(M48_ADDR[HOUR]);
- *minute = from_bcd(M48_ADDR[MINUTE]);
- *second = from_bcd(M48_ADDR[SECOND] & 0x7f);
-
- M48_ADDR[CONTROL] &= ~0x40; /* Clear READ bit */
-
- SYS_TOD_PROTECT();
-
- return 0;
-}
-
-int m48_tod_get_second(void)
-{
- return from_bcd(M48_ADDR[SECOND] & 0x7f);
-}
-
-/*
- * Watchdog function
- *
- * If usec is 0, the watchdog timer is disarmed.
- *
- * If usec is non-zero, the watchdog timer is armed (or re-armed) for
- * approximately usec microseconds (if the exact requested usec is
- * not supported by the chip, the next higher available value is used).
- *
- * Minimum watchdog timeout = 62500 usec
- * Maximum watchdog timeout = 124 sec (124000000 usec)
- */
-
-void m48_watchdog_arm(int usec)
-{
- int mpy, res;
-
- SYS_TOD_UNPROTECT();
-
- if (usec == 0) {
- res = 0;
- mpy = 0;
- } else if (usec < 2000000) { /* Resolution: 1/16s if below 2s */
- res = 0;
- mpy = (usec + 62499) / 62500;
- } else if (usec < 8000000) { /* Resolution: 1/4s if below 8s */
- res = 1;
- mpy = (usec + 249999) / 250000;
- } else if (usec < 32000000) { /* Resolution: 1s if below 32s */
- res = 2;
- mpy = (usec + 999999) / 1000000;
- } else { /* Resolution: 4s up to 124s */
- res = 3;
- mpy = (usec + 3999999) / 4000000;
- if (mpy > 31)
- mpy = 31;
- }
-
- M48_ADDR[WATCH] = (0x80 | /* Steer to RST signal (IRQ = N/C) */
- mpy << 2 |
- res);
-
- SYS_TOD_PROTECT();
-}
-
-/*
- * U-Boot RTC support.
- */
-int
-rtc_get( struct rtc_time *tmp )
-{
- m48_tod_get(&tmp->tm_year,
- &tmp->tm_mon,
- &tmp->tm_mday,
- &tmp->tm_hour,
- &tmp->tm_min,
- &tmp->tm_sec);
- tmp->tm_yday = 0;
- tmp->tm_isdst= 0;
-
-#ifdef RTC_DEBUG
- printf( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
- tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
- tmp->tm_hour, tmp->tm_min, tmp->tm_sec );
-#endif
-
- return 0;
-}
-
-int rtc_set( struct rtc_time *tmp )
-{
- m48_tod_set(tmp->tm_year, /* 1980-2079 */
- tmp->tm_mon, /* 01-12 */
- tmp->tm_mday, /* 01-31 */
- tmp->tm_hour, /* 00-23 */
- tmp->tm_min, /* 00-59 */
- tmp->tm_sec); /* 00-59 */
-
-#ifdef RTC_DEBUG
- printf( "Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
- tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
- tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
-#endif
-
- return 0;
-}
-
-void
-rtc_reset (void)
-{
- m48_tod_init();
-}
diff --git a/board/bmw/m48t59y.h b/board/bmw/m48t59y.h
deleted file mode 100644
index 717300d..0000000
--- a/board/bmw/m48t59y.h
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * SGS M48-T59Y TOD/NVRAM Driver
- *
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
- *
- * (C) Copyright 1999, by Curt McDowell, 08-06-99, Broadcom Corp.
- *
- * (C) Copyright 2001, James Dougherty, 07/18/01, Broadcom Corp.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __M48_T59_Y_H
-#define __M48_T59_Y_H
-
-/*
- * M48 T59Y -Timekeeping Battery backed SRAM.
- */
-
-int m48_tod_init(void);
-
-int m48_tod_set(int year,
- int month,
- int day,
- int hour,
- int minute,
- int second);
-
-int m48_tod_get(int *year,
- int *month,
- int *day,
- int *hour,
- int *minute,
- int *second);
-
-int m48_tod_get_second(void);
-
-void m48_watchdog_arm(int usec);
-
-#endif /*!__M48_T59_Y_H */
diff --git a/board/bmw/ns16550.c b/board/bmw/ns16550.c
deleted file mode 100644
index be455bb..0000000
--- a/board/bmw/ns16550.c
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * COM1 NS16550 support
- * originally from linux source (arch/powerpc/boot/ns16550.c)
- * modified to use CONFIG_SYS_ISA_MEM and new defines
- */
-
-#include <config.h>
-#include "ns16550.h"
-
-typedef struct NS16550 *NS16550_t;
-
-const NS16550_t COM_PORTS[] =
- { (NS16550_t) ((CONFIG_SYS_EUMB_ADDR) + 0x4500),
-(NS16550_t) ((CONFIG_SYS_EUMB_ADDR) + 0x4600) };
-
-volatile struct NS16550 *NS16550_init (int chan, int baud_divisor)
-{
- volatile struct NS16550 *com_port;
-
- com_port = (struct NS16550 *) COM_PORTS[chan];
- com_port->ier = 0x00;
- com_port->lcr = LCR_BKSE; /* Access baud rate */
- com_port->dll = baud_divisor & 0xff; /* 9600 baud */
- com_port->dlm = (baud_divisor >> 8) & 0xff;
- com_port->lcr = LCR_8N1; /* 8 data, 1 stop, no parity */
- com_port->mcr = MCR_RTS; /* RTS/DTR */
- com_port->fcr = FCR_FIFO_EN | FCR_RXSR | FCR_TXSR; /* Clear & enable FIFOs */
- return (com_port);
-}
-
-void NS16550_reinit (volatile struct NS16550 *com_port, int baud_divisor)
-{
- com_port->ier = 0x00;
- com_port->lcr = LCR_BKSE; /* Access baud rate */
- com_port->dll = baud_divisor & 0xff; /* 9600 baud */
- com_port->dlm = (baud_divisor >> 8) & 0xff;
- com_port->lcr = LCR_8N1; /* 8 data, 1 stop, no parity */
- com_port->mcr = MCR_RTS; /* RTS/DTR */
- com_port->fcr = FCR_FIFO_EN | FCR_RXSR | FCR_TXSR; /* Clear & enable FIFOs */
-}
-
-void NS16550_putc (volatile struct NS16550 *com_port, unsigned char c)
-{
- while ((com_port->lsr & LSR_THRE) == 0);
- com_port->thr = c;
-}
-
-unsigned char NS16550_getc (volatile struct NS16550 *com_port)
-{
- while ((com_port->lsr & LSR_DR) == 0);
- return (com_port->rbr);
-}
-
-int NS16550_tstc (volatile struct NS16550 *com_port)
-{
- return ((com_port->lsr & LSR_DR) != 0);
-}
diff --git a/board/bmw/ns16550.h b/board/bmw/ns16550.h
deleted file mode 100644
index 2087a4a..0000000
--- a/board/bmw/ns16550.h
+++ /dev/null
@@ -1,79 +0,0 @@
-/*
- * NS16550 Serial Port
- * originally from linux source (arch/powerpc/boot/ns16550.h)
- * modified slightly to
- * have addresses as offsets from CONFIG_SYS_ISA_BASE
- * added a few more definitions
- * added prototypes for ns16550.c
- * reduced no of com ports to 2
- * modifications (c) Rob Taylor, Flying Pig Systems. 2000.
- * further modified to support the 8245 duart
- * modifications (c) Paul Jimenez, Musenki, Inc. 2001.
- */
-
-
-struct NS16550 {
- unsigned char rbrthrdlb; /* 0 */
- unsigned char ierdmb; /* 1 */
- unsigned char iirfcrafr; /* 2 */
- unsigned char lcr; /* 3 */
- unsigned char mcr; /* 4 */
- unsigned char lsr; /* 5 */
- unsigned char msr; /* 6 */
- unsigned char scr; /* 7 */
- unsigned char reserved[2]; /* 8 & 9 */
- unsigned char dsr; /* 10 */
- unsigned char dcr; /* 11 */
-};
-
-
-#define rbr rbrthrdlb
-#define thr rbrthrdlb
-#define dll rbrthrdlb
-#define ier ierdmb
-#define dlm ierdmb
-#define iir iirfcrafr
-#define fcr iirfcrafr
-#define afr iirfcrafr
-
-#define FCR_FIFO_EN 0x01 /*fifo enable */
-#define FCR_RXSR 0x02 /*receiver soft reset */
-#define FCR_TXSR 0x04 /*transmitter soft reset */
-#define FCR_DMS 0x08 /* DMA Mode Select */
-
-#define MCR_RTS 0x02 /* Readyu to Send */
-#define MCR_LOOP 0x10 /* Local loopback mode enable */
-/* #define MCR_DTR 0x01 noton 8245 duart */
-/* #define MCR_DMA_EN 0x04 noton 8245 duart */
-/* #define MCR_TX_DFR 0x08 noton 8245 duart */
-
-#define LCR_WLS_MSK 0x03 /* character length slect mask */
-#define LCR_WLS_5 0x00 /* 5 bit character length */
-#define LCR_WLS_6 0x01 /* 6 bit character length */
-#define LCR_WLS_7 0x02 /* 7 bit character length */
-#define LCR_WLS_8 0x03 /* 8 bit character length */
-#define LCR_STB 0x04 /* Number of stop Bits, off = 1, on = 1.5 or 2) */
-#define LCR_PEN 0x08 /* Parity eneble */
-#define LCR_EPS 0x10 /* Even Parity Select */
-#define LCR_STKP 0x20 /* Stick Parity */
-#define LCR_SBRK 0x40 /* Set Break */
-#define LCR_BKSE 0x80 /* Bank select enable - aka DLAB on 8245 */
-
-#define LSR_DR 0x01 /* Data ready */
-#define LSR_OE 0x02 /* Overrun */
-#define LSR_PE 0x04 /* Parity error */
-#define LSR_FE 0x08 /* Framing error */
-#define LSR_BI 0x10 /* Break */
-#define LSR_THRE 0x20 /* Xmit holding register empty */
-#define LSR_TEMT 0x40 /* Xmitter empty */
-#define LSR_ERR 0x80 /* Error */
-
-/* useful defaults for LCR*/
-#define LCR_8N1 0x03
-
-
-volatile struct NS16550 *NS16550_init (int chan, int baud_divisor);
-void NS16550_putc (volatile struct NS16550 *com_port, unsigned char c);
-unsigned char NS16550_getc (volatile struct NS16550 *com_port);
-int NS16550_tstc (volatile struct NS16550 *com_port);
-void NS16550_reinit (volatile struct NS16550 *com_port, int baud_divisor);
diff --git a/board/bmw/serial.c b/board/bmw/serial.c
deleted file mode 100644
index 0c97f12..0000000
--- a/board/bmw/serial.c
+++ /dev/null
@@ -1,81 +0,0 @@
-/*
- * (C) Copyright 2000
- * Rob Taylor, Flying Pig Systems. robt at flyingpig.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include "ns16550.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#if CONFIG_CONS_INDEX == 1
-static struct NS16550 *console =
- (struct NS16550 *) (CONFIG_SYS_EUMB_ADDR + 0x4500);
-#elif CONFIG_CONS_INDEX == 2
-static struct NS16550 *console =
- (struct NS16550 *) (CONFIG_SYS_EUMB_ADDR + 0x4500);
-#else
-#error no valid console defined
-#endif
-
-extern ulong get_bus_freq (ulong);
-
-int serial_init (void)
-{
- int clock_divisor = gd->bus_clk / 16 / gd->baudrate;
-
- NS16550_init (CONFIG_CONS_INDEX - 1, clock_divisor);
-
- return (0);
-}
-
-void serial_putc (const char c)
-{
- if (c == '\n') {
- serial_putc ('\r');
- }
- NS16550_putc (console, c);
-}
-
-void serial_puts (const char *s)
-{
- while (*s) {
- serial_putc (*s++);
- }
-}
-
-
-int serial_getc (void)
-{
- return NS16550_getc (console);
-}
-
-int serial_tstc (void)
-{
- return NS16550_tstc (console);
-}
-
-void serial_setbrg (void)
-{
- int clock_divisor = get_bus_freq (0) / 16 / gd->baudrate;
-
- NS16550_reinit (console, clock_divisor);
-}
diff --git a/boards.cfg b/boards.cfg
index 7d4fe39..cdc01cb 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -532,7 +532,6 @@ Alaska8220 powerpc mpc8220 alaska
sorcery powerpc mpc8220
Yukon8220 powerpc mpc8220 alaska
A3000 powerpc mpc824x a3000
-BMW powerpc mpc824x bmw
CPC45 powerpc mpc824x cpc45 - - CPC45
CPC45_ROMBOOT powerpc mpc824x cpc45 - - CPC45:BOOT_ROM
CU824 powerpc mpc824x cu824
diff --git a/include/configs/BMW.h b/include/configs/BMW.h
deleted file mode 100644
index 633e9bd..0000000
--- a/include/configs/BMW.h
+++ /dev/null
@@ -1,302 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- *
- * Configuration settings for the CU824 board.
- *
- */
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * board/config.h - configuration options, board specific
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-
-#define CONFIG_MPC824X 1
-#define CONFIG_MPC8245 1
-#define CONFIG_BMW 1
-
-#define CONFIG_SYS_TEXT_BASE 0xFFF00000
-
-#define CONFIG_MISC_INIT_F 1 /* Use misc_init_f() */
-
-#define CONFIG_CONS_INDEX 1
-#define CONFIG_BAUDRATE 9600
-
-#define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */
-
-#define CONFIG_BOOTCOMMAND "bootm FF820000" /* autoboot command */
-#define CONFIG_BOOTDELAY 5
-
-#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Only use Onboard TSOP-16MB device */
-#define DOC_PASSIVE_PROBE 1
-#define CONFIG_SYS_DOC_SUPPORT_2000 1
-#define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM 1
-#define CONFIG_SYS_DOC_SHORT_TIMEOUT 1
-
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_DATE
-#define CONFIG_CMD_ELF
-#undef CONFIG_CMD_NET
-#undef CONFIG_CMD_NFS
-
-
-#if 0
-#define CONFIG_PCI 1
-#define CONFIG_PCI_PNP 1 /* PCI plug-and-play */
-#endif
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=>" /* Monitor Command Prompt */
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-
-/* Print Buffer Size
- */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-
-#define CONFIG_SYS_MAXARGS 8 /* Max number of command args */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-#define CONFIG_SYS_LOAD_ADDR 0x00100000 /* Default load address */
-
-/*-----------------------------------------------------------------------
- * Start addresses for the final memory configuration
- * (Set up by the startup code)
- * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
- */
-#define CONFIG_SYS_SDRAM_BASE 0x00000000
-
-#define CONFIG_SYS_FLASH_BASE0_PRELIM 0xFFF00000 /* FLASH bank on RCS#0 */
-#define CONFIG_SYS_FLASH_BASE1_PRELIM 0xFF800000 /* FLASH bank on RCS#1 */
-#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_MONITOR_BASE
-#define CONFIG_SYS_FLASH_BANKS { CONFIG_SYS_FLASH_BASE0_PRELIM , CONFIG_SYS_FLASH_BASE1_PRELIM }
-
-/* even though FLASHP_BASE is FF800000, with 4MB is RCS0, the
- * reset vector is actually located at FFB00100, but the 8245
- * takes care of us.
- */
-#define CONFIG_SYS_RESET_ADDRESS 0xFFF00100
-
-#define CONFIG_SYS_EUMB_ADDR 0xFC000000
-
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
-
-#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
-#define CONFIG_SYS_MALLOC_LEN (2048 << 10) /* Reserve 2MB for malloc() */
-
-#define CONFIG_SYS_MEMTEST_START 0x00004000 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END 0x04000000 /* 0 ... 32 MB in DRAM */
-
- /* Maximum amount of RAM.
- */
-#define CONFIG_SYS_MAX_RAM_SIZE 0x04000000 /* 0 .. 64 MB of (S)DRAM */
-
-
-#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
-#undef CONFIG_SYS_RAMBOOT
-#else
-#define CONFIG_SYS_RAMBOOT
-#endif
-
-
-/*-----------------------------------------------------------------------
- * Definitions for initial stack pointer and data area
- */
-#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_MONITOR_LEN
-#define CONFIG_SYS_INIT_RAM_SIZE 0x2F00 /* Size of used area in DPRAM */
-#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-
-/*
- * Low Level Configuration Settings
- * (address mappings, register initial values, etc.)
- * You should know what you are doing if you make changes here.
- * For the detail description refer to the MPC8240 user's manual.
- */
-
-#define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */
-#define CONFIG_SYS_HZ 1000
-
-#define CONFIG_SYS_ETH_DEV_FN 0x7800
-#define CONFIG_SYS_ETH_IOBASE 0x00104000
-
- /* Bit-field values for MCCR1.
- */
-#define CONFIG_SYS_ROMNAL 0xf
-#define CONFIG_SYS_ROMFAL 0x1f
-#define CONFIG_SYS_DBUS_SIZE 0x3
-
- /* Bit-field values for MCCR2.
- */
-#define CONFIG_SYS_TSWAIT 0x5 /* Transaction Start Wait States timer */
-#define CONFIG_SYS_REFINT 0x400 /* Refresh interval FIXME: was 0t430 */
-
- /* Burst To Precharge. Bits of this value go to MCCR3 and MCCR4.
- */
-#define CONFIG_SYS_BSTOPRE 0 /* FIXME: was 192 */
-
- /* Bit-field values for MCCR3.
- */
-#define CONFIG_SYS_REFREC 2 /* Refresh to activate interval */
-
- /* Bit-field values for MCCR4.
- */
-#define CONFIG_SYS_PRETOACT 2 /* Precharge to activate interval FIXME: was 2 */
-#define CONFIG_SYS_ACTTOPRE 5 /* Activate to Precharge interval FIXME: was 5 */
-#define CONFIG_SYS_SDMODE_CAS_LAT 3 /* SDMODE CAS latancy */
-#define CONFIG_SYS_SDMODE_WRAP 0 /* SDMODE wrap type */
-#define CONFIG_SYS_SDMODE_BURSTLEN 3 /* SDMODE Burst length */
-#define CONFIG_SYS_ACTORW 0xa /* FIXME was 2 */
-#define CONFIG_SYS_REGISTERD_TYPE_BUFFER 1
-
-#define CONFIG_SYS_PGMAX 0x0 /* how long the 8240 reatins the currently accessed page in memory FIXME: was 0x32*/
-
-#define CONFIG_SYS_SDRAM_DSCD 0x20 /* SDRAM data in sample clock delay - note bottom 3 bits MUST be 0 */
-
-/* Memory bank settings.
- * Only bits 20-29 are actually used from these vales to set the
- * start/end addresses. The upper two bits will always be 0, and the lower
- * 20 bits will be 0x00000 for a start address, or 0xfffff for an end
- * address. Refer to the MPC8240 book.
- */
-
-#define CONFIG_SYS_BANK0_START 0x00000000
-#define CONFIG_SYS_BANK0_END (CONFIG_SYS_MAX_RAM_SIZE - 1)
-#define CONFIG_SYS_BANK0_ENABLE 1
-#define CONFIG_SYS_BANK1_START 0x3ff00000
-#define CONFIG_SYS_BANK1_END 0x3fffffff
-#define CONFIG_SYS_BANK1_ENABLE 0
-#define CONFIG_SYS_BANK2_START 0x3ff00000
-#define CONFIG_SYS_BANK2_END 0x3fffffff
-#define CONFIG_SYS_BANK2_ENABLE 0
-#define CONFIG_SYS_BANK3_START 0x3ff00000
-#define CONFIG_SYS_BANK3_END 0x3fffffff
-#define CONFIG_SYS_BANK3_ENABLE 0
-#define CONFIG_SYS_BANK4_START 0x3ff00000
-#define CONFIG_SYS_BANK4_END 0x3fffffff
-#define CONFIG_SYS_BANK4_ENABLE 0
-#define CONFIG_SYS_BANK5_START 0x3ff00000
-#define CONFIG_SYS_BANK5_END 0x3fffffff
-#define CONFIG_SYS_BANK5_ENABLE 0
-#define CONFIG_SYS_BANK6_START 0x3ff00000
-#define CONFIG_SYS_BANK6_END 0x3fffffff
-#define CONFIG_SYS_BANK6_ENABLE 0
-#define CONFIG_SYS_BANK7_START 0x3ff00000
-#define CONFIG_SYS_BANK7_END 0x3fffffff
-#define CONFIG_SYS_BANK7_ENABLE 0
-
-#define CONFIG_SYS_ODCR 0xff
-
-#define CONFIG_PCI 1 /* Include PCI support */
-#undef CONFIG_PCI_PNP
-
-/* PCI Memory space(s) */
-#define PCI_MEM_SPACE1_START 0x80000000
-#define PCI_MEM_SPACE2_START 0xfd000000
-
-/* ROM Spaces */
-#include "../board/bmw/bmw.h"
-
-/* BAT configuration */
-#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
-
-#define CONFIG_SYS_IBAT1L (0x70000000 | BATL_PP_10 | BATL_CACHEINHIBIT)
-#define CONFIG_SYS_IBAT1U (0x70000000 | BATU_BL_256M | BATU_VS | BATU_VP)
-
-#define CONFIG_SYS_IBAT2L (0x80000000 | BATL_PP_10 | BATL_CACHEINHIBIT)
-#define CONFIG_SYS_IBAT2U (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP)
-
-#define CONFIG_SYS_IBAT3L (0xF0000000 | BATL_PP_10 | BATL_CACHEINHIBIT)
-#define CONFIG_SYS_IBAT3U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
-
-#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
-#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
-#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
-#define CONFIG_SYS_DBAT2L CONFIG_SYS_IBAT2L
-#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
-#define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L
-#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
-
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
-
-/*
- * FLASH organization
- */
-#define CONFIG_SYS_MAX_FLASH_BANKS 0 /* Max number of flash banks */
-#define CONFIG_SYS_MAX_FLASH_SECT 64 /* Max number of sectors per flash */
-
-#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
-
-/*
- * Warining: environment is not EMBEDDED in the U-Boot code.
- * It's stored in flash separately.
- */
-#define CONFIG_ENV_IS_IN_NVRAM 1
-#define CONFIG_ENV_OVERWRITE 1
-#define CONFIG_SYS_NVRAM_ACCESS_ROUTINE 1
-#define CONFIG_ENV_ADDR 0x7c004000 /* right at the start of NVRAM */
-#define CONFIG_ENV_SIZE 0x1ff0 /* Size of the Environment - 8K */
-#define CONFIG_ENV_OFFSET 0 /* starting right@the beginning */
-
-/*
- * Cache Configuration
- */
-#define CONFIG_SYS_CACHELINE_SIZE 32
-#if defined(CONFIG_CMD_KGDB)
-# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
-#endif
-
-#endif /* __CONFIG_H */
--
1.7.12.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [U-Boot] [PATCH] mpc82xx: Remove BMW board port
2012-09-19 13:18 ` [U-Boot] [PATCH] mpc82xx: Remove BMW board port Stefan Roese
@ 2012-09-19 22:52 ` Marek Vasut
2012-10-17 14:56 ` [U-Boot] " Tom Rini
1 sibling, 0 replies; 10+ messages in thread
From: Marek Vasut @ 2012-09-19 22:52 UTC (permalink / raw)
To: u-boot
Dear Stefan Roese,
> As the board seems to be unmaintained for some time, lets remove
> the support in mainline completely.
>
> Signed-off-by: Stefan Roese <sr@denx.de>
> Cc: Marek Vasut <marek.vasut@gmail.com>
> Cc: James F. Dougherty <jfd@broadcom.com>
> Cc: Wolfgang Denk <wd@denx.de>
[...]
One less serial driver to care for. Stefan, good job!
Acked-by: Marek Vasut <marex@denx.de>
btw what about git format-patch -D ? ;-)
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 10+ messages in thread
* [U-Boot] [PATCH] ppc4xx: Remove AP1000 board support
2012-09-19 13:18 ` [U-Boot] [PATCH] ppc4xx: Remove AP1000 " Stefan Roese
@ 2012-09-19 22:53 ` Marek Vasut
0 siblings, 0 replies; 10+ messages in thread
From: Marek Vasut @ 2012-09-19 22:53 UTC (permalink / raw)
To: u-boot
Dear Stefan Roese,
> As the board seems to be unmaintained for some time, lets remove
> the support in mainline completely.
>
> Signed-off-by: Stefan Roese <sr@denx.de>
> Cc: Marek Vasut <marek.vasut@gmail.com>
> Cc: James MacAulay <james.macaulay@amirix.com>
> ---
[...]
All for it, one less serial driver to care for.
Acked-by: Marek Vasut <marex@denx.de>
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 10+ messages in thread
* [U-Boot] [PATCH] ppc4xx: Remove ML2 board support
2012-09-19 13:18 [U-Boot] [PATCH] ppc4xx: Remove ML2 board support Stefan Roese
2012-09-19 13:18 ` [U-Boot] [PATCH] ppc4xx: Remove AP1000 " Stefan Roese
2012-09-19 13:18 ` [U-Boot] [PATCH] mpc82xx: Remove BMW board port Stefan Roese
@ 2012-09-19 22:53 ` Marek Vasut
2 siblings, 0 replies; 10+ messages in thread
From: Marek Vasut @ 2012-09-19 22:53 UTC (permalink / raw)
To: u-boot
Dear Stefan Roese,
> As the board seems to be unmaintained for some time, lets remove
> the support in mainline completely.
>
> Signed-off-by: Stefan Roese <sr@denx.de>
> Cc: Marek Vasut <marek.vasut@gmail.com>
> Cc: Peter De Schrijver <p2@mind.be>
[...]
And one less :)
Acked-by: Marek Vasut <marex@denx.de>
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 10+ messages in thread
* [U-Boot] mpc82xx: Remove BMW board port
2012-09-19 13:18 ` [U-Boot] [PATCH] mpc82xx: Remove BMW board port Stefan Roese
2012-09-19 22:52 ` Marek Vasut
@ 2012-10-17 14:56 ` Tom Rini
[not found] ` <5E54AA067725CE49B35C6B8358FD2CB81DF20692@SJEXCHMB10.corp.ad.broadcom.com>
1 sibling, 1 reply; 10+ messages in thread
From: Tom Rini @ 2012-10-17 14:56 UTC (permalink / raw)
To: u-boot
On Wed, Sep 19, 2012 at 03:18:53AM -0000, Stefan Roese wrote:
> As the board seems to be unmaintained for some time, lets remove
> the support in mainline completely.
>
> Signed-off-by: Stefan Roese <sr@denx.de>
> Cc: Marek Vasut <marek.vasut@gmail.com>
> Cc: James F. Dougherty <jfd@broadcom.com>
> Cc: Wolfgang Denk <wd@denx.de>
> Acked-by: Marek Vasut <marex@denx.de>
Applied to u-boot/master, thanks!
--
Tom
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^ permalink raw reply [flat|nested] 10+ messages in thread
* [U-Boot] mpc82xx: Remove BMW board port
[not found] ` <5E54AA067725CE49B35C6B8358FD2CB81DF20692@SJEXCHMB10.corp.ad.broadcom.com>
@ 2012-10-18 23:25 ` Tom Rini
[not found] ` <5E54AA067725CE49B35C6B8358FD2CB81DF22833@SJEXCHMB10.corp.ad.broadcom.com>
0 siblings, 1 reply; 10+ messages in thread
From: Tom Rini @ 2012-10-18 23:25 UTC (permalink / raw)
To: u-boot
-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1
On 10/17/12 14:39, James Dougherty wrote:
> Hi Tom, Hi Stefan,
>
> I am still using this platform. Please don't remove! What do you
> need to have it supported?
Well, the original message you were cc'd on went about a month without
reply. If you wish to bring the board back and be the responsible
MAINTAINER, that's fine, but with me, but it is a commitment. Thanks!
>
> Thank you! -james
>
>
> -----Original Message----- From: Tom Rini
> [mailto:tom.rini at gmail.com] On Behalf Of Tom Rini Sent: Wednesday,
> October 17, 2012 7:56 AM To: Stefan Roese Cc: u-boot at lists.denx.de;
> James Dougherty Subject: Re: [U-Boot] mpc82xx: Remove BMW board
> port
>
> On Wed, Sep 19, 2012 at 03:18:53AM -0000, Stefan Roese wrote:
>
>> As the board seems to be unmaintained for some time, lets remove
>> the support in mainline completely.
>>
>> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Marek Vasut
>> <marek.vasut@gmail.com> Cc: James F. Dougherty
>> <jfd@broadcom.com> Cc: Wolfgang Denk <wd@denx.de> Acked-by: Marek
>> Vasut <marex@denx.de>
>
> Applied to u-boot/master, thanks!
>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
Comment: Using GnuPG with Mozilla - http://www.enigmail.net/
iQIcBAEBAgAGBQJQgI/YAAoJENk4IS6UOR1WPGkP+gK6en2/k+xaDxSxQ6iVyhoC
ifkcTshtm/e0LKW3AnWcLsr6M54r7TvVz+7mjsHZ/XJ0NWiGOSmEtEjSGXjYF4e1
LkZfsC8+80aUVMeUUiWZaBRzbDtB7rnwr0tVu5ERC7LsU6rE0zMGDjxhqST2EEtW
dOLyY98fo/IEhEx6KZ+X5VMhNZ4tvqW3QQD4f+/Z+3RRMew3wxxiQdDThLotQZSn
q8A2Q29p8xs0apenfFWPyRMsdm9aBiyogxGEH5ZmwtWriEJ3FQmdymZ4H3uCm92X
+CFmkr9LAQVpDdi74makkWKt3GtmlqwTXE+dbSXTYIw6wKoUVJ+C32QP6UNdWlh1
m2JVmYZydLULKaJav9cERVd19BLFq5PZCEwpVKilugb/fcBqePQ5LZtT5jraA2J5
iz+ALzlU20omvgRecxR0YpvzWtJANDnDsrbAgjJPrbF8mTp9r8r5lLSb0nPheNiJ
EO/e3uKz8/Er8wbgAbFPz3Sqxdhfvuz0JSCdJYJkM9gWkfkGl4uGjFjgTjsOHMQb
TQ25Ws1Vug2HW/KA2YokQofSZrjIeYWgl1tjr+SPWqMuwOcjsuffEZl9vbUcBNiA
mo256ZNl0TUgwqLbadiU8SvNCYuETMv3to8XX2mxSYZ9K6gGwGOGu4A9u3o3E/TJ
FkPMZKJa8ROonFKAAPZx
=NXr6
-----END PGP SIGNATURE-----
^ permalink raw reply [flat|nested] 10+ messages in thread
* [U-Boot] mpc82xx: Remove BMW board port
[not found] ` <5E54AA067725CE49B35C6B8358FD2CB81DF22833@SJEXCHMB10.corp.ad.broadcom.com>
@ 2012-10-19 5:22 ` Tom Rini
2012-10-19 14:04 ` Wolfgang Denk
0 siblings, 1 reply; 10+ messages in thread
From: Tom Rini @ 2012-10-19 5:22 UTC (permalink / raw)
To: u-boot
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Hash: SHA1
On 10/18/12 19:06, James Dougherty wrote:
> Hi Tom,
>
> I never received the email.
Welp, lets move forward. If you want to be the maintainer, submit a
patch that brings the board back and adds yourself and the baord to
the MAINTAINERS file. The biggest expectation, aside from dealing
with breakage when reported, is to test the releases, at least a
little bit, on the hardware. Thanks!
- --
Tom
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
Comment: Using GnuPG with Mozilla - http://www.enigmail.net/
iQIcBAEBAgAGBQJQgOOoAAoJENk4IS6UOR1Wqm4P/0rZafkYizqMnVkNk0gl0snl
pw1JJTFsnyKTZ3k/qc4yltJIaDO7hNhW7D28k7hyvQ+ysV5hSPsgVtsSZCcMu72e
Jmirn2WxlExjO25aovsxmmz8GLDN4Dz0D3iKkrXlhDVwht2RBErqOb7R9dw+XtRA
LRRhU2wMAPyZk0cPMI1WzC4kxKBJzcQzksqNhm4P0rB9it1eBjWXJrBQUyuiVMfN
G8355FCZw49/8EebwYSjxhShYF5iPXxBiLgqJXjuOD3iCun6yfLVe2qXoI+vX3Gs
U9x8FdLQCuzOrj85LttWAEH6zEbxuZxi+85jHZ4aUdej2+MHMuDltM4gP9LBw1Dk
4FAYsE9O2acRERDJUmeazJhKRbyn5ks+Wad8mEqsAyvBOurwLuIbLGSqjs+6x2ej
EvxtCnLc20+zIIMR/8l8BFSmYVX4jCqamWeJg1VRfu0ptUwvk3L3/0JSVv2tfUu+
fY2G9XDqxHJAQmQvkf9B2xFAUB8Nu3cO1DZOc+I5ay/nPfdnjhIOpmOWZhwS8bJm
/C9qF0TYpvr61mv5KEllfAyBoYSQ4AdL4vn9lc07SUVR2ByR+CR7lHb5VWojCZhS
S+GHZh//jJ2BBA1IyD2aMfxr2Ko8PWmLBW3xSrlB7rFQWacp9xqoRTQMl71jVnS9
pHRYlup0dNgW0k1Rk2cX
=7P4V
-----END PGP SIGNATURE-----
^ permalink raw reply [flat|nested] 10+ messages in thread
* [U-Boot] mpc82xx: Remove BMW board port
2012-10-19 5:22 ` Tom Rini
@ 2012-10-19 14:04 ` Wolfgang Denk
0 siblings, 0 replies; 10+ messages in thread
From: Wolfgang Denk @ 2012-10-19 14:04 UTC (permalink / raw)
To: u-boot
Dear James,
it appears you wrote (as Tom quotes so):
> > I never received the email.
It appears you have a major problem with your e-mail setup, then,
because none of your messages reached the mailing list either.
Please check your mail configuration.
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
I have yet to add the ESP-driver to the kernel to read the mind of
the user... - Linus Torvalds in
<Pine.LNX.3.91.960426110644.24860I-100000@linux.cs.Helsinki.FI>
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2012-10-19 14:04 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2012-09-19 13:18 [U-Boot] [PATCH] ppc4xx: Remove ML2 board support Stefan Roese
2012-09-19 13:18 ` [U-Boot] [PATCH] ppc4xx: Remove AP1000 " Stefan Roese
2012-09-19 22:53 ` Marek Vasut
2012-09-19 13:18 ` [U-Boot] [PATCH] mpc82xx: Remove BMW board port Stefan Roese
2012-09-19 22:52 ` Marek Vasut
2012-10-17 14:56 ` [U-Boot] " Tom Rini
[not found] ` <5E54AA067725CE49B35C6B8358FD2CB81DF20692@SJEXCHMB10.corp.ad.broadcom.com>
2012-10-18 23:25 ` Tom Rini
[not found] ` <5E54AA067725CE49B35C6B8358FD2CB81DF22833@SJEXCHMB10.corp.ad.broadcom.com>
2012-10-19 5:22 ` Tom Rini
2012-10-19 14:04 ` Wolfgang Denk
2012-09-19 22:53 ` [U-Boot] [PATCH] ppc4xx: Remove ML2 board support Marek Vasut
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