From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Date: Sat, 22 Sep 2012 02:49:10 +0200 Subject: [U-Boot] [RFC PATCH v2 5/6] am33xx: init OTG hardware and new musb gadget driver In-Reply-To: <1347837274-17864-6-git-send-email-ilya.yanok@cogentembedded.com> References: <1347837274-17864-1-git-send-email-ilya.yanok@cogentembedded.com> <1347837274-17864-6-git-send-email-ilya.yanok@cogentembedded.com> Message-ID: <201209220249.10672.marex@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Dear Ilya Yanok, > AM33xx has support for dual port MUSB OTG controller. This patch > adds initialization for the controller using new MUSB gadget > driver and ether gadget. > > Signed-off-by: Ilya Yanok > --- > Changes in v2: > - init both musb IPs (conditionally) from arch_init not > from eth_initialize > > arch/arm/cpu/armv7/am33xx/board.c | 107 > ++++++++++++++++++++++++++- arch/arm/cpu/armv7/am33xx/clock.c | > 8 ++ > arch/arm/include/asm/arch-am33xx/cpu.h | 11 ++- > arch/arm/include/asm/arch-am33xx/hardware.h | 4 + > 4 files changed, 126 insertions(+), 4 deletions(-) > > diff --git a/arch/arm/cpu/armv7/am33xx/board.c > b/arch/arm/cpu/armv7/am33xx/board.c index b387ac2..9007356 100644 > --- a/arch/arm/cpu/armv7/am33xx/board.c > +++ b/arch/arm/cpu/armv7/am33xx/board.c > @@ -33,6 +33,11 @@ > #include > #include > #include > +#include > +#include > +#include > +#include > +#include > > DECLARE_GLOBAL_DATA_PTR; > > @@ -227,6 +232,88 @@ void setup_clocks_for_console(void) > return; > } > > +/* AM33XX has two MUSB controllers which can be host or gadget */ > +#if (defined(CONFIG_MUSB_GADGET) || defined(CONFIG_MUSB_HOST)) && \ > + (defined(CONFIG_AM335X_USB0) || defined(CONFIG_AM335X_USB1)) > +/* USB 2.0 PHY Control */ > +#define CM_PHY_PWRDN (1 << 0) > +#define CM_PHY_OTG_PWRDN (1 << 1) > +#define OTGVDET_EN (1 << 19) > +#define OTGSESSENDEN (1 << 20) > + > +static void am33xx_usb_set_phy_power(u8 on, u32 *reg_addr) > +{ > + u32 usb_ctrl_reg; > + > + usb_ctrl_reg = readl(reg_addr); > + if (on) { > + usb_ctrl_reg &= ~(CM_PHY_PWRDN | CM_PHY_OTG_PWRDN); > + usb_ctrl_reg |= (OTGVDET_EN | OTGSESSENDEN); > + } else { > + usb_ctrl_reg |= (CM_PHY_PWRDN | CM_PHY_OTG_PWRDN); > + } > + writel(usb_ctrl_reg, reg_addr); clrsetbits_le32() ? [...]