* [U-Boot] [PATCH 3/3] add Eukrea's CPUIMX25
2012-09-22 20:50 [U-Boot] [PATCH 1/3] mx25: add CPU revision 1.2 Eric Bénard
2012-09-22 20:50 ` [U-Boot] [PATCH 2/3] mx25: fix compilation when CONFIG_FSL_ESDHC is enabled Eric Bénard
@ 2012-09-22 20:50 ` Eric Bénard
2012-09-22 21:18 ` Otavio Salvador
2012-09-22 21:12 ` [U-Boot] [PATCH 1/3] mx25: add CPU revision 1.2 Otavio Salvador
2012-09-23 15:59 ` Stefano Babic
3 siblings, 1 reply; 10+ messages in thread
From: Eric Bénard @ 2012-09-22 20:50 UTC (permalink / raw)
To: u-boot
this board is based on an i.MX25 from Freescale.
It consists of a SOM containing :
- NAND flash (internal or external boot supported and tested)
- mDDR (64MB tested)
- ethernet PHY connected in RMII mode (tested)
and a baseboard containing :
- a serial transceiver on UART1 (tested)
- a SDCard connector on eSDHC1 (tested)
bootlog :
U-Boot 2012.07-rc1-00029-gca2becc-dirty (Sep 22 2012 - 22:28:35)
CPU: Freescale i.MX25 rev1.2 at 399 MHz
Reset cause: POR
DRAM: 64 MiB
WARNING: Caches not enabled
NAND: 256 MiB
MMC: FSL_SDHC: 0
*** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
Net: FEC
Hit any key to stop autoboot: 0
CPUIMX25 U-Boot > mmc rescan
CPUIMX25 U-Boot > mmc part
Partition Map for MMC device 0 -- Partition Type: DOS
Partition Start Sector Num Sectors Type
1 2048 262144 b
Signed-off-by: Eric B?nard <eric@eukrea.com>
---
MAINTAINERS | 2 +
board/eukrea/cpuimx25/Makefile | 44 +++++++
board/eukrea/cpuimx25/config.mk | 5 +
board/eukrea/cpuimx25/cpuimx25.c | 123 ++++++++++++++++++
board/eukrea/cpuimx25/imximage.cfg | 55 ++++++++
board/eukrea/cpuimx25/lowlevel_init.S | 113 +++++++++++++++++
boards.cfg | 2 +
include/configs/cpuimx25.h | 196 +++++++++++++++++++++++++++++
nand_spl/board/eukrea/cpuimx25/Makefile | 79 ++++++++++++
nand_spl/board/eukrea/cpuimx25/config.mk | 1 +
nand_spl/board/eukrea/cpuimx25/u-boot.lds | 83 ++++++++++++
11 files changed, 703 insertions(+), 0 deletions(-)
create mode 100644 board/eukrea/cpuimx25/Makefile
create mode 100644 board/eukrea/cpuimx25/config.mk
create mode 100644 board/eukrea/cpuimx25/cpuimx25.c
create mode 100644 board/eukrea/cpuimx25/imximage.cfg
create mode 100644 board/eukrea/cpuimx25/lowlevel_init.S
create mode 100644 include/configs/cpuimx25.h
create mode 100644 nand_spl/board/eukrea/cpuimx25/Makefile
create mode 100644 nand_spl/board/eukrea/cpuimx25/config.mk
create mode 100644 nand_spl/board/eukrea/cpuimx25/u-boot.lds
diff --git a/MAINTAINERS b/MAINTAINERS
index fd0c65c..25a58ab 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -603,6 +603,8 @@ Eric Benard <eric@eukrea.com>
cpuat91 ARM920T
cpu9260 ARM926EJS (AT91SAM9260 SoC)
cpu9G20 ARM926EJS (AT91SAM9G20 SoC)
+ cpuimx25 i.MX25
+ cpuimx25nand i.MX25
Ajay Bhargav <ajay.bhargav@einfochips.com>
diff --git a/board/eukrea/cpuimx25/Makefile b/board/eukrea/cpuimx25/Makefile
new file mode 100644
index 0000000..46131fd
--- /dev/null
+++ b/board/eukrea/cpuimx25/Makefile
@@ -0,0 +1,44 @@
+#
+# (C) Copyright 2009 DENX Software Engineering
+# Author: John Rigby <jcrigby@gmail.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).o
+
+COBJS := cpuimx25.o
+SOBJS := lowlevel_init.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+#########################################################################
+
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/eukrea/cpuimx25/config.mk b/board/eukrea/cpuimx25/config.mk
new file mode 100644
index 0000000..18b2883
--- /dev/null
+++ b/board/eukrea/cpuimx25/config.mk
@@ -0,0 +1,5 @@
+ifdef CONFIG_NAND_SPL
+CONFIG_SYS_TEXT_BASE = 0x810c0000
+else
+CONFIG_SYS_TEXT_BASE = 0x81200000
+endif
diff --git a/board/eukrea/cpuimx25/cpuimx25.c b/board/eukrea/cpuimx25/cpuimx25.c
new file mode 100644
index 0000000..72fa8a5
--- /dev/null
+++ b/board/eukrea/cpuimx25/cpuimx25.c
@@ -0,0 +1,123 @@
+/*
+ * (C) Copyright 2009 DENX Software Engineering
+ * (C) Copyright 2012 Eukrea Electromatique <www.eukrea.com>
+ * Eric Benard <eric@eukrea.com>
+ *
+ * Based on tx25.c:
+ * Author: John Rigby <jrigby@gmail.com>
+ *
+ * Based on imx27lite.c:
+ * Copyright (C) 2008,2009 Eric Jarrige <jorasse@users.sourceforge.net>
+ * Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com>
+ * And:
+ * RedBoot tx25_misc.c Copyright (C) 2009 Red Hat
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/imx25-pinmux.h>
+#include <asm/gpio.h>
+#include <asm/arch/sys_proto.h>
+#include <mmc.h>
+#include <fsl_esdhc.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_FSL_ESDHC
+struct fsl_esdhc_cfg esdhc_cfg[1] = {
+ {IMX_MMC_SDHC1_BASE},
+};
+#endif
+
+int board_init()
+{
+#ifdef CONFIG_MXC_UART
+ mx25_uart1_init_pins();
+#endif
+ /* board id for linux */
+ gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
+ return 0;
+}
+
+int board_late_init(void)
+{
+#ifdef CONFIG_FEC_MXC
+ mx25_fec_init_pins();
+#endif
+ return 0;
+}
+
+int dram_init(void)
+{
+ /* dram_init must store complete ramsize in gd->ram_size */
+ gd->ram_size = get_ram_size((void *)PHYS_SDRAM_1,
+ PHYS_SDRAM_1_SIZE);
+ return 0;
+}
+
+void dram_init_banksize(void)
+{
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+ gd->bd->bi_dram[0].size = get_ram_size((void *)PHYS_SDRAM_1,
+ PHYS_SDRAM_1_SIZE);
+}
+
+int checkboard(void)
+{
+ printf("Eukrea Electromatique CPUIMX25\n");
+ return 0;
+}
+
+#ifdef CONFIG_FSL_ESDHC
+int board_mmc_getcd(struct mmc *mmc)
+{
+ struct iomuxc_mux_ctl *muxctl;
+ struct iomuxc_pad_ctl *padctl;
+ struct gpio_regs *gpio2 = (struct gpio_regs *)IMX_GPIO2_BASE;
+ u32 val;
+
+ muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE;
+ padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE;
+
+ writel(MX25_PIN_MUX_MODE(5), &muxctl->pad_de_b);
+
+ writel(0x0, &padctl->pad_de_b);
+
+ val = readl(&gpio2->gpio_dir) & ~(1 << 20);
+ writel(val, &gpio2->gpio_dir);
+ val = readl(&gpio2->gpio_dr) & (1 << 20);
+ return val ? 0 : 1;
+
+}
+
+int board_mmc_init(bd_t *bis)
+{
+ struct iomuxc_mux_ctl *muxctl;
+ struct iomuxc_pad_ctl *padctl;
+ u32 sdhc1_mux_mode = MX25_PIN_MUX_MODE(0) | MX25_PIN_MUX_SION;
+ muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE;
+ writel(sdhc1_mux_mode, &muxctl->pad_sd1_cmd);
+ writel(sdhc1_mux_mode, &muxctl->pad_sd1_clk);
+ writel(sdhc1_mux_mode, &muxctl->pad_sd1_data0);
+ writel(sdhc1_mux_mode, &muxctl->pad_sd1_data1);
+ writel(sdhc1_mux_mode, &muxctl->pad_sd1_data2);
+ writel(sdhc1_mux_mode, &muxctl->pad_sd1_data3);
+ return fsl_esdhc_initialize(bis, &esdhc_cfg[0]);
+}
+#endif
diff --git a/board/eukrea/cpuimx25/imximage.cfg b/board/eukrea/cpuimx25/imximage.cfg
new file mode 100644
index 0000000..c0b7b20
--- /dev/null
+++ b/board/eukrea/cpuimx25/imximage.cfg
@@ -0,0 +1,55 @@
+#
+# (C) Copyright 2009
+# Stefano Babic DENX Software Engineering sbabic at denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# Refer docs/README.imxmage for more details about how-to configure
+# and create imximage boot image
+#
+# The syntax is taken as close as possible with the kwbimage
+
+# Boot Device : one of
+# nand, sd, spi
+
+BOOT_FROM nand
+
+# Device Configuration Data (DCD)
+#
+# Each entry must have the format:
+# Addr-type Address Value
+#
+# where:
+# Addr-type register length (1,2 or 4 bytes)
+# Address absolute address of the register
+# value value to be stored in the register
+
+# MDDR init
+DATA 4 0xb8001010 0x00000004
+DATA 4 0xb8001000 0x92100000
+DATA 1 0x80000400 0x12344321
+DATA 4 0xb8001000 0xa2100000
+DATA 4 0x80000000 0x12344321
+DATA 4 0x80000000 0x12344321
+DATA 4 0xb8001000 0xb2100000
+DATA 1 0x80000033 0xda
+DATA 1 0x81000000 0xff
+DATA 4 0xb8001000 0x82216080
+DATA 4 0xb8001004 0x00295729
+DATA 4 0x53f80008 0x20034000
+
+# Enable the clocks
+DATA 4 0x53f8000c 0x1fffffff
+DATA 4 0x53f80010 0xffffffff
+DATA 4 0x53f80014 0xfdfff
diff --git a/board/eukrea/cpuimx25/lowlevel_init.S b/board/eukrea/cpuimx25/lowlevel_init.S
new file mode 100644
index 0000000..76e4e6f
--- /dev/null
+++ b/board/eukrea/cpuimx25/lowlevel_init.S
@@ -0,0 +1,113 @@
+/*
+ * (C) Copyright 2009 DENX Software Engineering
+ * (C) Copyright 2012 Eukrea Electromatique <www.eukrea.com>
+ * Eric Benard <eric@eukrea.com>
+ *
+ * Based on tx25 and zmx25:
+ * Author: John Rigby <jrigby@gmail.com>
+ *
+ * Based on U-Boot and RedBoot sources for several different i.mx
+ * platforms.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <asm/macro.h>
+#include <asm/arch/macro.h>
+#include <asm/arch/imx-regs.h>
+#include <generated/asm-offsets.h>
+
+.macro init_m3if
+ write32 0xb8003000, 0x1
+.endm
+
+.macro init_clocks
+ write32 0x53f80064, 0x00000000
+ write32 0x53f80008, 0x20034000
+
+ /*
+ * enable all implemented clocks in all three
+ * clock control registers
+ */
+ write32 0x53f8000c, 0x1fffffff
+ write32 0x53f80010, 0xffffffff
+ write32 0x53f80014, 0xfdfff
+.endm
+
+.macro init_lpddr
+ /* Skip SDRAM initialization if we run from RAM */
+ cmp pc, #0x80000000
+ bls 1f
+ cmp pc, #0x90000000
+ bhi 1f
+
+ mov pc, lr
+
+1: ldr r0, =IMX_ESDRAMC_BASE
+ ldr r2, =IMX_SDRAM_BANK0_BASE
+
+ /*
+ * reset SDRAM controller
+ * then wait for initialization to complete
+ */
+ ldr r1, =(1 << 1) | (1 << 2) | (1 << 3)
+ str r1, [r0, #ESDRAMC_ESDMISC]
+2: ldr r3, [r0, #ESDRAMC_ESDMISC]
+ tst r3, #(1 << 31)
+ beq 2b
+ ldr r1, =(1 << 2)
+ str r1, [r0, #ESDRAMC_ESDMISC]
+
+ ldr r1, =0x00295729
+ str r1, [r0, #ESDRAMC_ESDCFG0]
+
+ /* control | precharge */
+ ldr r1, =0x92100000
+ str r1, [r0, #ESDRAMC_ESDCTL0]
+ /* dram command encoded in address */
+ strb r1, [r2, #0x400]
+
+ /* auto refresh */
+ ldr r1, =0xa2100000
+ str r1, [r0, #ESDRAMC_ESDCTL0]
+ /* read dram twice to auto refresh */
+ str r3, [r2]
+ str r3, [r2]
+
+ /* control | load mode */
+ ldr r1, =0xb2100000
+ str r1, [r0, #ESDRAMC_ESDCTL0]
+
+ /* mode register of lpddram */
+ strb r1, [r2, #0x33]
+
+ /* extended mode register of lpddrram */
+ ldr r2, =0x81000000
+ strb r1, [r2]
+
+ /* control | normal */
+ ldr r1, =0x82216080
+ str r1, [r0, #ESDRAMC_ESDCTL0]
+.endm
+
+.globl lowlevel_init
+lowlevel_init:
+ init_aips
+ init_max
+ init_m3if
+ init_clocks
+ init_lpddr
+ mov pc, lr
diff --git a/boards.cfg b/boards.cfg
index 2d36d83..51a681c 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -165,6 +165,8 @@ dockstar arm arm926ejs - Seagate
tk71 arm arm926ejs tk71 karo kirkwood
devkit3250 arm arm926ejs devkit3250 timll lpc32xx
jadecpu arm arm926ejs jadecpu syteco mb86r0x
+cpuimx25 arm arm926ejs cpuimx25 eukrea mx25 cpuimx25:IMX_CONFIG=board/eukrea/cpuimx25/imximage.cfg
+cpuimx25nand arm arm926ejs cpuimx25 eukrea mx25 cpuimx25:NAND_U_BOOT
mx25pdk arm arm926ejs mx25pdk freescale mx25 mx25pdk:IMX_CONFIG=board/freescale/mx25pdk/imximage.cfg
tx25 arm arm926ejs tx25 karo mx25
zmx25 arm arm926ejs zmx25 syteco mx25
diff --git a/include/configs/cpuimx25.h b/include/configs/cpuimx25.h
new file mode 100644
index 0000000..84f0a6f
--- /dev/null
+++ b/include/configs/cpuimx25.h
@@ -0,0 +1,196 @@
+/*
+ * (C) Copyright 2009 DENX Software Engineering
+ * (C) Copyright 2012 Eukrea Electromatique <www.eukrea.com>
+ * Eric Benard <eric@eukrea.com>
+ *
+ * Based on tx25.c:
+ * Author: John Rigby <jrigby@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * Eukrea CPUIMX25 board - SoC Configuration
+ */
+#define CONFIG_MX25
+#define CONFIG_MX25_CLK32 32768 /* OSC32K frequency */
+#define CONFIG_SYS_HZ 1000
+
+#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 kB for U-Boot */
+
+#ifndef MACH_TYPE_EUKREA_CPUIMX25SD
+#define MACH_TYPE_EUKREA_CPUIMX25SD 2820
+#endif
+
+#define CONFIG_MACH_TYPE MACH_TYPE_EUKREA_CPUIMX25SD
+
+#ifdef CONFIG_NAND_SPL
+/* Start copying real U-boot from the second page */
+#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x800
+#define CONFIG_SYS_NAND_U_BOOT_SIZE (CONFIG_SYS_MONITOR_LEN - \
+ CONFIG_SYS_NAND_U_BOOT_OFFS)
+
+#define CONFIG_SYS_NAND_U_BOOT_DST (0x81200000)
+#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
+
+#define CONFIG_SYS_NAND_PAGE_SIZE 2048
+#define CONFIG_SYS_NAND_SPARE_SIZE 64
+#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
+#define CONFIG_SYS_NAND_PAGE_COUNT 64
+#define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024)
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
+#endif
+
+#define CONFIG_DISPLAY_CPUINFO
+
+#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+
+/*
+ * Memory Info
+ */
+/* malloc() len */
+#define CONFIG_SYS_MALLOC_LEN (1 << 20) /* 1 MiB */
+/*
+ * Board has 2 32MB banks of DRAM but there is a bug when using
+ * both so only the first is configured
+ */
+#define CONFIG_NR_DRAM_BANKS 1
+
+#define PHYS_SDRAM_1 0x80000000
+#define PHYS_SDRAM_1_SIZE 0x04000000
+
+/* 8MB DRAM test */
+#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
+#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1+0x0800000)
+
+/*
+ * Serial Info
+ */
+#define CONFIG_MXC_UART
+#define CONFIG_MXC_UART_BASE UART1_BASE
+#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
+#define CONFIG_BAUDRATE 115200 /* Default baud rate */
+
+#define CONFIG_MXC_GPIO
+
+/*
+ * MMC
+ */
+#define CONFIG_FSL_ESDHC
+#define CONFIG_SYS_FSL_ESDHC_ADDR (0x53FB4000)
+#define CONFIG_SYS_FSL_ESDHC_NUM 1
+#define CONFIG_SYS_FSL_ESDHC_USE_PIO 1
+
+#define CONFIG_MMC
+#define CONFIG_CMD_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_CMD_FAT
+#define CONFIG_DOS_PARTITION
+
+/*
+ * Flash & Environment
+ */
+/* No NOR flash present */
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_ENV_OFFSET CONFIG_SYS_MONITOR_LEN
+#define CONFIG_ENV_SIZE (128 * 1024) /* 128 kB NAND block size */
+#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
+
+/* NAND */
+#define CONFIG_ENV_IS_IN_NAND
+#define CONFIG_NAND_MXC
+#define CONFIG_NAND_MXC_V1_1
+#define CONFIG_MXC_NAND_REGS_BASE (0xBB000000)
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define CONFIG_SYS_NAND_BASE (0xBB000000)
+#define CONFIG_JFFS2_NAND
+#define CONFIG_MXC_NAND_HWECC
+#define CONFIG_SYS_NAND_LARGEPAGE
+
+/* U-Boot general configuration */
+#define CONFIG_SYS_PROMPT "CPUIMX25 U-Boot > "
+#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
+/* Print buffer sz */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
+ sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
+/* Boot Argument Buffer Size */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_SYS_LONGHELP
+
+/* U-Boot commands */
+#include <config_cmd_default.h>
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PING
+
+/*
+ * Ethernet
+ */
+#define CONFIG_FEC_MXC
+#define CONFIG_FEC_MXC_PHYADDR 0
+#define CONFIG_MII
+#define CONFIG_CMD_NET
+#define CONFIG_BOARD_LATE_INIT
+#define CONFIG_ENV_OVERWRITE
+
+#define CONFIG_BOOTDELAY 5
+
+#define CONFIG_LOADADDR 0x81000000 /* loadaddr env var */
+#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
+
+#define xstr(s) str(s)
+#define str(s) #s
+
+#define CONFIG_HOSTNAME "eukrea-cpuimx25"
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=eth0\0" \
+ "nfsargs=setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=${serverip}:${rootpath}\0" \
+ "ramargs=setenv bootargs root=/dev/ram rw\0" \
+ "addip=setenv bootargs ${bootargs} " \
+ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
+ ":${hostname}:${netdev}:off panic=1\0" \
+ "addtty=setenv bootargs ${bootargs}" \
+ " console=ttymxc0,${baudrate}\0" \
+ "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
+ "addmisc=setenv bootargs ${bootargs}\0" \
+ "u-boot="CONFIG_HOSTNAME"/u-boot-"CONFIG_HOSTNAME".bin\0" \
+ "kernel_addr_r=" xstr(CONFIG_LOADADDR) "\0" \
+ "hostname="CONFIG_HOSTNAME"\0" \
+ "bootfile="CONFIG_HOSTNAME"/uImage-"CONFIG_HOSTNAME".bin\0" \
+ "rootpath=/srv/nfs/"CONFIG_HOSTNAME"\0" \
+ "net_nfs=tftp ${kernel_addr_r} ${bootfile};" \
+ "run nfsargs addip addtty addmtd addmisc;" \
+ "bootm\0" \
+ "bootcmd=run net_nfs\0" \
+ "load=tftp ${loadaddr} ${u-boot}\0" \
+ "update=nand erase 0 40000;nand write ${loadaddr} 0 40000\0" \
+ "upd=run load update\0" \
+
+/* additions for new relocation code, must be added to all boards */
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
+ GENERATED_GBL_DATA_SIZE)
+
+#endif /* __CONFIG_H */
diff --git a/nand_spl/board/eukrea/cpuimx25/Makefile b/nand_spl/board/eukrea/cpuimx25/Makefile
new file mode 100644
index 0000000..d8b19c6
--- /dev/null
+++ b/nand_spl/board/eukrea/cpuimx25/Makefile
@@ -0,0 +1,79 @@
+#
+# (C) Copyright 2009 DENX Software Engineering
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundatio; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+CONFIG_NAND_SPL = y
+
+include $(TOPDIR)/config.mk
+include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk
+
+nandobj := $(OBJTREE)/nand_spl/
+
+LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
+LDFLAGS := -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(LDFLAGS) \
+ $(LDFLAGS_FINAL)
+AFLAGS += -DCONFIG_SPL_BUILD -DCONFIG_NAND_SPL
+CFLAGS += -DCONFIG_SPL_BUILD -DCONFIG_NAND_SPL
+
+SOBJS = start.o lowlevel_init.o
+COBJS = nand_boot_fsl_nfc.o
+
+SRCS := $(SRCTREE)/nand_spl/nand_boot_fsl_nfc.c
+SRCS += $(SRCTREE)/arch/arm/cpu/arm926ejs/start.S
+SRCS += $(SRCTREE)/board/eukrea/cpuimx25/lowlevel_init.S
+OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
+__OBJS := $(SOBJS) $(COBJS)
+LNDIR := $(nandobj)board/$(BOARDDIR)
+
+ALL = $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
+
+all: $(obj).depend $(ALL)
+
+$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
+ $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
+
+$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl
+ $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
+
+$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot.lds
+ cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) \
+ -Map $(nandobj)u-boot-spl.map \
+ -o $@
+
+$(nandobj)u-boot.lds: $(LDSCRIPT)
+ $(CPP) $(CPPFLAGS) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$^ >$@
+
+#########################################################################
+
+$(obj)%.o: $(SRCTREE)/arch/arm/cpu/arm926ejs/%.S
+ $(CC) $(AFLAGS) -c -o $@ $<
+
+$(obj)%.o: $(SRCTREE)/board/eukrea/cpuimx25/%.S
+ $(CC) $(AFLAGS) -c -o $@ $<
+
+$(obj)%.o: $(SRCTREE)/nand_spl/%.c
+ $(CC) $(CFLAGS) -c -o $@ $<
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/nand_spl/board/eukrea/cpuimx25/config.mk b/nand_spl/board/eukrea/cpuimx25/config.mk
new file mode 100644
index 0000000..68afbf1
--- /dev/null
+++ b/nand_spl/board/eukrea/cpuimx25/config.mk
@@ -0,0 +1 @@
+PAD_TO := 2048
diff --git a/nand_spl/board/eukrea/cpuimx25/u-boot.lds b/nand_spl/board/eukrea/cpuimx25/u-boot.lds
new file mode 100644
index 0000000..d2b08f6
--- /dev/null
+++ b/nand_spl/board/eukrea/cpuimx25/u-boot.lds
@@ -0,0 +1,83 @@
+/*
+ * (C) Copyright 2009
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+ . = 0x00000000;
+
+ . = ALIGN(4);
+ .text :
+ {
+ start.o (.text)
+ lowlevel_init.o (.text)
+ nand_boot_fsl_nfc.o (.text)
+ *(.text)
+ . = 2K;
+ }
+
+ . = ALIGN(4);
+ .rodata : { *(.rodata) }
+
+ . = ALIGN(4);
+ .data : {
+ *(.data)
+ }
+
+ . = ALIGN(4);
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+ . = ALIGN(4);
+
+ .rel.dyn : {
+ __rel_dyn_start = .;
+ *(.rel*)
+ __rel_dyn_end = .;
+ }
+
+ .dynsym : {
+ __dynsym_start = .;
+ *(.dynsym)
+ }
+
+ _end = .;
+
+ .bss __rel_dyn_start (OVERLAY) : {
+ __bss_start = .;
+ *(.bss)
+ . = ALIGN(4);
+ __bss_end__ = .;
+ }
+
+ /DISCARD/ : { *(.bss*) }
+ /DISCARD/ : { *(.dynstr*) }
+ /DISCARD/ : { *(.dynsym*) }
+ /DISCARD/ : { *(.dynamic*) }
+ /DISCARD/ : { *(.hash*) }
+ /DISCARD/ : { *(.plt*) }
+ /DISCARD/ : { *(.interp*) }
+ /DISCARD/ : { *(.gnu*) }
+}
--
1.7.7.6
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