[U-Boot] [PATCH] ARM926: Add mb to the cache invalidate/flush

Marek Vasut
2012-10-09T22:44:29Z

Add memory barrier to cache invalidate and flush calls.

Signed-off-by: Marek Vasut <marex@denx.de>
CC: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
---
arch/arm/cpu/arm926ejs/cache.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/arch/arm/cpu/arm926ejs/cache.c b/arch/arm/cpu/arm926ejs/cache.c
index 2740ad7..1c67608 100644
--- a/arch/arm/cpu/arm926ejs/cache.c
+++ b/arch/arm/cpu/arm926ejs/cache.c
@@ -30,7 +30,7 @@

void invalidate_dcache_all(void)
{
- asm volatile("mcr p15, 0, %0, c7, c6, 0\n" : : "r"(0));
+ asm volatile("mcr p15, 0, %0, c7, c6, 0\n" : : "r"(0) : "memory");
}

void flush_dcache_all(void)
@@ -67,7 +67,8 @@ void invalidate_dcache_range(unsigned long start, unsigned long stop)
return;

while (start < stop) {
- asm volatile("mcr p15, 0, %0, c7, c6, 1\n" : : "r"(start));
+ asm volatile("mcr p15, 0, %0, c7, c6, 1\n"
+ : : "r"(start) : "memory");
start += CONFIG_SYS_CACHELINE_SIZE;
}
}
@@ -78,11 +79,12 @@ void flush_dcache_range(unsigned long start, unsigned long stop)
return;

while (start < stop) {
- asm volatile("mcr p15, 0, %0, c7, c14, 1\n" : : "r"(start));
+ asm volatile("mcr p15, 0, %0, c7, c14, 1\n"
+ : : "r"(start) : "memory");
start += CONFIG_SYS_CACHELINE_SIZE;
}

- asm volatile("mcr p15, 0, %0, c7, c10, 4\n" : : "r"(0));
+ asm volatile("mcr p15, 0, %0, c7, c10, 4\n" : : "r"(0) : "memory");
}

void flush_cache(unsigned long start, unsigned long size)
--
1.7.10.4