From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tom Rini Date: Thu, 18 Oct 2012 10:12:58 -0700 Subject: [U-Boot] [PATCHv2 2/6] am33xx: move ti i2c baseboard header handling to board/ti/am335x/ In-Reply-To: <1350559273-7280-3-git-send-email-peter.korsgaard@barco.com> References: <1350559273-7280-1-git-send-email-peter.korsgaard@barco.com> <1350559273-7280-3-git-send-email-peter.korsgaard@barco.com> Message-ID: <20121018171258.GT27770@bill-the-cat> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Thu, Oct 18, 2012 at 01:21:09PM +0200, Peter Korsgaard wrote: > The i2c header is specific to ti(-derived) boards, and not generic for all > am335x boards. > > Signed-off-by: Peter Korsgaard [snip] > -/* > - * early system init of muxing and clocks. > - */ > -void s_init(void) > -{ > - /* WDT1 is already running when the bootloader gets control > - * Disable it to avoid "random" resets > - */ > - writel(0xAAAA, &wdtimer->wdtwspr); > - while (readl(&wdtimer->wdtwwps) != 0x0) > - ; > - writel(0x5555, &wdtimer->wdtwspr); > - while (readl(&wdtimer->wdtwwps) != 0x0) > - ; > - > -#ifdef CONFIG_SPL_BUILD > - /* Setup the PLLs and the clocks for the peripherals */ > - pll_init(); > - > - /* UART softreset */ > - u32 regVal; > - > - enable_uart0_pin_mux(); > - > - regVal = readl(&uart_base->uartsyscfg); > - regVal |= UART_RESET; > - writel(regVal, &uart_base->uartsyscfg); > - while ((readl(&uart_base->uartsyssts) & > - UART_CLK_RUNNING_MASK) != UART_CLK_RUNNING_MASK) > - ; > - > - /* Disable smart idle */ > - regVal = readl(&uart_base->uartsyscfg); > - regVal |= UART_SMART_IDLE_EN; > - writel(regVal, &uart_base->uartsyscfg); > - > - gd = &gdata; > - > - preloader_console_init(); > - > - /* Initalize the board header */ > - enable_i2c0_pin_mux(); > - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); > - if (read_eeprom() < 0) > - puts("Could not get board ID.\n"); > - > - enable_board_pin_mux(&header); > - if (board_is_evm_sk()) { > - /* > - * EVM SK 1.2A and later use gpio0_7 to enable DDR3. > - * This is safe enough to do on older revs. > - */ > - gpio_request(GPIO_DDR_VTT_EN, "ddr_vtt_en"); > - gpio_direction_output(GPIO_DDR_VTT_EN, 1); > - } > - > - config_ddr(board_memory_type()); > -#endif > -} My concern is that a lot of this should be general. But I'm willing to re-investigate how to do things once you're able to fully move your platform to mainline. -- Tom -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 836 bytes Desc: Digital signature URL: