From: Anatolij Gustschin <agust@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 1/1] ipu common: reset ipuv3 correctly
Date: Sat, 20 Oct 2012 01:58:12 +0200 [thread overview]
Message-ID: <20121020015812.0f16e0ee@wker> (raw)
In-Reply-To: <1349532964-8480-1-git-send-email-Ying.liu@freescale.com>
Hi,
On Sat, 6 Oct 2012 22:16:04 +0800
Liu Ying <Ying.liu@freescale.com> wrote:
> From: Liu Ying <Ying.Liu@freescale.com>
>
> This patch checks self-clear sw_ipu_rst bit in
> SCR register of SRC controller to be cleared
> after setting it to high to reset IPUv3. This
> makes sure that IPUv3 finishes sofware reset.
> A timeout mechanism is added to stop polling
> on the bit status in case the bit could not be
> cleared by the hardware automatically within
> 10 millisecond.
>
> Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
> ---
> drivers/video/ipu_common.c | 10 ++++++++++
> 1 files changed, 10 insertions(+), 0 deletions(-)
applied, thanks!
Anatolij
next prev parent reply other threads:[~2012-10-19 23:58 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-06 14:16 [U-Boot] [PATCH 1/1] ipu common: reset ipuv3 correctly Liu Ying
2012-10-06 18:00 ` Eric Nelson
2012-10-19 23:58 ` Anatolij Gustschin [this message]
-- strict thread matches above, loose matches on Subject: below --
2012-10-06 10:32 Liu Ying
2012-10-06 12:59 ` Fabio Estevam
2012-10-06 12:59 ` Fabio Estevam
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