From mboxrd@z Thu Jan 1 00:00:00 1970 From: Albert ARIBAUD Date: Sat, 10 Nov 2012 12:29:33 +0100 Subject: [U-Boot] [PATCH v2] arm1136: Fix enable_caches() In-Reply-To: <33411742.333145.1351694462336.JavaMail.root@advansee.com> References: <20121005202314.22af6462@lilith> <33411742.333145.1351694462336.JavaMail.root@advansee.com> Message-ID: <20121110122933.46d201d8@lilith> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Beno?t, On Wed, 31 Oct 2012 15:41:02 +0100 (CET), Beno?t Th?baudeau wrote: > Hi Albert, > > On Friday, October 5, 2012 8:23:14 PM, Albert ARIBAUD wrote; > > On Thu, 4 Oct 2012 22:04:02 +0200 (CEST), Beno?t Th?baudeau > > wrote: > > > > > enable_caches() did not enable icache if CONFIG_SYS_ICACHE_OFF was > > > not defined > > > but CONFIG_SYS_DCACHE_OFF was. > > > > > > Signed-off-by: Beno?t Th?baudeau > > > Cc: Albert Aribaud > > > --- > > > This patch supersedes http://patchwork.ozlabs.org/patch/177263/ . > > > > > > Changes for v2: > > > - Move enable_caches() outside of the main #if in order to fix > > > this icache > > > issue rather than doing only #if cosmetic cleanup. > > > > > > .../arch/arm/cpu/arm1136/cpu.c | 22 > > > +++++++++++--------- > > > 1 file changed, 12 insertions(+), 10 deletions(-) > > > > > > diff --git u-boot-arm-1dfc916.orig/arch/arm/cpu/arm1136/cpu.c > > > u-boot-arm-1dfc916/arch/arm/cpu/arm1136/cpu.c > > > index b98e3d9..32a4c24 100644 > > > --- u-boot-arm-1dfc916.orig/arch/arm/cpu/arm1136/cpu.c > > > +++ u-boot-arm-1dfc916/arch/arm/cpu/arm1136/cpu.c > > > @@ -141,16 +141,6 @@ void flush_cache(unsigned long start, unsigned > > > long size) > > > flush_dcache_range(start, start + size); > > > } > > > > > > -void enable_caches(void) > > > -{ > > > -#ifndef CONFIG_SYS_ICACHE_OFF > > > - icache_enable(); > > > -#endif > > > -#ifndef CONFIG_SYS_DCACHE_OFF > > > - dcache_enable(); > > > -#endif > > > -} > > > - > > > #else /* #ifndef CONFIG_SYS_DCACHE_OFF */ > > > void invalidate_dcache_all(void) > > > { > > > @@ -172,3 +162,15 @@ void flush_cache(unsigned long start, unsigned > > > long size) > > > { > > > } > > > #endif /* #ifndef CONFIG_SYS_DCACHE_OFF */ > > > + > > > +#if !defined(CONFIG_SYS_ICACHE_OFF) || > > > !defined(CONFIG_SYS_DCACHE_OFF) > > > +void enable_caches(void) > > > +{ > > > +#ifndef CONFIG_SYS_ICACHE_OFF > > > + icache_enable(); > > > +#endif > > > +#ifndef CONFIG_SYS_DCACHE_OFF > > > + dcache_enable(); > > > +#endif > > > +} > > > +#endif > > > > > > > Applied to u-boot-arm/next, thanks! > > I know that's true (I had seen it applied), but it has vanished since then. Now, > I can't find it in u-boot-arm/next nor in u-boot-arm/master. This is perhaps > related to the rebase that you had to do at some point. > > Best regards, > Beno?t RE-applied to u-boot-arm/master, thanks for pointing this out and apologies for the temporary disappearance. Amicalement, -- Albert.