[U-Boot] [PATCH V4 1/7] ARM: bcm2835: add mailbox driver

[U-Boot] [PATCH V4 1/7] ARM: bcm2835: add mailbox driver

[Stephen Warren]

The BCM2835 SoC contains (at least) two CPUs; the VideoCore (a/k/a "GPU")
and the ARM CPU. The ARM CPU is often thought of as the main CPU.
However, the VideoCore actually controls the initial SoC boot, and hides
much of the hardware behind a protocol. This protocol is transported
using the SoC's mailbox hardware module.

Here, we add a very simplistic driver for the mailbox module, and define
a few structures for the property messages.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
---
v4: Rebased onto latest u-boot-arm/master; no real change.
v3: Re-license to GPL-v2 or later.
v2:
* Added documentation to mbox.h.
* Implemented macros to set up headers and tags.
* Implemented error-checking of response bits in bcm2835_mbox_call_prop().
* Reworked tag structs based on experience writing LCD driver.
* Added a lot more video-related tag structs.
* Added debug spew and error messages to mbox.c; useful when debugging LCD.
* Removed __packed attributes from message structs.
* Removed stale FIXME comments.
---
 arch/arm/cpu/arm1176/bcm2835/Makefile    |    2 +-
 arch/arm/cpu/arm1176/bcm2835/mbox.c      |  164 ++++++++++++
 arch/arm/include/asm/arch-bcm2835/mbox.h |  407 ++++++++++++++++++++++++++++++
 3 files changed, 572 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/cpu/arm1176/bcm2835/mbox.c
 create mode 100644 arch/arm/include/asm/arch-bcm2835/mbox.h

diff --git a/arch/arm/cpu/arm1176/bcm2835/Makefile b/arch/arm/cpu/arm1176/bcm2835/Makefile
index 95da6a8..135de42 100644
--- a/arch/arm/cpu/arm1176/bcm2835/Makefile
+++ b/arch/arm/cpu/arm1176/bcm2835/Makefile
@@ -17,7 +17,7 @@ include $(TOPDIR)/config.mk
 LIB	= $(obj)lib$(SOC).o
 
 SOBJS	:= lowlevel_init.o
-COBJS	:= init.o reset.o timer.o
+COBJS	:= init.o reset.o timer.o mbox.o
 
 SRCS	:= $(SOBJS:.o=.c) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
diff --git a/arch/arm/cpu/arm1176/bcm2835/mbox.c b/arch/arm/cpu/arm1176/bcm2835/mbox.c
new file mode 100644
index 0000000..fd65e33
--- /dev/null
+++ b/arch/arm/cpu/arm1176/bcm2835/mbox.c
@@ -0,0 +1,164 @@
+/*
+ * (C) Copyright 2012 Stephen Warren
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/mbox.h>
+
+#define TIMEOUT (100 * 1000) /* 100mS in uS */
+
+int bcm2835_mbox_call_raw(u32 chan, u32 send, u32 *recv)
+{
+	struct bcm2835_mbox_regs *regs =
+		(struct bcm2835_mbox_regs *)BCM2835_MBOX_PHYSADDR;
+	ulong endtime = get_timer(0) + TIMEOUT;
+	u32 val;
+
+	debug("time: %lu timeout: %lu\n", get_timer(0), endtime);
+
+	if (send & BCM2835_CHAN_MASK) {
+		printf("mbox: Illegal mbox data 0x%08x\n", send);
+		return -1;
+	}
+
+	/* Drain any stale responses */
+
+	for (;;) {
+		val = readl(&regs->status);
+		if (val & BCM2835_MBOX_STATUS_RD_EMPTY)
+			break;
+		if (get_timer(0) >= endtime) {
+			printf("mbox: Timeout draining stale responses\n");
+			return -1;
+		}
+		val = readl(&regs->read);
+	}
+
+	/* Wait for space to send */
+
+	for (;;) {
+		val = readl(&regs->status);
+		if (!(val & BCM2835_MBOX_STATUS_WR_FULL))
+			break;
+		if (get_timer(0) >= endtime) {
+			printf("mbox: Timeout waiting for send space\n");
+			return -1;
+		}
+	}
+
+	/* Send the request */
+
+	val = BCM2835_MBOX_PACK(chan, send);
+	debug("mbox: TX raw: 0x%08x\n", val);
+	writel(val, &regs->write);
+
+	/* Wait for the response */
+
+	for (;;) {
+		val = readl(&regs->status);
+		if (!(val & BCM2835_MBOX_STATUS_RD_EMPTY))
+			break;
+		if (get_timer(0) >= endtime) {
+			printf("mbox: Timeout waiting for response\n");
+			return -1;
+		}
+	}
+
+	/* Read the response */
+
+	val = readl(&regs->read);
+	debug("mbox: RX raw: 0x%08x\n", val);
+
+	/* Validate the response */
+
+	if (BCM2835_MBOX_UNPACK_CHAN(val) != chan) {
+		printf("mbox: Response channel mismatch\n");
+		return -1;
+	}
+
+	*recv = BCM2835_MBOX_UNPACK_DATA(val);
+
+	return 0;
+}
+
+#ifdef DEBUG
+void dump_buf(struct bcm2835_mbox_hdr *buffer)
+{
+	u32 *p;
+	u32 words;
+	int i;
+
+	p = (u32 *)buffer;
+	words = buffer->buf_size / 4;
+	for (i = 0; i < words; i++)
+		printf("    0x%04x: 0x%08x\n", i * 4, p[i]);
+}
+#endif
+
+int bcm2835_mbox_call_prop(u32 chan, struct bcm2835_mbox_hdr *buffer)
+{
+	int ret;
+	u32 rbuffer;
+	struct bcm2835_mbox_tag_hdr *tag;
+	int tag_index;
+
+#ifdef DEBUG
+	printf("mbox: TX buffer\n");
+	dump_buf(buffer);
+#endif
+
+	ret = bcm2835_mbox_call_raw(chan, (u32)buffer, &rbuffer);
+	if (ret)
+		return ret;
+	if (rbuffer != (u32)buffer) {
+		printf("mbox: Response buffer mismatch\n");
+		return -1;
+	}
+
+#ifdef DEBUG
+	printf("mbox: RX buffer\n");
+	dump_buf(buffer);
+#endif
+
+	/* Validate overall response status */
+
+	if (buffer->code != BCM2835_MBOX_RESP_CODE_SUCCESS) {
+		printf("mbox: Header response code invalid\n");
+		return -1;
+	}
+
+	/* Validate each tag's response status */
+
+	tag = (void *)(buffer + 1);
+	tag_index = 0;
+	while (tag->tag) {
+		if (!(tag->val_len & BCM2835_MBOX_TAG_VAL_LEN_RESPONSE)) {
+			printf("mbox: Tag %d missing val_len response bit\n",
+				tag_index);
+			return -1;
+		}
+		/*
+		 * Clear the reponse bit so clients can just look right at the
+		 * length field without extra processing
+		 */
+		tag->val_len &= ~BCM2835_MBOX_TAG_VAL_LEN_RESPONSE;
+		tag = (void *)(((u8 *)tag) + sizeof(*tag) + tag->val_buf_size);
+		tag_index++;
+	}
+
+	return 0;
+}
diff --git a/arch/arm/include/asm/arch-bcm2835/mbox.h b/arch/arm/include/asm/arch-bcm2835/mbox.h
new file mode 100644
index 0000000..4752091
--- /dev/null
+++ b/arch/arm/include/asm/arch-bcm2835/mbox.h
@@ -0,0 +1,407 @@
+/*
+ * (C) Copyright 2012 Stephen Warren
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _BCM2835_MBOX_H
+#define _BCM2835_MBOX_H
+
+#include <linux/compiler.h>
+
+/*
+ * The BCM2835 SoC contains (at least) two CPUs; the VideoCore (a/k/a "GPU")
+ * and the ARM CPU. The ARM CPU is often thought of as the main CPU.
+ * However, the VideoCore actually controls the initial SoC boot, and hides
+ * much of the hardware behind a protocol. This protocol is transported
+ * using the SoC's mailbox hardware module.
+ *
+ * The mailbox hardware supports passing 32-bit values back and forth.
+ * Presumably by software convention of the firmware, the bottom 4 bits of the
+ * value are used to indicate a logical channel, and the upper 28 bits are the
+ * actual payload. Various channels exist using these simple raw messages. See
+ * https://github.com/raspberrypi/firmware/wiki/Mailboxes for a list. As an
+ * example, the messages on the power management channel are a bitmask of
+ * devices whose power should be enabled.
+ *
+ * The property mailbox channel passes messages that contain the (16-byte
+ * aligned) ARM physical address of a memory buffer. This buffer is passed to
+ * the VC for processing, is modified in-place by the VC, and the address then
+ * passed back to the ARM CPU as the response mailbox message to indicate
+ * request completion. The buffers have a generic and extensible format; each
+ * buffer contains a standard header, a list of "tags", and a terminating zero
+ * entry. Each tag contains an ID indicating its type, and length fields for
+ * generic parsing. With some limitations, an arbitrary set of tags may be
+ * combined together into a single message buffer. This file defines structs
+ * representing the header and many individual tag layouts and IDs.
+ */
+
+/* Raw mailbox HW */
+
+#define BCM2835_MBOX_PHYSADDR	0x2000b880
+
+struct bcm2835_mbox_regs {
+	u32 read;
+	u32 rsvd0[5];
+	u32 status;
+	u32 config;
+	u32 write;
+};
+
+#define BCM2835_MBOX_STATUS_WR_FULL	0x80000000
+#define BCM2835_MBOX_STATUS_RD_EMPTY	0x40000000
+
+/* Lower 4-bits are channel ID */
+#define BCM2835_CHAN_MASK		0xf
+#define BCM2835_MBOX_PACK(chan, data)	(((data) & (~BCM2835_CHAN_MASK)) | \
+					 (chan & BCM2835_CHAN_MASK))
+#define BCM2835_MBOX_UNPACK_CHAN(val)	((val) & BCM2835_CHAN_MASK)
+#define BCM2835_MBOX_UNPACK_DATA(val)	((val) & (~BCM2835_CHAN_MASK))
+
+/* Property mailbox buffer structures */
+
+#define BCM2835_MBOX_PROP_CHAN		8
+
+/* All message buffers must start with this header */
+struct bcm2835_mbox_hdr {
+	u32 buf_size;
+	u32 code;
+};
+
+#define BCM2835_MBOX_REQ_CODE		0
+#define BCM2835_MBOX_RESP_CODE_SUCCESS	0x80000000
+
+#define BCM2835_MBOX_INIT_HDR(_m_) { \
+		memset((_m_), 0, sizeof(*(_m_))); \
+		(_m_)->hdr.buf_size = sizeof(*(_m_)); \
+		(_m_)->hdr.code = 0; \
+		(_m_)->end_tag = 0; \
+	}
+
+/*
+ * A message buffer contains a list of tags. Each tag must also start with
+ * a standardized header.
+ */
+struct bcm2835_mbox_tag_hdr {
+	u32 tag;
+	u32 val_buf_size;
+	u32 val_len;
+};
+
+#define BCM2835_MBOX_INIT_TAG(_t_, _id_) { \
+		(_t_)->tag_hdr.tag = BCM2835_MBOX_TAG_##_id_; \
+		(_t_)->tag_hdr.val_buf_size = sizeof((_t_)->body); \
+		(_t_)->tag_hdr.val_len = sizeof((_t_)->body.req); \
+	}
+
+#define BCM2835_MBOX_INIT_TAG_NO_REQ(_t_, _id_) { \
+		(_t_)->tag_hdr.tag = BCM2835_MBOX_TAG_##_id_; \
+		(_t_)->tag_hdr.val_buf_size = sizeof((_t_)->body); \
+		(_t_)->tag_hdr.val_len = 0; \
+	}
+
+/* When responding, the VC sets this bit in val_len to indicate a response */
+#define BCM2835_MBOX_TAG_VAL_LEN_RESPONSE	0x80000000
+
+/*
+ * Below we define the ID and struct for many possible tags. This header only
+ * defines individual tag structs, not entire message structs, since in
+ * general an arbitrary set of tags may be combined into a single message.
+ * Clients of the mbox API are expected to define their own overall message
+ * structures by combining the header, a set of tags, and a terminating
+ * entry. For example,
+ *
+ * struct msg {
+ *     struct bcm2835_mbox_hdr hdr;
+ *     struct bcm2835_mbox_tag_get_arm_mem get_arm_mem;
+ *     ... perhaps other tags here ...
+ *     u32 end_tag;
+ * };
+ */
+
+#define BCM2835_MBOX_TAG_GET_ARM_MEMORY		0x00010005
+
+struct bcm2835_mbox_tag_get_arm_mem {
+	struct bcm2835_mbox_tag_hdr tag_hdr;
+	union {
+		struct {
+		} req;
+		struct {
+			u32 mem_base;
+			u32 mem_size;
+		} resp;
+	} body;
+};
+
+#define BCM2835_MBOX_TAG_ALLOCATE_BUFFER	0x00040001
+
+struct bcm2835_mbox_tag_allocate_buffer {
+	struct bcm2835_mbox_tag_hdr tag_hdr;
+	union {
+		struct {
+			u32 alignment;
+		} req;
+		struct {
+			u32 fb_address;
+			u32 fb_size;
+		} resp;
+	} body;
+};
+
+#define BCM2835_MBOX_TAG_RELEASE_BUFFER		0x00048001
+
+struct bcm2835_mbox_tag_release_buffer {
+	struct bcm2835_mbox_tag_hdr tag_hdr;
+	union {
+		struct {
+		} req;
+		struct {
+		} resp;
+	} body;
+};
+
+#define BCM2835_MBOX_TAG_BLANK_SCREEN		0x00040002
+
+struct bcm2835_mbox_tag_blank_screen {
+	struct bcm2835_mbox_tag_hdr tag_hdr;
+	union {
+		struct {
+			/* bit 0 means on, other bots reserved */
+			u32 state;
+		} req;
+		struct {
+			u32 state;
+		} resp;
+	} body;
+};
+
+/* Physical means output signal */
+#define BCM2835_MBOX_TAG_GET_PHYSICAL_W_H	0x00040003
+#define BCM2835_MBOX_TAG_TEST_PHYSICAL_W_H	0x00044003
+#define BCM2835_MBOX_TAG_SET_PHYSICAL_W_H	0x00048003
+
+struct bcm2835_mbox_tag_physical_w_h {
+	struct bcm2835_mbox_tag_hdr tag_hdr;
+	union {
+		/* req not used for get */
+		struct {
+			u32 width;
+			u32 height;
+		} req;
+		struct {
+			u32 width;
+			u32 height;
+		} resp;
+	} body;
+};
+
+/* Virtual means display buffer */
+#define BCM2835_MBOX_TAG_GET_VIRTUAL_W_H	0x00040004
+#define BCM2835_MBOX_TAG_TEST_VIRTUAL_W_H	0x00044004
+#define BCM2835_MBOX_TAG_SET_VIRTUAL_W_H	0x00048004
+
+struct bcm2835_mbox_tag_virtual_w_h {
+	struct bcm2835_mbox_tag_hdr tag_hdr;
+	union {
+		/* req not used for get */
+		struct {
+			u32 width;
+			u32 height;
+		} req;
+		struct {
+			u32 width;
+			u32 height;
+		} resp;
+	} body;
+};
+
+#define BCM2835_MBOX_TAG_GET_DEPTH		0x00040005
+#define BCM2835_MBOX_TAG_TEST_DEPTH		0x00044005
+#define BCM2835_MBOX_TAG_SET_DEPTH		0x00048005
+
+struct bcm2835_mbox_tag_depth {
+	struct bcm2835_mbox_tag_hdr tag_hdr;
+	union {
+		/* req not used for get */
+		struct {
+			u32 bpp;
+		} req;
+		struct {
+			u32 bpp;
+		} resp;
+	} body;
+};
+
+#define BCM2835_MBOX_TAG_GET_PIXEL_ORDER	0x00040006
+#define BCM2835_MBOX_TAG_TEST_PIXEL_ORDER	0x00044005
+#define BCM2835_MBOX_TAG_SET_PIXEL_ORDER	0x00048006
+
+#define BCM2835_MBOX_PIXEL_ORDER_BGR		0
+#define BCM2835_MBOX_PIXEL_ORDER_RGB		1
+
+struct bcm2835_mbox_tag_pixel_order {
+	struct bcm2835_mbox_tag_hdr tag_hdr;
+	union {
+		/* req not used for get */
+		struct {
+			u32 order;
+		} req;
+		struct {
+			u32 order;
+		} resp;
+	} body;
+};
+
+#define BCM2835_MBOX_TAG_GET_ALPHA_MODE		0x00040007
+#define BCM2835_MBOX_TAG_TEST_ALPHA_MODE	0x00044007
+#define BCM2835_MBOX_TAG_SET_ALPHA_MODE		0x00048007
+
+#define BCM2835_MBOX_ALPHA_MODE_0_OPAQUE	0
+#define BCM2835_MBOX_ALPHA_MODE_0_TRANSPARENT	1
+#define BCM2835_MBOX_ALPHA_MODE_IGNORED		2
+
+struct bcm2835_mbox_tag_alpha_mode {
+	struct bcm2835_mbox_tag_hdr tag_hdr;
+	union {
+		/* req not used for get */
+		struct {
+			u32 alpha;
+		} req;
+		struct {
+			u32 alpha;
+		} resp;
+	} body;
+};
+
+#define BCM2835_MBOX_TAG_GET_PITCH		0x00040008
+
+struct bcm2835_mbox_tag_pitch {
+	struct bcm2835_mbox_tag_hdr tag_hdr;
+	union {
+		struct {
+		} req;
+		struct {
+			u32 pitch;
+		} resp;
+	} body;
+};
+
+/* Offset of display window within buffer */
+#define BCM2835_MBOX_TAG_GET_VIRTUAL_OFFSET	0x00040009
+#define BCM2835_MBOX_TAG_TEST_VIRTUAL_OFFSET	0x00044009
+#define BCM2835_MBOX_TAG_SET_VIRTUAL_OFFSET	0x00048009
+
+struct bcm2835_mbox_tag_virtual_offset {
+	struct bcm2835_mbox_tag_hdr tag_hdr;
+	union {
+		/* req not used for get */
+		struct {
+			u32 x;
+			u32 y;
+		} req;
+		struct {
+			u32 x;
+			u32 y;
+		} resp;
+	} body;
+};
+
+#define BCM2835_MBOX_TAG_GET_OVERSCAN		0x0004000a
+#define BCM2835_MBOX_TAG_TEST_OVERSCAN		0x0004400a
+#define BCM2835_MBOX_TAG_SET_OVERSCAN		0x0004800a
+
+struct bcm2835_mbox_tag_overscan {
+	struct bcm2835_mbox_tag_hdr tag_hdr;
+	union {
+		/* req not used for get */
+		struct {
+			u32 top;
+			u32 bottom;
+			u32 left;
+			u32 right;
+		} req;
+		struct {
+			u32 top;
+			u32 bottom;
+			u32 left;
+		} resp;
+	} body;
+};
+
+#define BCM2835_MBOX_TAG_GET_PALETTE		0x0004000b
+
+struct bcm2835_mbox_tag_get_palette {
+	struct bcm2835_mbox_tag_hdr tag_hdr;
+	union {
+		struct {
+		} req;
+		struct {
+			u32 data[1024];
+		} resp;
+	} body;
+};
+
+#define BCM2835_MBOX_TAG_TEST_PALETTE		0x0004400b
+
+struct bcm2835_mbox_tag_test_palette {
+	struct bcm2835_mbox_tag_hdr tag_hdr;
+	union {
+		struct {
+			u32 offset;
+			u32 num_entries;
+			u32 data[256];
+		} req;
+		struct {
+			u32 is_invalid;
+		} resp;
+	} body;
+};
+
+#define BCM2835_MBOX_TAG_SET_PALETTE		0x0004800b
+
+struct bcm2835_mbox_tag_set_palette {
+	struct bcm2835_mbox_tag_hdr tag_hdr;
+	union {
+		struct {
+			u32 offset;
+			u32 num_entries;
+			u32 data[256];
+		} req;
+		struct {
+			u32 is_invalid;
+		} resp;
+	} body;
+};
+
+/*
+ * Pass a raw u32 message to the VC, and receive a raw u32 back.
+ *
+ * Returns 0 for success, any other value for error.
+ */
+int bcm2835_mbox_call_raw(u32 chan, u32 send, u32 *recv);
+
+/*
+ * Pass a complete property-style buffer to the VC, and wait until it has
+ * been processed.
+ *
+ * This function expects a pointer to the mbox_hdr structure in an attempt
+ * to ensure some degree of type safety. However, some number of tags and
+ * a termination value are expected to immediately follow the header in
+ * memory, as required by the property protocol.
+ *
+ * Returns 0 for success, any other value for error.
+ */
+int bcm2835_mbox_call_prop(u32 chan, struct bcm2835_mbox_hdr *buffer);
+
+#endif
-- 
1.7.9.5

[U-Boot] [PATCH V4 2/7] ARM: rpi_b: use bcm2835 mbox driver to get memory size

[Stephen Warren]

The firmware running on the bcm2835 SoC's VideoCore CPU determines how
much of the system RAM is available for use by the ARM CPU. Previously,
U-Boot assumed that only 128MB was available, since this was the
smallest value configured by any public firmware. However, we can now
query the actual value at run-time from the firmware using the mbox
property protocol.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
---
v4: Rebased onto latest u-boot-arm/master; no real change.
v3: No change.
v2: Updated to use macros etc. added in v2 of mbox driver patch.
---
 board/raspberrypi/rpi_b/rpi_b.c |   21 ++++++++++++++++++++-
 1 file changed, 20 insertions(+), 1 deletion(-)

diff --git a/board/raspberrypi/rpi_b/rpi_b.c b/board/raspberrypi/rpi_b/rpi_b.c
index 688b0aa..3c654a1 100644
--- a/board/raspberrypi/rpi_b/rpi_b.c
+++ b/board/raspberrypi/rpi_b/rpi_b.c
@@ -15,13 +15,32 @@
  */
 
 #include <common.h>
+#include <asm/arch/mbox.h>
 #include <asm/global_data.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
+struct msg_get_arm_mem {
+	struct bcm2835_mbox_hdr hdr;
+	struct bcm2835_mbox_tag_get_arm_mem get_arm_mem;
+	u32 end_tag;
+};
+
 int dram_init(void)
 {
-	gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
+	ALLOC_ALIGN_BUFFER(struct msg_get_arm_mem, msg, 1, 16);
+	int ret;
+
+	BCM2835_MBOX_INIT_HDR(msg);
+	BCM2835_MBOX_INIT_TAG(&msg->get_arm_mem, GET_ARM_MEMORY);
+
+	ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg->hdr);
+	if (ret) {
+		printf("bcm2835: Could not query ARM memory size\n");
+		return -1;
+	}
+
+	gd->ram_size = msg->get_arm_mem.body.resp.mem_size;
 
 	return 0;
 }
-- 
1.7.9.5

[U-Boot] [PATCH V4 3/7] lcd: calculate line_length after lcd_ctrl_init()

[Stephen Warren]

When an LCD driver is actually driving a regular external display, e.g.
an HDMI monitor, the display resolution might not be known until the
display controller has initialized, i.e. during lcd_ctrl_init(). However,
lcd.c calculates lcd_line_length before calling this function, thus
relying on a hard-coded resolution in struct panel_info.

Instead, defer this calculation until after lcd_ctrl_init() has had the
chance to dynamically determine the resolution. This needs to happen
before lcd_clear(), since the value is used there.

grep indicates that no code outside lcd.c uses this lcd_line_length; in
particular, no lcd_ctrl_init() implementations read it.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
--
v4: Rebased onto latest u-boot-arm/master; adjusted to addition of
    lcd_get_size() function.
v3: No change.
---
 common/lcd.c |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/common/lcd.c b/common/lcd.c
index 3017604..eb2f33a 100644
--- a/common/lcd.c
+++ b/common/lcd.c
@@ -384,8 +384,6 @@ int drv_lcd_init (void)
 
 	lcd_base = (void *)(gd->fb_base);
 
-	lcd_get_size(&lcd_line_length);
-
 	lcd_init(lcd_base);		/* LCD initialization */
 
 	/* Device initialization */
@@ -468,6 +466,8 @@ static int lcd_init(void *lcdbase)
 	debug("[LCD] Initializing LCD frambuffer at %p\n", lcdbase);
 
 	lcd_ctrl_init(lcdbase);
+	lcd_get_size(&lcd_line_length);
+	lcd_line_length = (panel_info.vl_col * NBITS(panel_info.vl_bpix)) / 8;
 	lcd_is_enabled = 1;
 	lcd_clear();
 	lcd_enable ();
-- 
1.7.9.5

[U-Boot] [PATCH V4 4/7] ARM: rpi_b: disable rpi_b dcache explicitly

[Stephen Warren]

There appears to be no implementation of flush_dcache_range() for
ARM1176, so explicitly disable dcache support to avoid references to
that function from the LCD core in the next patch. This was presumably
not noticed before simply because no drivers for the rpi_b were
attempting DMA.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
---
v4: New patch required by LCD changes in ARM tree.
---
 include/configs/rpi_b.h |    1 +
 1 file changed, 1 insertion(+)

diff --git a/include/configs/rpi_b.h b/include/configs/rpi_b.h
index cf62e45..5db31f5 100644
--- a/include/configs/rpi_b.h
+++ b/include/configs/rpi_b.h
@@ -23,6 +23,7 @@
 #define CONFIG_ARM1176
 #define CONFIG_BCM2835
 #define CONFIG_ARCH_CPU_INIT
+#define CONFIG_SYS_DCACHE_OFF
 /*
  * 2835 is a SKU in a series for which the 2708 is the first or primary SoC,
  * so 2708 has historically been used rather than a dedicated 2835 ID.
-- 
1.7.9.5

[U-Boot] [PATCH V4 5/7] video: add a driver for the bcm2835

[Stephen Warren]

The firmware running on the bcm2835 SoC's VideoCore CPU manages the
display controller. Add a simple "LCD" driver that communicates with the
firmware using the property mailbox protocol. This configures the
display and frame-buffer to match whatever physical resolution the
firmware chosen when booting, which is typically the native resolution
of the attached display device, presumably unless otherwise specified
in config.txt on the boot media.

Enable this driver in the Raspberry Pi board configuration.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
---
v4: Rebased onto latest u-boot-arm/master; no real changes.
v3: Re-license to GPL-v2 or later. Fix typo in commit description.
v2: New patch.
---
 drivers/video/Makefile  |    1 +
 drivers/video/bcm2835.c |  127 +++++++++++++++++++++++++++++++++++++++++++++++
 include/configs/rpi_b.h |   16 ++++++
 3 files changed, 144 insertions(+)
 create mode 100644 drivers/video/bcm2835.c

diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index b3207c8..5f26af2 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -40,6 +40,7 @@ COBJS-$(CONFIG_S6E63D6) += s6e63d6.o
 COBJS-$(CONFIG_LD9040) += ld9040.o
 COBJS-$(CONFIG_SED156X) += sed156x.o
 COBJS-$(CONFIG_VIDEO_AMBA) += amba.o
+COBJS-$(CONFIG_VIDEO_BCM2835) += bcm2835.o
 COBJS-$(CONFIG_VIDEO_CT69000) += ct69000.o videomodes.o
 COBJS-$(CONFIG_VIDEO_DA8XX) += da8xx-fb.o videomodes.o
 COBJS-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o
diff --git a/drivers/video/bcm2835.c b/drivers/video/bcm2835.c
new file mode 100644
index 0000000..1e9a84a
--- /dev/null
+++ b/drivers/video/bcm2835.c
@@ -0,0 +1,127 @@
+/*
+ * (C) Copyright 2012 Stephen Warren
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <lcd.h>
+#include <asm/arch/mbox.h>
+#include <asm/global_data.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* Global variables that lcd.c expects to exist */
+int lcd_line_length;
+int lcd_color_fg;
+int lcd_color_bg;
+void *lcd_base;
+void *lcd_console_address;
+short console_col;
+short console_row;
+vidinfo_t panel_info;
+char lcd_cursor_enabled;
+ushort lcd_cursor_width;
+ushort lcd_cursor_height;
+
+struct msg_query {
+	struct bcm2835_mbox_hdr hdr;
+	struct bcm2835_mbox_tag_physical_w_h physical_w_h;
+	u32 end_tag;
+};
+
+struct msg_setup {
+	struct bcm2835_mbox_hdr hdr;
+	struct bcm2835_mbox_tag_physical_w_h physical_w_h;
+	struct bcm2835_mbox_tag_virtual_w_h virtual_w_h;
+	struct bcm2835_mbox_tag_depth depth;
+	struct bcm2835_mbox_tag_pixel_order pixel_order;
+	struct bcm2835_mbox_tag_alpha_mode alpha_mode;
+	struct bcm2835_mbox_tag_virtual_offset virtual_offset;
+	struct bcm2835_mbox_tag_overscan overscan;
+	struct bcm2835_mbox_tag_allocate_buffer allocate_buffer;
+	u32 end_tag;
+};
+
+void lcd_ctrl_init(void *lcdbase)
+{
+	ALLOC_ALIGN_BUFFER(struct msg_query, msg_query, 1, 16);
+	ALLOC_ALIGN_BUFFER(struct msg_setup, msg_setup, 1, 16);
+	int ret;
+	u32 w, h;
+
+	debug("bcm2835: Query resolution...\n");
+
+	BCM2835_MBOX_INIT_HDR(msg_query);
+	BCM2835_MBOX_INIT_TAG_NO_REQ(&msg_query->physical_w_h,
+					GET_PHYSICAL_W_H);
+	ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg_query->hdr);
+	if (ret) {
+		printf("bcm2835: Could not query display resolution\n");
+		/* FIXME: How to disable the LCD to prevent errors? hang()? */
+		return;
+	}
+
+	w = msg_query->physical_w_h.body.resp.width;
+	h = msg_query->physical_w_h.body.resp.height;
+
+	debug("bcm2835: Setting up display for %d x %d\n", w, h);
+
+	BCM2835_MBOX_INIT_HDR(msg_setup);
+	BCM2835_MBOX_INIT_TAG(&msg_setup->physical_w_h, SET_PHYSICAL_W_H);
+	msg_setup->physical_w_h.body.req.width = w;
+	msg_setup->physical_w_h.body.req.height = h;
+	BCM2835_MBOX_INIT_TAG(&msg_setup->virtual_w_h, SET_VIRTUAL_W_H);
+	msg_setup->virtual_w_h.body.req.width = w;
+	msg_setup->virtual_w_h.body.req.height = h;
+	BCM2835_MBOX_INIT_TAG(&msg_setup->depth, SET_DEPTH);
+	msg_setup->depth.body.req.bpp = 16;
+	BCM2835_MBOX_INIT_TAG(&msg_setup->pixel_order, SET_PIXEL_ORDER);
+	msg_setup->pixel_order.body.req.order = BCM2835_MBOX_PIXEL_ORDER_BGR;
+	BCM2835_MBOX_INIT_TAG(&msg_setup->alpha_mode, SET_ALPHA_MODE);
+	msg_setup->alpha_mode.body.req.alpha = BCM2835_MBOX_ALPHA_MODE_IGNORED;
+	BCM2835_MBOX_INIT_TAG(&msg_setup->virtual_offset, SET_VIRTUAL_OFFSET);
+	msg_setup->virtual_offset.body.req.x = 0;
+	msg_setup->virtual_offset.body.req.y = 0;
+	BCM2835_MBOX_INIT_TAG(&msg_setup->overscan, SET_OVERSCAN);
+	msg_setup->overscan.body.req.top = 0;
+	msg_setup->overscan.body.req.bottom = 0;
+	msg_setup->overscan.body.req.left = 0;
+	msg_setup->overscan.body.req.right = 0;
+	BCM2835_MBOX_INIT_TAG(&msg_setup->allocate_buffer, ALLOCATE_BUFFER);
+	msg_setup->allocate_buffer.body.req.alignment = 0x100;
+
+	ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg_setup->hdr);
+	if (ret) {
+		printf("bcm2835: Could not configure display\n");
+		/* FIXME: How to disable the LCD to prevent errors? hang()? */
+		return;
+	}
+
+	w = msg_setup->physical_w_h.body.resp.width;
+	h = msg_setup->physical_w_h.body.resp.height;
+
+	debug("bcm2835: Final resolution is %d x %d\n", w, h);
+
+	panel_info.vl_col = w;
+	panel_info.vl_row = h;
+	panel_info.vl_bpix = LCD_COLOR16;
+
+	gd->fb_base = msg_setup->allocate_buffer.body.resp.fb_address;
+	lcd_base = (void *)gd->fb_base;
+}
+
+void lcd_enable(void)
+{
+}
diff --git a/include/configs/rpi_b.h b/include/configs/rpi_b.h
index 5db31f5..e485a06 100644
--- a/include/configs/rpi_b.h
+++ b/include/configs/rpi_b.h
@@ -58,6 +58,17 @@
 /* Devices */
 /* GPIO */
 #define CONFIG_BCM2835_GPIO
+/* LCD */
+#define CONFIG_LCD
+#define LCD_BPP				LCD_COLOR16
+/*
+ * Prevent allocation of RAM for FB; the real FB address is queried
+ * dynamically from the VideoCore co-processor, and comes from RAM
+ * not owned by the ARM CPU.
+ */
+#define CONFIG_FB_ADDR			0
+#define CONFIG_VIDEO_BCM2835
+#define CONFIG_SYS_WHITE_ON_BLACK
 
 /* Console UART */
 #define CONFIG_PL011_SERIAL
@@ -75,6 +86,11 @@
 #define CONFIG_ENV_SIZE			SZ_16K
 #define CONFIG_ENV_IS_NOWHERE
 #define CONFIG_SYS_LOAD_ADDR		0x1000000
+#define CONFIG_CONSOLE_MUX
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+#define CONFIG_EXTRA_ENV_SETTINGS	"stdin=serial\0" \
+					"stderr=serial,lcd\0" \
+					"stdout=serial,lcd\0"
 
 /* Shell */
 #define CONFIG_SYS_HUSH_PARSER
-- 
1.7.9.5

[U-Boot] [PATCH V4 6/7] mmc: add bcm2835 driver

[Stephen Warren]

This adds a simple driver for the BCM2835's SD controller.

Workarounds are implemented for:
* Register writes can't be too close to each-other in time, or they will
  be lost.
* Register accesses must all be 32-bit, so implement custom accessors.

This code was extracted from:
git://github.com/gonzoua/u-boot-pi.git master
which was created by Oleksandr Tymoshenko.

Portions of the code there were obviously based on the Linux kernel at:
git://github.com/raspberrypi/linux.git rpi-3.6.y
commit f5b930b "Main bcm2708 linux port" signed-off-by Dom Cobley.

swarren changed the following for upstream:
* Removed hack udelay()s in bcm2835_sdhci_raw_writel(); setting
  SDHCI_QUIRK_WAIT_SEND_CMD appears to solve the issues.
* Remove register logging from read*/write* functions.
* Sort out confusion with min/max_freq values passed to add_sdhci().
* Use more descriptive variable names and calculations in IO accessors.
* Simplified and commented twoticks_delay calculation.
* checkpatch fixes.

Cc: Andy Fleming <afleming@gmail.com>
Signed-off-by: Oleksandr Tymoshenko <gonzo@bluezbox.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
---
v4:
* Merged with video patch series due to dependencies in rpi_b.h.
* Rebased onto latest u-boot-arm/master; no real changes.
v3: No such version was posted.
v2:
* Use more descriptive variable names and calculations in IO accessors.
* Add Oleksandr's S-o-b.
* Rewrite commit description to note that the Linux code this was derived
  from was S-o-b Dom Cobley.
---
 arch/arm/include/asm/arch-bcm2835/sdhci.h |   24 ++++
 drivers/mmc/Makefile                      |    1 +
 drivers/mmc/bcm2835_sdhci.c               |  177 +++++++++++++++++++++++++++++
 3 files changed, 202 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-bcm2835/sdhci.h
 create mode 100644 drivers/mmc/bcm2835_sdhci.c

diff --git a/arch/arm/include/asm/arch-bcm2835/sdhci.h b/arch/arm/include/asm/arch-bcm2835/sdhci.h
new file mode 100644
index 0000000..a4f867b
--- /dev/null
+++ b/arch/arm/include/asm/arch-bcm2835/sdhci.h
@@ -0,0 +1,24 @@
+/*
+ * (C) Copyright 2012 Stephen Warren
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _BCM2835_SDHCI_H_
+#define _BCM2835_SDHCI_H_
+
+#define BCM2835_SDHCI_BASE 0x20300000
+
+int bcm2835_sdhci_init(u32 regbase, u32 emmc_freq);
+
+#endif
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index a1dd730..6be36f2 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -43,6 +43,7 @@ COBJS-$(CONFIG_MXS_MMC) += mxsmmc.o
 COBJS-$(CONFIG_OMAP_HSMMC) += omap_hsmmc.o
 COBJS-$(CONFIG_PXA_MMC_GENERIC) += pxa_mmc_gen.o
 COBJS-$(CONFIG_SDHCI) += sdhci.o
+COBJS-$(CONFIG_BCM2835_SDHCI) += bcm2835_sdhci.o
 COBJS-$(CONFIG_S5P_SDHCI) += s5p_sdhci.o
 COBJS-$(CONFIG_SH_MMCIF) += sh_mmcif.o
 COBJS-$(CONFIG_TEGRA_MMC) += tegra_mmc.o
diff --git a/drivers/mmc/bcm2835_sdhci.c b/drivers/mmc/bcm2835_sdhci.c
new file mode 100644
index 0000000..8f2137e
--- /dev/null
+++ b/drivers/mmc/bcm2835_sdhci.c
@@ -0,0 +1,177 @@
+/*
+ * This code was extracted from:
+ * git://github.com/gonzoua/u-boot-pi.git master
+ * and hence presumably (C) 2012 Oleksandr Tymoshenko
+ *
+ * Tweaks for U-Boot upstreaming
+ * (C) 2012 Stephen Warren
+ *
+ * Portions (e.g. read/write macros, concepts for back-to-back register write
+ * timing workarounds) obviously extracted from the Linux kernel at:
+ * https://github.com/raspberrypi/linux.git rpi-3.6.y
+ *
+ * The Linux kernel code has the following (c) and license, which is hence
+ * propagated to Oleksandr's tree and here:
+ *
+ * Support for SDHCI device on 2835
+ * Based on sdhci-bcm2708.c (c) 2010 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+/* Supports:
+ * SDHCI platform device - Arasan SD controller in BCM2708
+ *
+ * Inspired by sdhci-pci.c, by Pierre Ossman
+ */
+
+#include <common.h>
+#include <malloc.h>
+#include <sdhci.h>
+
+/* 400KHz is max freq for card ID etc. Use that as min */
+#define MIN_FREQ 400000
+
+static uint twoticks_delay;
+
+static inline void bcm2835_sdhci_raw_writel(struct sdhci_host *host, u32 val,
+						int reg)
+{
+	static ulong last_write;
+
+	/*
+	 * The Arasan has a bugette whereby it may lose the content of
+	 * successive writes to registers that are within two SD-card clock
+	 * cycles of each other (a clock domain crossing problem).
+	 * It seems, however, that the data register does not have this problem.
+	 * (Which is just as well - otherwise we'd have to nobble the DMA engine
+	 * too)
+	 */
+	while (get_timer(last_write) < twoticks_delay)
+		;
+
+	writel(val, host->ioaddr + reg);
+	last_write = get_timer(0);
+}
+
+static inline u32 bcm2835_sdhci_raw_readl(struct sdhci_host *host, int reg)
+{
+	return readl(host->ioaddr + reg);
+}
+
+static void bcm2835_sdhci_writel(struct sdhci_host *host, u32 val, int reg)
+{
+	bcm2835_sdhci_raw_writel(host, val, reg);
+}
+
+static void bcm2835_sdhci_writew(struct sdhci_host *host, u16 val, int reg)
+{
+	static u32 shadow;
+	u32 oldval = (reg == SDHCI_COMMAND) ? shadow :
+		bcm2835_sdhci_raw_readl(host, reg & ~3);
+	u32 word_num = (reg >> 1) & 1;
+	u32 word_shift = word_num * 16;
+	u32 mask = 0xffff << word_shift;
+	u32 newval = (oldval & ~mask) | (val << word_shift);
+
+	if (reg == SDHCI_TRANSFER_MODE)
+		shadow = newval;
+	else
+		bcm2835_sdhci_raw_writel(host, newval, reg & ~3);
+}
+
+static void bcm2835_sdhci_writeb(struct sdhci_host *host, u8 val, int reg)
+{
+	u32 oldval = bcm2835_sdhci_raw_readl(host, reg & ~3);
+	u32 byte_num = reg & 3;
+	u32 byte_shift = byte_num * 8;
+	u32 mask = 0xff << byte_shift;
+	u32 newval = (oldval & ~mask) | (val << byte_shift);
+
+	bcm2835_sdhci_raw_writel(host, newval, reg & ~3);
+}
+
+static u32 bcm2835_sdhci_readl(struct sdhci_host *host, int reg)
+{
+	u32 val = bcm2835_sdhci_raw_readl(host, reg);
+
+	return val;
+}
+
+static u16 bcm2835_sdhci_readw(struct sdhci_host *host, int reg)
+{
+	u32 val = bcm2835_sdhci_raw_readl(host, (reg & ~3));
+	u32 word_num = (reg >> 1) & 1;
+	u32 word_shift = word_num * 16;
+	u32 word = (val >> word_shift) & 0xffff;
+
+	return word;
+}
+
+static u8 bcm2835_sdhci_readb(struct sdhci_host *host, int reg)
+{
+	u32 val = bcm2835_sdhci_raw_readl(host, (reg & ~3));
+	u32 byte_num = reg & 3;
+	u32 byte_shift = byte_num * 8;
+	u32 byte = (val >> byte_shift) & 0xff;
+
+	return byte;
+}
+
+static const struct sdhci_ops bcm2835_ops = {
+	.write_l = bcm2835_sdhci_writel,
+	.write_w = bcm2835_sdhci_writew,
+	.write_b = bcm2835_sdhci_writeb,
+	.read_l = bcm2835_sdhci_readl,
+	.read_w = bcm2835_sdhci_readw,
+	.read_b = bcm2835_sdhci_readb,
+};
+
+int bcm2835_sdhci_init(u32 regbase, u32 emmc_freq)
+{
+	struct sdhci_host *host = NULL;
+
+	/*
+	 * See the comments in bcm2835_sdhci_raw_writel().
+	 *
+	 * This should probably be dynamically calculated based on the actual
+	 * frequency. However, this is the longest we'll have to wait, and
+	 * doesn't seem to slow access down too much, so the added complexity
+	 * doesn't seem worth it for now.
+	 *
+	 * 1/MIN_FREQ is (max) time per tick of eMMC clock.
+	 * 2/MIN_FREQ is time for two ticks.
+	 * Multiply by 1000000 to get uS per two ticks.
+	 * +1 for hack rounding.
+	 */
+	twoticks_delay = ((2 * 1000000) / MIN_FREQ) + 1;
+
+	host = malloc(sizeof(struct sdhci_host));
+	if (!host) {
+		printf("sdhci_host malloc fail!\n");
+		return 1;
+	}
+
+	host->name = "bcm2835_sdhci";
+	host->ioaddr = (void *)regbase;
+	host->quirks = SDHCI_QUIRK_BROKEN_VOLTAGE | SDHCI_QUIRK_BROKEN_R1B |
+		SDHCI_QUIRK_WAIT_SEND_CMD;
+	host->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
+	host->ops = &bcm2835_ops;
+
+	host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
+	add_sdhci(host, emmc_freq, MIN_FREQ);
+
+	return 0;
+}
-- 
1.7.9.5

[U-Boot] [PATCH V4 6/7] mmc: add bcm2835 driver

[Albert ARIBAUD]

On Mon, 26 Nov 2012 21:38:16 -0700, Stephen Warren
<swarren@wwwdotorg.org> wrote:

> This adds a simple driver for the BCM2835's SD controller.
> 
> Workarounds are implemented for:
> * Register writes can't be too close to each-other in time, or they will
>   be lost.
> * Register accesses must all be 32-bit, so implement custom accessors.
> 
> This code was extracted from:
> git://github.com/gonzoua/u-boot-pi.git master
> which was created by Oleksandr Tymoshenko.
> 
> Portions of the code there were obviously based on the Linux kernel at:
> git://github.com/raspberrypi/linux.git rpi-3.6.y
> commit f5b930b "Main bcm2708 linux port" signed-off-by Dom Cobley.
> 
> swarren changed the following for upstream:
> * Removed hack udelay()s in bcm2835_sdhci_raw_writel(); setting
>   SDHCI_QUIRK_WAIT_SEND_CMD appears to solve the issues.
> * Remove register logging from read*/write* functions.
> * Sort out confusion with min/max_freq values passed to add_sdhci().
> * Use more descriptive variable names and calculations in IO accessors.
> * Simplified and commented twoticks_delay calculation.
> * checkpatch fixes.
> 
> Cc: Andy Fleming <afleming@gmail.com>

Hi Andy,

As soon as you give your Ack to this patch, I'll apply the
whole series to u-boot-arm/master.

Amicalement,
-- 
Albert.

[U-Boot] [PATCH V4 6/7] mmc: add bcm2835 driver

[Stephen Warren]

On 11/26/2012 11:49 PM, Albert ARIBAUD wrote:
> On Mon, 26 Nov 2012 21:38:16 -0700, Stephen Warren
> <swarren@wwwdotorg.org> wrote:
> 
>> This adds a simple driver for the BCM2835's SD controller.
>>
>> Workarounds are implemented for:
>> * Register writes can't be too close to each-other in time, or they will
>>   be lost.
>> * Register accesses must all be 32-bit, so implement custom accessors.
>>
>> This code was extracted from:
>> git://github.com/gonzoua/u-boot-pi.git master
>> which was created by Oleksandr Tymoshenko.
>>
>> Portions of the code there were obviously based on the Linux kernel at:
>> git://github.com/raspberrypi/linux.git rpi-3.6.y
>> commit f5b930b "Main bcm2708 linux port" signed-off-by Dom Cobley.
>>
>> swarren changed the following for upstream:
>> * Removed hack udelay()s in bcm2835_sdhci_raw_writel(); setting
>>   SDHCI_QUIRK_WAIT_SEND_CMD appears to solve the issues.
>> * Remove register logging from read*/write* functions.
>> * Sort out confusion with min/max_freq values passed to add_sdhci().
>> * Use more descriptive variable names and calculations in IO accessors.
>> * Simplified and commented twoticks_delay calculation.
>> * checkpatch fixes.
>>
>> Cc: Andy Fleming <afleming@gmail.com>
> 
> Hi Andy,
> 
> As soon as you give your Ack to this patch, I'll apply the
> whole series to u-boot-arm/master.

Do feel free to apply all the patches before the MMC driver addition
without waiting for the MMC driver though.

[U-Boot] [PATCH V4 6/7] mmc: add bcm2835 driver

[Albert ARIBAUD]

Hi Stephen,

On Tue, 27 Nov 2012 09:32:27 -0700, Stephen Warren
<swarren@wwwdotorg.org> wrote:

> On 11/26/2012 11:49 PM, Albert ARIBAUD wrote:
> > On Mon, 26 Nov 2012 21:38:16 -0700, Stephen Warren
> > <swarren@wwwdotorg.org> wrote:
> > 
> >> This adds a simple driver for the BCM2835's SD controller.
> >>
> >> Workarounds are implemented for:
> >> * Register writes can't be too close to each-other in time, or they will
> >>   be lost.
> >> * Register accesses must all be 32-bit, so implement custom accessors.
> >>
> >> This code was extracted from:
> >> git://github.com/gonzoua/u-boot-pi.git master
> >> which was created by Oleksandr Tymoshenko.
> >>
> >> Portions of the code there were obviously based on the Linux kernel at:
> >> git://github.com/raspberrypi/linux.git rpi-3.6.y
> >> commit f5b930b "Main bcm2708 linux port" signed-off-by Dom Cobley.
> >>
> >> swarren changed the following for upstream:
> >> * Removed hack udelay()s in bcm2835_sdhci_raw_writel(); setting
> >>   SDHCI_QUIRK_WAIT_SEND_CMD appears to solve the issues.
> >> * Remove register logging from read*/write* functions.
> >> * Sort out confusion with min/max_freq values passed to add_sdhci().
> >> * Use more descriptive variable names and calculations in IO accessors.
> >> * Simplified and commented twoticks_delay calculation.
> >> * checkpatch fixes.
> >>
> >> Cc: Andy Fleming <afleming@gmail.com>
> > 
> > Hi Andy,
> > 
> > As soon as you give your Ack to this patch, I'll apply the
> > whole series to u-boot-arm/master.
> 
> Do feel free to apply all the patches before the MMC driver addition
> without waiting for the MMC driver though.

You're right. I'll apply 1 to 5 and wait for Andy's comment to be taken
into account for applying 6 and 7, possibly in a newer version.

Amicalement,
-- 
Albert.

[U-Boot] [PATCH V4 6/7] mmc: add bcm2835 driver

[Andy Fleming]

On Mon, Nov 26, 2012 at 10:38 PM, Stephen Warren <swarren@wwwdotorg.org>wrote:

> This adds a simple driver for the BCM2835's SD controller.
>
> Workarounds are implemented for:
> * Register writes can't be too close to each-other in time, or they will
>   be lost.
> * Register accesses must all be 32-bit, so implement custom accessors.
>
> This code was extracted from:
> git://github.com/gonzoua/u-boot-pi.git master
> which was created by Oleksandr Tymoshenko.
>
> Portions of the code there were obviously based on the Linux kernel at:
> git://github.com/raspberrypi/linux.git rpi-3.6.y
> commit f5b930b "Main bcm2708 linux port" signed-off-by Dom Cobley.
>
> swarren changed the following for upstream:
> * Removed hack udelay()s in bcm2835_sdhci_raw_writel(); setting
>   SDHCI_QUIRK_WAIT_SEND_CMD appears to solve the issues.
> * Remove register logging from read*/write* functions.
> * Sort out confusion with min/max_freq values passed to add_sdhci().
> * Use more descriptive variable names and calculations in IO accessors.
> * Simplified and commented twoticks_delay calculation.
> * checkpatch fixes.
>
> Cc: Andy Fleming <afleming@gmail.com>
> Signed-off-by: Oleksandr Tymoshenko <gonzo@bluezbox.com>
> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
> ---
> v4:
> * Merged with video patch series due to dependencies in rpi_b.h.
> * Rebased onto latest u-boot-arm/master; no real changes.
> v3: No such version was posted.
> v2:
> * Use more descriptive variable names and calculations in IO accessors.
> * Add Oleksandr's S-o-b.
> * Rewrite commit description to note that the Linux code this was derived
>   from was S-o-b Dom Cobley.
> ---
>  arch/arm/include/asm/arch-bcm2835/sdhci.h |   24 ++++
>  drivers/mmc/Makefile                      |    1 +
>  drivers/mmc/bcm2835_sdhci.c               |  177
> +++++++++++++++++++++++++++++
>  3 files changed, 202 insertions(+)
>  create mode 100644 arch/arm/include/asm/arch-bcm2835/sdhci.h
>  create mode 100644 drivers/mmc/bcm2835_sdhci.c
>
> diff --git a/arch/arm/include/asm/arch-bcm2835/sdhci.h
> b/arch/arm/include/asm/arch-bcm2835/sdhci.h
> new file mode 100644
> index 0000000..a4f867b
> --- /dev/null
> +++ b/arch/arm/include/asm/arch-bcm2835/sdhci.h
> @@ -0,0 +1,24 @@
> +/*
> + * (C) Copyright 2012 Stephen Warren
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful, but
> + * WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +#ifndef _BCM2835_SDHCI_H_
> +#define _BCM2835_SDHCI_H_
> +
> +#define BCM2835_SDHCI_BASE 0x20300000
> +
> +int bcm2835_sdhci_init(u32 regbase, u32 emmc_freq);
> +
> +#endif
> diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
> index a1dd730..6be36f2 100644
> --- a/drivers/mmc/Makefile
> +++ b/drivers/mmc/Makefile
> @@ -43,6 +43,7 @@ COBJS-$(CONFIG_MXS_MMC) += mxsmmc.o
>  COBJS-$(CONFIG_OMAP_HSMMC) += omap_hsmmc.o
>  COBJS-$(CONFIG_PXA_MMC_GENERIC) += pxa_mmc_gen.o
>  COBJS-$(CONFIG_SDHCI) += sdhci.o
> +COBJS-$(CONFIG_BCM2835_SDHCI) += bcm2835_sdhci.o
>  COBJS-$(CONFIG_S5P_SDHCI) += s5p_sdhci.o
>  COBJS-$(CONFIG_SH_MMCIF) += sh_mmcif.o
>  COBJS-$(CONFIG_TEGRA_MMC) += tegra_mmc.o
> diff --git a/drivers/mmc/bcm2835_sdhci.c b/drivers/mmc/bcm2835_sdhci.c
> new file mode 100644
> index 0000000..8f2137e
> --- /dev/null
> +++ b/drivers/mmc/bcm2835_sdhci.c
> @@ -0,0 +1,177 @@
> +/*
> + * This code was extracted from:
> + * git://github.com/gonzoua/u-boot-pi.git master
> + * and hence presumably (C) 2012 Oleksandr Tymoshenko
> + *
> + * Tweaks for U-Boot upstreaming
> + * (C) 2012 Stephen Warren
> + *
> + * Portions (e.g. read/write macros, concepts for back-to-back register
> write
> + * timing workarounds) obviously extracted from the Linux kernel at:
> + * https://github.com/raspberrypi/linux.git rpi-3.6.y
> + *
> + * The Linux kernel code has the following (c) and license, which is hence
> + * propagated to Oleksandr's tree and here:
> + *
> + * Support for SDHCI device on 2835
> + * Based on sdhci-bcm2708.c (c) 2010 Broadcom
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
> + */
> +
> +/* Supports:
> + * SDHCI platform device - Arasan SD controller in BCM2708
> + *
> + * Inspired by sdhci-pci.c, by Pierre Ossman
> + */
> +
> +#include <common.h>
> +#include <malloc.h>
> +#include <sdhci.h>
> +
> +/* 400KHz is max freq for card ID etc. Use that as min */
> +#define MIN_FREQ 400000
> +
> +static uint twoticks_delay;
> +
> +static inline void bcm2835_sdhci_raw_writel(struct sdhci_host *host, u32
> val,
> +                                               int reg)
> +{
> +       static ulong last_write;
>


I don't suppose there's any way you could do this without a global
variable? If someone ever plops two of these things down on a system, we're
gonna have weird race condition possibilities. Perhaps an array, accessed
via host->index?

 Andy

[U-Boot] [PATCH V4 7/7] ARM: rpi_b: enable SD controller, add related env/cmds

[Stephen Warren]

Enable the SD controller driver for the Raspberry Pi. Enable a number
of useful MMC, partition, and filesystem-related commands. Set up the
environment to provide standard locations for loading a kernel, DTB,
etc. Provide a boot command that loads and executes boot.scr.uimg from
the SD card; this is written considering future extensibilty to USB
storage.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
---
v4:
* Merged with video patch series due to dependencies in rpi_b.h.
* Rebased onto latest u-boot-arm/master; no real changes.
v3: No such version was posted.
v2: No change.
---
 arch/arm/include/asm/arch-bcm2835/mbox.h |   26 ++++++++++++
 board/raspberrypi/rpi_b/rpi_b.c          |   26 ++++++++++++
 include/configs/rpi_b.h                  |   68 ++++++++++++++++++++++++++++--
 3 files changed, 117 insertions(+), 3 deletions(-)

diff --git a/arch/arm/include/asm/arch-bcm2835/mbox.h b/arch/arm/include/asm/arch-bcm2835/mbox.h
index 4752091..b07c4a0 100644
--- a/arch/arm/include/asm/arch-bcm2835/mbox.h
+++ b/arch/arm/include/asm/arch-bcm2835/mbox.h
@@ -144,6 +144,32 @@ struct bcm2835_mbox_tag_get_arm_mem {
 	} body;
 };
 
+#define BCM2835_MBOX_TAG_GET_CLOCK_RATE	0x00030002
+
+#define BCM2835_MBOX_CLOCK_ID_EMMC	1
+#define BCM2835_MBOX_CLOCK_ID_UART	2
+#define BCM2835_MBOX_CLOCK_ID_ARM	3
+#define BCM2835_MBOX_CLOCK_ID_CORE	4
+#define BCM2835_MBOX_CLOCK_ID_V3D	5
+#define BCM2835_MBOX_CLOCK_ID_H264	6
+#define BCM2835_MBOX_CLOCK_ID_ISP	7
+#define BCM2835_MBOX_CLOCK_ID_SDRAM	8
+#define BCM2835_MBOX_CLOCK_ID_PIXEL	9
+#define BCM2835_MBOX_CLOCK_ID_PWM	10
+
+struct bcm2835_mbox_tag_get_clock_rate {
+	struct bcm2835_mbox_tag_hdr tag_hdr;
+	union {
+		struct {
+			u32 clock_id;
+		} req;
+		struct {
+			u32 clock_id;
+			u32 rate_hz;
+		} resp;
+	} body;
+};
+
 #define BCM2835_MBOX_TAG_ALLOCATE_BUFFER	0x00040001
 
 struct bcm2835_mbox_tag_allocate_buffer {
diff --git a/board/raspberrypi/rpi_b/rpi_b.c b/board/raspberrypi/rpi_b/rpi_b.c
index 3c654a1..6b3e095 100644
--- a/board/raspberrypi/rpi_b/rpi_b.c
+++ b/board/raspberrypi/rpi_b/rpi_b.c
@@ -16,6 +16,7 @@
 
 #include <common.h>
 #include <asm/arch/mbox.h>
+#include <asm/arch/sdhci.h>
 #include <asm/global_data.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -26,6 +27,12 @@ struct msg_get_arm_mem {
 	u32 end_tag;
 };
 
+struct msg_get_clock_rate {
+	struct bcm2835_mbox_hdr hdr;
+	struct bcm2835_mbox_tag_get_clock_rate get_clock_rate;
+	u32 end_tag;
+};
+
 int dram_init(void)
 {
 	ALLOC_ALIGN_BUFFER(struct msg_get_arm_mem, msg, 1, 16);
@@ -51,3 +58,22 @@ int board_init(void)
 
 	return 0;
 }
+
+int board_mmc_init(void)
+{
+	ALLOC_ALIGN_BUFFER(struct msg_get_clock_rate, msg_clk, 1, 16);
+	int ret;
+
+	BCM2835_MBOX_INIT_HDR(msg_clk);
+	BCM2835_MBOX_INIT_TAG(&msg_clk->get_clock_rate, GET_CLOCK_RATE);
+	msg_clk->get_clock_rate.body.req.clock_id = BCM2835_MBOX_CLOCK_ID_EMMC;
+
+	ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg_clk->hdr);
+	if (ret) {
+		printf("bcm2835: Could not query eMMC clock rate\n");
+		return -1;
+	}
+
+	return bcm2835_sdhci_init(BCM2835_SDHCI_BASE,
+				  msg_clk->get_clock_rate.body.resp.rate_hz);
+}
diff --git a/include/configs/rpi_b.h b/include/configs/rpi_b.h
index e485a06..3d55d36 100644
--- a/include/configs/rpi_b.h
+++ b/include/configs/rpi_b.h
@@ -51,6 +51,7 @@
 #define CONFIG_SYS_MALLOC_LEN		SZ_4M
 #define CONFIG_SYS_MEMTEST_START	0x00100000
 #define CONFIG_SYS_MEMTEST_END		0x00200000
+#define CONFIG_LOADADDR			0x00200000
 
 /* Flash */
 #define CONFIG_SYS_NO_FLASH
@@ -70,6 +71,13 @@
 #define CONFIG_VIDEO_BCM2835
 #define CONFIG_SYS_WHITE_ON_BLACK
 
+/* SD/MMC configuration */
+#define CONFIG_GENERIC_MMC
+#define CONFIG_MMC
+#define CONFIG_SDHCI
+#define CONFIG_MMC_SDHCI_IO_ACCESSORS
+#define CONFIG_BCM2835_SDHCI
+
 /* Console UART */
 #define CONFIG_PL011_SERIAL
 #define CONFIG_PL011_CLOCK		3000000
@@ -85,12 +93,59 @@
 /* Environment */
 #define CONFIG_ENV_SIZE			SZ_16K
 #define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_VARS_UBOOT_CONFIG
 #define CONFIG_SYS_LOAD_ADDR		0x1000000
 #define CONFIG_CONSOLE_MUX
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
-#define CONFIG_EXTRA_ENV_SETTINGS	"stdin=serial\0" \
-					"stderr=serial,lcd\0" \
-					"stdout=serial,lcd\0"
+/*
+ * Memory layout for where various images get loaded by boot scripts:
+ *
+ * scriptaddr can be pretty much anywhere that doesn't conflict with something
+ *   else. Put it low in memory to avoid conflicts.
+ *
+ * kernel_addr_r must be within the first 128M of RAM in order for the
+ *   kernel's CONFIG_AUTO_ZRELADDR option to work. Since the kernel will
+ *   decompress itself to 0x8000 after the start of RAM, kernel_addr_r
+ *   should not overlap that area, or the kernel will have to copy itself
+ *   somewhere else before decompression. Similarly, the address of any other
+ *   data passed to the kernel shouldn't overlap the start of RAM. Pushing
+ *   this up to 16M allows for a sizable kernel to be decompressed below the
+ *   compressed load address.
+ *
+ * fdt_addr_r simply shouldn't overlap anything else. Choosing 32M allows for
+ *   the compressed kernel to be up to 16M too.
+ *
+ * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows
+ *   for the FDT/DTB to be up to 1M, which is hopefully plenty.
+ */
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	"stdin=serial\0" \
+	"stderr=serial,lcd\0" \
+	"stdout=serial,lcd\0" \
+	"scriptaddr=0x00000000\0" \
+	"kernel_addr_r=0x01000000\0" \
+	"fdt_addr_r=0x02000000\0" \
+	"ramdisk_addr_r=0x02100000\0" \
+	"boot_targets=mmc0\0" \
+	\
+	"script_boot=" \
+		"if fatload ${devtype} ${devnum}:1 " \
+					"${scriptaddr} boot.scr.uimg; then " \
+			"source ${scriptaddr}; " \
+		"fi;\0" \
+	\
+	"mmc_boot=" \
+		"setenv devtype mmc; " \
+		"if mmc dev ${devnum}; then " \
+			"run script_boot; " \
+		"fi\0" \
+	\
+	"bootcmd_mmc0=setenv devnum 0; run mmc_boot\0" \
+
+#define CONFIG_BOOTCOMMAND \
+	"for target in ${boot_targets}; do run bootcmd_${target}; done"
+
+#define CONFIG_BOOTDELAY		2
 
 /* Shell */
 #define CONFIG_SYS_HUSH_PARSER
@@ -105,6 +160,13 @@
 #include <config_cmd_default.h>
 #define CONFIG_CMD_BOOTZ
 #define CONFIG_CMD_GPIO
+#define CONFIG_CMD_MMC
+#define CONFIG_DOS_PARTITION
+#define CONFIG_PARTITION_UUIDS
+#define CONFIG_CMD_PART
+#define CONFIG_CMD_FS_GENERIC
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_EXT
 /* Some things don't make sense on this HW or yet */
 #undef CONFIG_CMD_FPGA
 #undef CONFIG_CMD_NET
-- 
1.7.9.5