From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Date: Thu, 13 Dec 2012 18:27:31 +0100 Subject: [U-Boot] [PATCH 02/11] usb: ehci: Add 64-bit controller support In-Reply-To: <1355363731-10103-3-git-send-email-sjg@chromium.org> References: <1355363731-10103-1-git-send-email-sjg@chromium.org> <1355363731-10103-3-git-send-email-sjg@chromium.org> Message-ID: <201212131827.31262.marex@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Dear Simon Glass, > From: Vincent Palatin > > On EHCI controller with 64-bit address space support, we must initialize > properly the high word for the PCI bus master accesses. > > Signed-off-by: Vincent Palatin > Signed-off-by: Simon Glass > --- > drivers/usb/host/ehci-hcd.c | 3 +++ > 1 files changed, 3 insertions(+), 0 deletions(-) > > diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c > index 7f98a63..20309ad 100644 > --- a/drivers/usb/host/ehci-hcd.c > +++ b/drivers/usb/host/ehci-hcd.c > @@ -870,6 +870,9 @@ int usb_lowlevel_init(int index, void **controller) > if (ehci_hcd_init(index, &ehcic[index].hccr, &ehcic[index].hcor)) > return -1; > #endif > + /* Set the high address word (aka segment) for 64-bit controller */ > + if (ehci_readl(&ehcic[index].hccr->cr_hccparams) & 1) > + ehci_writel(ehcic[index].hcor->or_ctrldssegment, 0); > > qh_list = &ehcic[index].qh_list; Applied, thanks Best regards, Marek Vasut