[U-Boot] [PATCH 01/18] mxs: mmc: Drop unused members from struct mxsmmc_priv

[U-Boot] [PATCH 01/18] mxs: mmc: Drop unused members from struct mxsmmc_priv

[Marek Vasut]

The clock data are not used by the driver, drop them.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
---
 drivers/mmc/mxsmmc.c |   12 ------------
 1 file changed, 12 deletions(-)

diff --git a/drivers/mmc/mxsmmc.c b/drivers/mmc/mxsmmc.c
index 024df59..aa3d1b0 100644
--- a/drivers/mmc/mxsmmc.c
+++ b/drivers/mmc/mxsmmc.c
@@ -47,8 +47,6 @@
 struct mxsmmc_priv {
 	int			id;
 	struct mxs_ssp_regs	*regs;
-	uint32_t		clkseq_bypass;
-	uint32_t		*clkctrl_ssp;
 	uint32_t		buswidth;
 	int			(*mmc_is_wp)(int);
 	struct mxs_dma_desc	*desc;
@@ -355,8 +353,6 @@ static int mxsmmc_init(struct mmc *mmc)
 
 int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int))
 {
-	struct mxs_clkctrl_regs *clkctrl_regs =
-		(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
 	struct mmc *mmc = NULL;
 	struct mxsmmc_priv *priv = NULL;
 	int ret;
@@ -387,23 +383,15 @@ int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int))
 	switch (id) {
 	case 0:
 		priv->regs = (struct mxs_ssp_regs *)MXS_SSP0_BASE;
-		priv->clkseq_bypass = CLKCTRL_CLKSEQ_BYPASS_SSP0;
-		priv->clkctrl_ssp = &clkctrl_regs->hw_clkctrl_ssp0;
 		break;
 	case 1:
 		priv->regs = (struct mxs_ssp_regs *)MXS_SSP1_BASE;
-		priv->clkseq_bypass = CLKCTRL_CLKSEQ_BYPASS_SSP1;
-		priv->clkctrl_ssp = &clkctrl_regs->hw_clkctrl_ssp1;
 		break;
 	case 2:
 		priv->regs = (struct mxs_ssp_regs *)MXS_SSP2_BASE;
-		priv->clkseq_bypass = CLKCTRL_CLKSEQ_BYPASS_SSP2;
-		priv->clkctrl_ssp = &clkctrl_regs->hw_clkctrl_ssp2;
 		break;
 	case 3:
 		priv->regs = (struct mxs_ssp_regs *)MXS_SSP3_BASE;
-		priv->clkseq_bypass = CLKCTRL_CLKSEQ_BYPASS_SSP3;
-		priv->clkctrl_ssp = &clkctrl_regs->hw_clkctrl_ssp3;
 		break;
 	}
 
-- 
1.7.10.4

[U-Boot] [PATCH 02/18] mxs: ssp: Pull out the SSP bus to regs conversion

[Marek Vasut]

Create function which converts SSP bus number to SSP register pointer.
This functionality is reimplemented multiple times in the code, thus
make one common implementation. Moreover, make it a switch(), since the
SSP ports are not mapped in such nice linear fashion on MX23, therefore
having it a switch will simplify things there.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
---
 arch/arm/cpu/arm926ejs/mxs/clock.c       |    2 +-
 arch/arm/include/asm/arch-mxs/regs-ssp.h |   16 ++++++++++++++++
 drivers/mmc/mxsmmc.c                     |   15 +--------------
 drivers/spi/mxs_spi.c                    |    5 +----
 4 files changed, 19 insertions(+), 19 deletions(-)

diff --git a/arch/arm/cpu/arm926ejs/mxs/clock.c b/arch/arm/cpu/arm926ejs/mxs/clock.c
index 4ff19c3..5d6e12a 100644
--- a/arch/arm/cpu/arm926ejs/mxs/clock.c
+++ b/arch/arm/cpu/arm926ejs/mxs/clock.c
@@ -278,7 +278,7 @@ void mx28_set_ssp_busclock(unsigned int bus, uint32_t freq)
 	uint32_t reg;
 	uint32_t divide, rate, tgtclk;
 
-	ssp_regs = (struct mxs_ssp_regs *)(MXS_SSP0_BASE + (bus * 0x2000));
+	ssp_regs = mxs_ssp_regs_by_bus(bus);
 
 	/*
 	 * SSP bit rate = SSPCLK / (CLOCK_DIVIDE * (1 + CLOCK_RATE)),
diff --git a/arch/arm/include/asm/arch-mxs/regs-ssp.h b/arch/arm/include/asm/arch-mxs/regs-ssp.h
index cf52a28..4a75029 100644
--- a/arch/arm/include/asm/arch-mxs/regs-ssp.h
+++ b/arch/arm/include/asm/arch-mxs/regs-ssp.h
@@ -50,6 +50,22 @@ struct mxs_ssp_regs {
 	mxs_reg_32(hw_ssp_debug)
 	mxs_reg_32(hw_ssp_version)
 };
+
+static inline struct mxs_ssp_regs *mxs_ssp_regs_by_bus(unsigned int port)
+{
+	switch (port) {
+	case 0:
+		return (struct mxs_ssp_regs *)MXS_SSP0_BASE;
+	case 1:
+		return (struct mxs_ssp_regs *)MXS_SSP1_BASE;
+	case 2:
+		return (struct mxs_ssp_regs *)MXS_SSP2_BASE;
+	case 3:
+		return (struct mxs_ssp_regs *)MXS_SSP3_BASE;
+	default:
+		return NULL;
+	}
+}
 #endif
 
 #define	SSP_CTRL0_SFTRST			(1 << 31)
diff --git a/drivers/mmc/mxsmmc.c b/drivers/mmc/mxsmmc.c
index aa3d1b0..2fd9ccc 100644
--- a/drivers/mmc/mxsmmc.c
+++ b/drivers/mmc/mxsmmc.c
@@ -380,20 +380,7 @@ int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int))
 
 	priv->mmc_is_wp = wp;
 	priv->id = id;
-	switch (id) {
-	case 0:
-		priv->regs = (struct mxs_ssp_regs *)MXS_SSP0_BASE;
-		break;
-	case 1:
-		priv->regs = (struct mxs_ssp_regs *)MXS_SSP1_BASE;
-		break;
-	case 2:
-		priv->regs = (struct mxs_ssp_regs *)MXS_SSP2_BASE;
-		break;
-	case 3:
-		priv->regs = (struct mxs_ssp_regs *)MXS_SSP3_BASE;
-		break;
-	}
+	priv->regs = mxs_ssp_regs_by_bus(id);
 
 	sprintf(mmc->name, "MXS MMC");
 	mmc->send_cmd = mxsmmc_send_cmd;
diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c
index 42e4c99..31cd77d 100644
--- a/drivers/spi/mxs_spi.c
+++ b/drivers/spi/mxs_spi.c
@@ -80,7 +80,6 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
 				  unsigned int max_hz, unsigned int mode)
 {
 	struct mxs_spi_slave *mxs_slave;
-	uint32_t addr;
 	struct mxs_ssp_regs *ssp_regs;
 	int reg;
 
@@ -96,13 +95,11 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
 	if (mxs_dma_init_channel(bus))
 		goto err_init;
 
-	addr = MXS_SSP0_BASE + (bus * MXS_SPI_PORT_OFFSET);
-
 	mxs_slave->slave.bus = bus;
 	mxs_slave->slave.cs = cs;
 	mxs_slave->max_khz = max_hz / 1000;
 	mxs_slave->mode = mode;
-	mxs_slave->regs = (struct mxs_ssp_regs *)addr;
+	mxs_slave->regs = mxs_ssp_regs_by_bus(bus);
 	ssp_regs = mxs_slave->regs;
 
 	reg = readl(&ssp_regs->hw_ssp_ctrl0);
-- 
1.7.10.4

[U-Boot] [PATCH 03/18] mxs: clock: Use 'mxs' prefix for methods

[Marek Vasut]

From: Otavio Salvador <otavio@ossystems.com.br>

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
---
 arch/arm/cpu/arm926ejs/mxs/clock.c       |   46 +++++++++++++++---------------
 arch/arm/include/asm/arch-mxs/clock.h    |    6 ++--
 board/bluegiga/apx4devkit/apx4devkit.c   |    6 ++--
 board/denx/m28evk/m28evk.c               |    8 +++---
 board/freescale/mx28evk/mx28evk.c        |    8 +++---
 board/schulercontrol/sc_sps_1/sc_sps_1.c |    8 +++---
 drivers/mmc/mxsmmc.c                     |    4 +--
 drivers/spi/mxs_spi.c                    |    2 +-
 8 files changed, 44 insertions(+), 44 deletions(-)

diff --git a/arch/arm/cpu/arm926ejs/mxs/clock.c b/arch/arm/cpu/arm926ejs/mxs/clock.c
index 5d6e12a..b7cf98f 100644
--- a/arch/arm/cpu/arm926ejs/mxs/clock.c
+++ b/arch/arm/cpu/arm926ejs/mxs/clock.c
@@ -41,7 +41,7 @@
 #define	PLL_FREQ_MHZ	(PLL_FREQ_KHZ / 1000)
 #define	XTAL_FREQ_MHZ	(XTAL_FREQ_KHZ / 1000)
 
-static uint32_t mx28_get_pclk(void)
+static uint32_t mxs_get_pclk(void)
 {
 	struct mxs_clkctrl_regs *clkctrl_regs =
 		(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
@@ -73,7 +73,7 @@ static uint32_t mx28_get_pclk(void)
 	return (PLL_FREQ_MHZ * PLL_FREQ_COEF / frac) / div;
 }
 
-static uint32_t mx28_get_hclk(void)
+static uint32_t mxs_get_hclk(void)
 {
 	struct mxs_clkctrl_regs *clkctrl_regs =
 		(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
@@ -88,10 +88,10 @@ static uint32_t mx28_get_hclk(void)
 		return 0;
 
 	div = clkctrl & CLKCTRL_HBUS_DIV_MASK;
-	return mx28_get_pclk() / div;
+	return mxs_get_pclk() / div;
 }
 
-static uint32_t mx28_get_emiclk(void)
+static uint32_t mxs_get_emiclk(void)
 {
 	struct mxs_clkctrl_regs *clkctrl_regs =
 		(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
@@ -116,7 +116,7 @@ static uint32_t mx28_get_emiclk(void)
 	return (PLL_FREQ_MHZ * PLL_FREQ_COEF / frac) / div;
 }
 
-static uint32_t mx28_get_gpmiclk(void)
+static uint32_t mxs_get_gpmiclk(void)
 {
 	struct mxs_clkctrl_regs *clkctrl_regs =
 		(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
@@ -143,7 +143,7 @@ static uint32_t mx28_get_gpmiclk(void)
 /*
  * Set IO clock frequency, in kHz
  */
-void mx28_set_ioclk(enum mxs_ioclock io, uint32_t freq)
+void mxs_set_ioclk(enum mxs_ioclock io, uint32_t freq)
 {
 	struct mxs_clkctrl_regs *clkctrl_regs =
 		(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
@@ -176,7 +176,7 @@ void mx28_set_ioclk(enum mxs_ioclock io, uint32_t freq)
 /*
  * Get IO clock, returns IO clock in kHz
  */
-static uint32_t mx28_get_ioclk(enum mxs_ioclock io)
+static uint32_t mxs_get_ioclk(enum mxs_ioclock io)
 {
 	struct mxs_clkctrl_regs *clkctrl_regs =
 		(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
@@ -197,7 +197,7 @@ static uint32_t mx28_get_ioclk(enum mxs_ioclock io)
 /*
  * Configure SSP clock frequency, in kHz
  */
-void mx28_set_sspclk(enum mxs_sspclock ssp, uint32_t freq, int xtal)
+void mxs_set_sspclk(enum mxs_sspclock ssp, uint32_t freq, int xtal)
 {
 	struct mxs_clkctrl_regs *clkctrl_regs =
 		(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
@@ -216,7 +216,7 @@ void mx28_set_sspclk(enum mxs_sspclock ssp, uint32_t freq, int xtal)
 	if (xtal)
 		clk = XTAL_FREQ_KHZ;
 	else
-		clk = mx28_get_ioclk(ssp >> 1);
+		clk = mxs_get_ioclk(ssp >> 1);
 
 	if (freq > clk)
 		return;
@@ -241,7 +241,7 @@ void mx28_set_sspclk(enum mxs_sspclock ssp, uint32_t freq, int xtal)
 /*
  * Return SSP frequency, in kHz
  */
-static uint32_t mx28_get_sspclk(enum mxs_sspclock ssp)
+static uint32_t mxs_get_sspclk(enum mxs_sspclock ssp)
 {
 	struct mxs_clkctrl_regs *clkctrl_regs =
 		(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
@@ -263,7 +263,7 @@ static uint32_t mx28_get_sspclk(enum mxs_sspclock ssp)
 	if (tmp == 0)
 		return 0;
 
-	clk = mx28_get_ioclk(ssp >> 1);
+	clk = mxs_get_ioclk(ssp >> 1);
 
 	return clk / tmp;
 }
@@ -271,10 +271,10 @@ static uint32_t mx28_get_sspclk(enum mxs_sspclock ssp)
 /*
  * Set SSP/MMC bus frequency, in kHz)
  */
-void mx28_set_ssp_busclock(unsigned int bus, uint32_t freq)
+void mxs_set_ssp_busclock(unsigned int bus, uint32_t freq)
 {
 	struct mxs_ssp_regs *ssp_regs;
-	const uint32_t sspclk = mx28_get_sspclk(bus);
+	const uint32_t sspclk = mxs_get_sspclk(bus);
 	uint32_t reg;
 	uint32_t divide, rate, tgtclk;
 
@@ -313,26 +313,26 @@ uint32_t mxc_get_clock(enum mxc_clock clk)
 {
 	switch (clk) {
 	case MXC_ARM_CLK:
-		return mx28_get_pclk() * 1000000;
+		return mxs_get_pclk() * 1000000;
 	case MXC_GPMI_CLK:
-		return mx28_get_gpmiclk() * 1000000;
+		return mxs_get_gpmiclk() * 1000000;
 	case MXC_AHB_CLK:
 	case MXC_IPG_CLK:
-		return mx28_get_hclk() * 1000000;
+		return mxs_get_hclk() * 1000000;
 	case MXC_EMI_CLK:
-		return mx28_get_emiclk();
+		return mxs_get_emiclk();
 	case MXC_IO0_CLK:
-		return mx28_get_ioclk(MXC_IOCLK0);
+		return mxs_get_ioclk(MXC_IOCLK0);
 	case MXC_IO1_CLK:
-		return mx28_get_ioclk(MXC_IOCLK1);
+		return mxs_get_ioclk(MXC_IOCLK1);
 	case MXC_SSP0_CLK:
-		return mx28_get_sspclk(MXC_SSPCLK0);
+		return mxs_get_sspclk(MXC_SSPCLK0);
 	case MXC_SSP1_CLK:
-		return mx28_get_sspclk(MXC_SSPCLK1);
+		return mxs_get_sspclk(MXC_SSPCLK1);
 	case MXC_SSP2_CLK:
-		return mx28_get_sspclk(MXC_SSPCLK2);
+		return mxs_get_sspclk(MXC_SSPCLK2);
 	case MXC_SSP3_CLK:
-		return mx28_get_sspclk(MXC_SSPCLK3);
+		return mxs_get_sspclk(MXC_SSPCLK3);
 	case MXC_XTAL_CLK:
 		return XTAL_FREQ_KHZ * 1000;
 	}
diff --git a/arch/arm/include/asm/arch-mxs/clock.h b/arch/arm/include/asm/arch-mxs/clock.h
index 3d39ef2..d3927c7 100644
--- a/arch/arm/include/asm/arch-mxs/clock.h
+++ b/arch/arm/include/asm/arch-mxs/clock.h
@@ -52,9 +52,9 @@ enum mxs_sspclock {
 
 uint32_t mxc_get_clock(enum mxc_clock clk);
 
-void mx28_set_ioclk(enum mxs_ioclock io, uint32_t freq);
-void mx28_set_sspclk(enum mxs_sspclock ssp, uint32_t freq, int xtal);
-void mx28_set_ssp_busclock(unsigned int bus, uint32_t freq);
+void mxs_set_ioclk(enum mxs_ioclock io, uint32_t freq);
+void mxs_set_sspclk(enum mxs_sspclock ssp, uint32_t freq, int xtal);
+void mxs_set_ssp_busclock(unsigned int bus, uint32_t freq);
 
 /* Compatibility with the FEC Ethernet driver */
 #define	imx_get_fecclk()	mxc_get_clock(MXC_AHB_CLK)
diff --git a/board/bluegiga/apx4devkit/apx4devkit.c b/board/bluegiga/apx4devkit/apx4devkit.c
index ae48ab5..029b973 100644
--- a/board/bluegiga/apx4devkit/apx4devkit.c
+++ b/board/bluegiga/apx4devkit/apx4devkit.c
@@ -43,12 +43,12 @@ DECLARE_GLOBAL_DATA_PTR;
 int board_early_init_f(void)
 {
 	/* IO0 clock at 480MHz */
-	mx28_set_ioclk(MXC_IOCLK0, 480000);
+	mxs_set_ioclk(MXC_IOCLK0, 480000);
 	/* IO1 clock at 480MHz */
-	mx28_set_ioclk(MXC_IOCLK1, 480000);
+	mxs_set_ioclk(MXC_IOCLK1, 480000);
 
 	/* SSP0 clock at 96MHz */
-	mx28_set_sspclk(MXC_SSPCLK0, 96000, 0);
+	mxs_set_sspclk(MXC_SSPCLK0, 96000, 0);
 
 	return 0;
 }
diff --git a/board/denx/m28evk/m28evk.c b/board/denx/m28evk/m28evk.c
index 9d6db65..26f31d6 100644
--- a/board/denx/m28evk/m28evk.c
+++ b/board/denx/m28evk/m28evk.c
@@ -43,14 +43,14 @@ DECLARE_GLOBAL_DATA_PTR;
 int board_early_init_f(void)
 {
 	/* IO0 clock at 480MHz */
-	mx28_set_ioclk(MXC_IOCLK0, 480000);
+	mxs_set_ioclk(MXC_IOCLK0, 480000);
 	/* IO1 clock at 480MHz */
-	mx28_set_ioclk(MXC_IOCLK1, 480000);
+	mxs_set_ioclk(MXC_IOCLK1, 480000);
 
 	/* SSP0 clock at 96MHz */
-	mx28_set_sspclk(MXC_SSPCLK0, 96000, 0);
+	mxs_set_sspclk(MXC_SSPCLK0, 96000, 0);
 	/* SSP2 clock at 160MHz */
-	mx28_set_sspclk(MXC_SSPCLK2, 160000, 0);
+	mxs_set_sspclk(MXC_SSPCLK2, 160000, 0);
 
 #ifdef	CONFIG_CMD_USB
 	mxs_iomux_setup_pad(MX28_PAD_SSP2_SS1__USB1_OVERCURRENT);
diff --git a/board/freescale/mx28evk/mx28evk.c b/board/freescale/mx28evk/mx28evk.c
index 6e719ff..ad66f29 100644
--- a/board/freescale/mx28evk/mx28evk.c
+++ b/board/freescale/mx28evk/mx28evk.c
@@ -43,14 +43,14 @@ DECLARE_GLOBAL_DATA_PTR;
 int board_early_init_f(void)
 {
 	/* IO0 clock at 480MHz */
-	mx28_set_ioclk(MXC_IOCLK0, 480000);
+	mxs_set_ioclk(MXC_IOCLK0, 480000);
 	/* IO1 clock at 480MHz */
-	mx28_set_ioclk(MXC_IOCLK1, 480000);
+	mxs_set_ioclk(MXC_IOCLK1, 480000);
 
 	/* SSP0 clock at 96MHz */
-	mx28_set_sspclk(MXC_SSPCLK0, 96000, 0);
+	mxs_set_sspclk(MXC_SSPCLK0, 96000, 0);
 	/* SSP2 clock at 160MHz */
-	mx28_set_sspclk(MXC_SSPCLK2, 160000, 0);
+	mxs_set_sspclk(MXC_SSPCLK2, 160000, 0);
 
 #ifdef	CONFIG_CMD_USB
 	mxs_iomux_setup_pad(MX28_PAD_SSP2_SS1__USB1_OVERCURRENT);
diff --git a/board/schulercontrol/sc_sps_1/sc_sps_1.c b/board/schulercontrol/sc_sps_1/sc_sps_1.c
index fda191a..fac7e30 100644
--- a/board/schulercontrol/sc_sps_1/sc_sps_1.c
+++ b/board/schulercontrol/sc_sps_1/sc_sps_1.c
@@ -43,14 +43,14 @@ DECLARE_GLOBAL_DATA_PTR;
 int board_early_init_f(void)
 {
 	/* IO0 clock at 480MHz */
-	mx28_set_ioclk(MXC_IOCLK0, 480000);
+	mxs_set_ioclk(MXC_IOCLK0, 480000);
 	/* IO1 clock at 480MHz */
-	mx28_set_ioclk(MXC_IOCLK1, 480000);
+	mxs_set_ioclk(MXC_IOCLK1, 480000);
 
 	/* SSP0 clock at 96MHz */
-	mx28_set_sspclk(MXC_SSPCLK0, 96000, 0);
+	mxs_set_sspclk(MXC_SSPCLK0, 96000, 0);
 	/* SSP2 clock at 96MHz */
-	mx28_set_sspclk(MXC_SSPCLK2, 96000, 0);
+	mxs_set_sspclk(MXC_SSPCLK2, 96000, 0);
 
 #ifdef	CONFIG_CMD_USB
 	mxs_iomux_setup_pad(MX28_PAD_AUART1_CTS__USB0_OVERCURRENT);
diff --git a/drivers/mmc/mxsmmc.c b/drivers/mmc/mxsmmc.c
index 2fd9ccc..76878d0 100644
--- a/drivers/mmc/mxsmmc.c
+++ b/drivers/mmc/mxsmmc.c
@@ -304,7 +304,7 @@ static void mxsmmc_set_ios(struct mmc *mmc)
 
 	/* Set the clock speed */
 	if (mmc->clock)
-		mx28_set_ssp_busclock(priv->id, mmc->clock / 1000);
+		mxs_set_ssp_busclock(priv->id, mmc->clock / 1000);
 
 	switch (mmc->bus_width) {
 	case 1:
@@ -341,7 +341,7 @@ static int mxsmmc_init(struct mmc *mmc)
 		SSP_CTRL1_SSP_MODE_SD_MMC | SSP_CTRL1_WORD_LENGTH_EIGHT_BITS);
 
 	/* Set initial bit clock 400 KHz */
-	mx28_set_ssp_busclock(priv->id, 400);
+	mxs_set_ssp_busclock(priv->id, 400);
 
 	/* Send initial 74 clock cycles (185 us @ 400 KHz)*/
 	writel(SSP_CMD0_CONT_CLKING_EN, &ssp_regs->hw_ssp_cmd0_set);
diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c
index 31cd77d..bb865b7 100644
--- a/drivers/spi/mxs_spi.c
+++ b/drivers/spi/mxs_spi.c
@@ -137,7 +137,7 @@ int spi_claim_bus(struct spi_slave *slave)
 
 	writel(0, &ssp_regs->hw_ssp_cmd0);
 
-	mx28_set_ssp_busclock(slave->bus, mxs_slave->max_khz);
+	mxs_set_ssp_busclock(slave->bus, mxs_slave->max_khz);
 
 	return 0;
 }
-- 
1.7.10.4

[U-Boot] [PATCH 04/18] mx23: Add register base addresses

[Marek Vasut]

From: Otavio Salvador <otavio@ossystems.com.br>

This adds the base addresses of i.MX23 and easy the detection of wrong
order in board setup, in case no SoC has been set, an error is raised
during build.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
---
 arch/arm/include/asm/arch-mxs/regs-base.h |   56 ++++++++++++++++++++++++++---
 1 file changed, 51 insertions(+), 5 deletions(-)

diff --git a/arch/arm/include/asm/arch-mxs/regs-base.h b/arch/arm/include/asm/arch-mxs/regs-base.h
index dbdcc2b..2d9f96b 100644
--- a/arch/arm/include/asm/arch-mxs/regs-base.h
+++ b/arch/arm/include/asm/arch-mxs/regs-base.h
@@ -1,5 +1,5 @@
 /*
- * Freescale i.MX28 Peripheral Base Addresses
+ * Freescale i.MX23/i.MX28 Peripheral Base Addresses
  *
  * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
  * on behalf of DENX Software Engineering GmbH
@@ -25,12 +25,55 @@
  *
  */
 
-#ifndef __MX28_REGS_BASE_H__
-#define __MX28_REGS_BASE_H__
+#ifndef __MXS_REGS_BASE_H__
+#define __MXS_REGS_BASE_H__
 
 /*
- * Register base address
+ * Register base addresses for i.MX23
  */
+#if defined(CONFIG_MX23)
+#define	MXS_ICOLL_BASE		0x80000000
+#define	MXS_APBH_BASE		0x80004000
+#define	MXS_ECC8_BASE		0x80008000
+#define	MXS_BCH_BASE		0x8000A000
+#define	MXS_GPMI_BASE		0x8000C000
+#define	MXS_SSP0_BASE		0x80010000
+#define	MXS_SSP1_BASE		0x80034000
+#define	MXS_ETM_BASE		0x80014000
+#define	MXS_PINCTRL_BASE	0x80018000
+#define	MXS_DIGCTL_BASE		0x8001C000
+#define	MXS_EMI_BASE		0x80020000
+#define	MXS_APBX_BASE		0x80024000
+#define	MXS_DCP_BASE		0x80028000
+#define	MXS_PXP_BASE		0x8002A000
+#define	MXS_OCOTP_BASE		0x8002C000
+#define	MXS_AXI_BASE		0x8002E000
+#define	MXS_LCDIF_BASE		0x80030000
+#define	MXS_SSP1_BASE		0x80034000
+#define	MXS_TVENC_BASE		0x80038000
+#define	MXS_CLKCTRL_BASE	0x80040000
+#define	MXS_SAIF0_BASE		0x80042000
+#define	MXS_POWER_BASE		0x80044000
+#define	MXS_SAIF1_BASE		0x80046000
+#define	MXS_AUDIOOUT_BASE	0x80048000
+#define	MXS_AUDIOIN_BASE	0x8004C000
+#define	MXS_LRADC_BASE		0x80050000
+#define	MXS_SPDIF_BASE		0x80054000
+#define	MXS_I2C0_BASE		0x80058000
+#define	MXS_RTC_BASE		0x8005C000
+#define	MXS_PWM_BASE		0x80064000
+#define	MXS_TIMROT_BASE		0x80068000
+#define	MXS_UARTAPP0_BASE	0x8006C000
+#define	MXS_UARTAPP1_BASE	0x8006E000
+#define	MXS_UARTDBG_BASE	0x80070000
+#define	MXS_USBPHY0_BASE	0x8007C000
+#define	MXS_USBCTRL0_BASE	0x80080000
+#define	MXS_DRAM_BASE		0x800E0000
+
+/*
+ * Register base addresses for i.MX28
+ */
+#elif defined(CONFIG_MX28)
 #define	MXS_ICOL_BASE		0x80000000
 #define	MXS_HSADC_BASE		0x80002000
 #define	MXS_APBH_BASE		0x80004000
@@ -84,5 +127,8 @@
 #define	MXS_DRAM_BASE		0x800E0000
 #define	MXS_ENET0_BASE		0x800F0000
 #define	MXS_ENET1_BASE		0x800F4000
+#else
+#error Unkown SoC. Please set CONFIG_MX23 or CONFIG_MX28
+#endif
 
-#endif /* __MX28_REGS_BASE_H__ */
+#endif /* __MXS_REGS_BASE_H__ */
-- 
1.7.10.4

[U-Boot] [PATCH 05/18] mx23: Add iomux-mx23.h

[Marek Vasut]

From: Otavio Salvador <otavio@ossystems.com.br>

This has been copied from Linux source at revision 786f02b719f.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
---
 arch/arm/include/asm/arch-mxs/iomux-mx23.h |  355 ++++++++++++++++++++++++++++
 arch/arm/include/asm/arch-mxs/sys_proto.h  |    6 +
 2 files changed, 361 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-mxs/iomux-mx23.h

diff --git a/arch/arm/include/asm/arch-mxs/iomux-mx23.h b/arch/arm/include/asm/arch-mxs/iomux-mx23.h
new file mode 100644
index 0000000..7cb5e71
--- /dev/null
+++ b/arch/arm/include/asm/arch-mxs/iomux-mx23.h
@@ -0,0 +1,355 @@
+/*
+ * Copyright (C) 2009-2010 Amit Kucheria <amit.kucheria@canonical.com>
+ * Copyright (C) 2010 Freescale Semiconductor, Inc.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#ifndef __MACH_IOMUX_MX23_H__
+#define __MACH_IOMUX_MX23_H__
+
+#include <asm/arch/iomux.h>
+
+/*
+ * The naming convention for the pad modes is MX23_PAD_<padname>__<padmode>
+ * If <padname> or <padmode> refers to a GPIO, it is named GPIO_<unit>_<num>
+ * See also iomux.h
+ *
+ *									BANK	PIN	MUX
+ */
+/* MUXSEL_0 */
+#define MX23_PAD_GPMI_D00__GPMI_D00		MXS_IOMUX_PAD_NAKED(0,  0, PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_D01__GPMI_D01		MXS_IOMUX_PAD_NAKED(0,  1, PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_D02__GPMI_D02		MXS_IOMUX_PAD_NAKED(0,  2, PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_D03__GPMI_D03		MXS_IOMUX_PAD_NAKED(0,  3, PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_D04__GPMI_D04		MXS_IOMUX_PAD_NAKED(0,  4, PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_D05__GPMI_D05		MXS_IOMUX_PAD_NAKED(0,  5, PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_D06__GPMI_D06		MXS_IOMUX_PAD_NAKED(0,  6, PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_D07__GPMI_D07		MXS_IOMUX_PAD_NAKED(0,  7, PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_D08__GPMI_D08		MXS_IOMUX_PAD_NAKED(0,  8, PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_D09__GPMI_D09		MXS_IOMUX_PAD_NAKED(0,  9, PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_D10__GPMI_D10		MXS_IOMUX_PAD_NAKED(0, 10, PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_D11__GPMI_D11		MXS_IOMUX_PAD_NAKED(0, 11, PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_D12__GPMI_D12		MXS_IOMUX_PAD_NAKED(0, 12, PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_D13__GPMI_D13		MXS_IOMUX_PAD_NAKED(0, 13, PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_D14__GPMI_D14		MXS_IOMUX_PAD_NAKED(0, 14, PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_D15__GPMI_D15		MXS_IOMUX_PAD_NAKED(0, 15, PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_CLE__GPMI_CLE		MXS_IOMUX_PAD_NAKED(0, 16, PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_ALE__GPMI_ALE		MXS_IOMUX_PAD_NAKED(0, 17, PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_CE2N__GPMI_CE2N		MXS_IOMUX_PAD_NAKED(0, 18, PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_RDY0__GPMI_RDY0		MXS_IOMUX_PAD_NAKED(0, 19, PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_RDY1__GPMI_RDY1		MXS_IOMUX_PAD_NAKED(0, 20, PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_RDY2__GPMI_RDY2		MXS_IOMUX_PAD_NAKED(0, 21, PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_RDY3__GPMI_RDY3		MXS_IOMUX_PAD_NAKED(0, 22, PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_WPN__GPMI_WPN		MXS_IOMUX_PAD_NAKED(0, 23, PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_WRN__GPMI_WRN		MXS_IOMUX_PAD_NAKED(0, 24, PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_RDN__GPMI_RDN		MXS_IOMUX_PAD_NAKED(0, 25, PAD_MUXSEL_0)
+#define MX23_PAD_AUART1_CTS__AUART1_CTS		MXS_IOMUX_PAD_NAKED(0, 26, PAD_MUXSEL_0)
+#define MX23_PAD_AUART1_RTS__AUART1_RTS		MXS_IOMUX_PAD_NAKED(0, 27, PAD_MUXSEL_0)
+#define MX23_PAD_AUART1_RX__AUART1_RX		MXS_IOMUX_PAD_NAKED(0, 28, PAD_MUXSEL_0)
+#define MX23_PAD_AUART1_TX__AUART1_TX		MXS_IOMUX_PAD_NAKED(0, 29, PAD_MUXSEL_0)
+#define MX23_PAD_I2C_SCL__I2C_SCL		MXS_IOMUX_PAD_NAKED(0, 30, PAD_MUXSEL_0)
+#define MX23_PAD_I2C_SDA__I2C_SDA		MXS_IOMUX_PAD_NAKED(0, 31, PAD_MUXSEL_0)
+
+#define MX23_PAD_LCD_D00__LCD_D00		MXS_IOMUX_PAD_NAKED(1,  0, PAD_MUXSEL_0)
+#define MX23_PAD_LCD_D01__LCD_D01		MXS_IOMUX_PAD_NAKED(1,  1, PAD_MUXSEL_0)
+#define MX23_PAD_LCD_D02__LCD_D02		MXS_IOMUX_PAD_NAKED(1,  2, PAD_MUXSEL_0)
+#define MX23_PAD_LCD_D03__LCD_D03		MXS_IOMUX_PAD_NAKED(1,  3, PAD_MUXSEL_0)
+#define MX23_PAD_LCD_D04__LCD_D04		MXS_IOMUX_PAD_NAKED(1,  4, PAD_MUXSEL_0)
+#define MX23_PAD_LCD_D05__LCD_D05		MXS_IOMUX_PAD_NAKED(1,  5, PAD_MUXSEL_0)
+#define MX23_PAD_LCD_D06__LCD_D06		MXS_IOMUX_PAD_NAKED(1,  6, PAD_MUXSEL_0)
+#define MX23_PAD_LCD_D07__LCD_D07		MXS_IOMUX_PAD_NAKED(1,  7, PAD_MUXSEL_0)
+#define MX23_PAD_LCD_D08__LCD_D08		MXS_IOMUX_PAD_NAKED(1,  8, PAD_MUXSEL_0)
+#define MX23_PAD_LCD_D09__LCD_D09		MXS_IOMUX_PAD_NAKED(1,  9, PAD_MUXSEL_0)
+#define MX23_PAD_LCD_D10__LCD_D10		MXS_IOMUX_PAD_NAKED(1, 10, PAD_MUXSEL_0)
+#define MX23_PAD_LCD_D11__LCD_D11		MXS_IOMUX_PAD_NAKED(1, 11, PAD_MUXSEL_0)
+#define MX23_PAD_LCD_D12__LCD_D12		MXS_IOMUX_PAD_NAKED(1, 12, PAD_MUXSEL_0)
+#define MX23_PAD_LCD_D13__LCD_D13		MXS_IOMUX_PAD_NAKED(1, 13, PAD_MUXSEL_0)
+#define MX23_PAD_LCD_D14__LCD_D14		MXS_IOMUX_PAD_NAKED(1, 14, PAD_MUXSEL_0)
+#define MX23_PAD_LCD_D15__LCD_D15		MXS_IOMUX_PAD_NAKED(1, 15, PAD_MUXSEL_0)
+#define MX23_PAD_LCD_D16__LCD_D16		MXS_IOMUX_PAD_NAKED(1, 16, PAD_MUXSEL_0)
+#define MX23_PAD_LCD_D17__LCD_D17		MXS_IOMUX_PAD_NAKED(1, 17, PAD_MUXSEL_0)
+#define MX23_PAD_LCD_RESET__LCD_RESET		MXS_IOMUX_PAD_NAKED(1, 18, PAD_MUXSEL_0)
+#define MX23_PAD_LCD_RS__LCD_RS			MXS_IOMUX_PAD_NAKED(1, 19, PAD_MUXSEL_0)
+#define MX23_PAD_LCD_WR__LCD_WR			MXS_IOMUX_PAD_NAKED(1, 20, PAD_MUXSEL_0)
+#define MX23_PAD_LCD_CS__LCD_CS			MXS_IOMUX_PAD_NAKED(1, 21, PAD_MUXSEL_0)
+#define MX23_PAD_LCD_DOTCK__LCD_DOTCK		MXS_IOMUX_PAD_NAKED(1, 22, PAD_MUXSEL_0)
+#define MX23_PAD_LCD_ENABLE__LCD_ENABLE		MXS_IOMUX_PAD_NAKED(1, 23, PAD_MUXSEL_0)
+#define MX23_PAD_LCD_HSYNC__LCD_HSYNC		MXS_IOMUX_PAD_NAKED(1, 24, PAD_MUXSEL_0)
+#define MX23_PAD_LCD_VSYNC__LCD_VSYNC		MXS_IOMUX_PAD_NAKED(1, 25, PAD_MUXSEL_0)
+#define MX23_PAD_PWM0__PWM0			MXS_IOMUX_PAD_NAKED(1, 26, PAD_MUXSEL_0)
+#define MX23_PAD_PWM1__PWM1			MXS_IOMUX_PAD_NAKED(1, 27, PAD_MUXSEL_0)
+#define MX23_PAD_PWM2__PWM2			MXS_IOMUX_PAD_NAKED(1, 28, PAD_MUXSEL_0)
+#define MX23_PAD_PWM3__PWM3			MXS_IOMUX_PAD_NAKED(1, 29, PAD_MUXSEL_0)
+#define MX23_PAD_PWM4__PWM4			MXS_IOMUX_PAD_NAKED(1, 30, PAD_MUXSEL_0)
+
+#define MX23_PAD_SSP1_CMD__SSP1_CMD		MXS_IOMUX_PAD_NAKED(2,  0, PAD_MUXSEL_0)
+#define MX23_PAD_SSP1_DETECT__SSP1_DETECT	MXS_IOMUX_PAD_NAKED(2,  1, PAD_MUXSEL_0)
+#define MX23_PAD_SSP1_DATA0__SSP1_DATA0		MXS_IOMUX_PAD_NAKED(2,  2, PAD_MUXSEL_0)
+#define MX23_PAD_SSP1_DATA1__SSP1_DATA1		MXS_IOMUX_PAD_NAKED(2,  3, PAD_MUXSEL_0)
+#define MX23_PAD_SSP1_DATA2__SSP1_DATA2		MXS_IOMUX_PAD_NAKED(2,  4, PAD_MUXSEL_0)
+#define MX23_PAD_SSP1_DATA3__SSP1_DATA3		MXS_IOMUX_PAD_NAKED(2,  5, PAD_MUXSEL_0)
+#define MX23_PAD_SSP1_SCK__SSP1_SCK		MXS_IOMUX_PAD_NAKED(2,  6, PAD_MUXSEL_0)
+#define MX23_PAD_ROTARYA__ROTARYA		MXS_IOMUX_PAD_NAKED(2,  7, PAD_MUXSEL_0)
+#define MX23_PAD_ROTARYB__ROTARYB		MXS_IOMUX_PAD_NAKED(2,  8, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_A00__EMI_A00		MXS_IOMUX_PAD_NAKED(2,  9, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_A01__EMI_A01		MXS_IOMUX_PAD_NAKED(2, 10, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_A02__EMI_A02		MXS_IOMUX_PAD_NAKED(2, 11, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_A03__EMI_A03		MXS_IOMUX_PAD_NAKED(2, 12, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_A04__EMI_A04		MXS_IOMUX_PAD_NAKED(2, 13, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_A05__EMI_A05		MXS_IOMUX_PAD_NAKED(2, 14, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_A06__EMI_A06		MXS_IOMUX_PAD_NAKED(2, 15, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_A07__EMI_A07		MXS_IOMUX_PAD_NAKED(2, 16, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_A08__EMI_A08		MXS_IOMUX_PAD_NAKED(2, 17, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_A09__EMI_A09		MXS_IOMUX_PAD_NAKED(2, 18, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_A10__EMI_A10		MXS_IOMUX_PAD_NAKED(2, 19, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_A11__EMI_A11		MXS_IOMUX_PAD_NAKED(2, 20, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_A12__EMI_A12		MXS_IOMUX_PAD_NAKED(2, 21, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_BA0__EMI_BA0		MXS_IOMUX_PAD_NAKED(2, 22, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_BA1__EMI_BA1		MXS_IOMUX_PAD_NAKED(2, 23, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_CASN__EMI_CASN		MXS_IOMUX_PAD_NAKED(2, 24, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_CE0N__EMI_CE0N		MXS_IOMUX_PAD_NAKED(2, 25, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_CE1N__EMI_CE1N		MXS_IOMUX_PAD_NAKED(2, 26, PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_CE1N__GPMI_CE1N		MXS_IOMUX_PAD_NAKED(2, 27, PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_CE0N__GPMI_CE0N		MXS_IOMUX_PAD_NAKED(2, 28, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_CKE__EMI_CKE		MXS_IOMUX_PAD_NAKED(2, 29, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_RASN__EMI_RASN		MXS_IOMUX_PAD_NAKED(2, 30, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_WEN__EMI_WEN		MXS_IOMUX_PAD_NAKED(2, 31, PAD_MUXSEL_0)
+
+#define MX23_PAD_EMI_D00__EMI_D00		MXS_IOMUX_PAD_NAKED(3,  0, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_D01__EMI_D01		MXS_IOMUX_PAD_NAKED(3,  1, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_D02__EMI_D02		MXS_IOMUX_PAD_NAKED(3,  2, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_D03__EMI_D03		MXS_IOMUX_PAD_NAKED(3,  3, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_D04__EMI_D04		MXS_IOMUX_PAD_NAKED(3,  4, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_D05__EMI_D05		MXS_IOMUX_PAD_NAKED(3,  5, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_D06__EMI_D06		MXS_IOMUX_PAD_NAKED(3,  6, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_D07__EMI_D07		MXS_IOMUX_PAD_NAKED(3,  7, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_D08__EMI_D08		MXS_IOMUX_PAD_NAKED(3,  8, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_D09__EMI_D09		MXS_IOMUX_PAD_NAKED(3,  9, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_D10__EMI_D10		MXS_IOMUX_PAD_NAKED(3, 10, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_D11__EMI_D11		MXS_IOMUX_PAD_NAKED(3, 11, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_D12__EMI_D12		MXS_IOMUX_PAD_NAKED(3, 12, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_D13__EMI_D13		MXS_IOMUX_PAD_NAKED(3, 13, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_D14__EMI_D14		MXS_IOMUX_PAD_NAKED(3, 14, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_D15__EMI_D15		MXS_IOMUX_PAD_NAKED(3, 15, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_DQM0__EMI_DQM0		MXS_IOMUX_PAD_NAKED(3, 16, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_DQM1__EMI_DQM1		MXS_IOMUX_PAD_NAKED(3, 17, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_DQS0__EMI_DQS0		MXS_IOMUX_PAD_NAKED(3, 18, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_DQS1__EMI_DQS1		MXS_IOMUX_PAD_NAKED(3, 19, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_CLK__EMI_CLK		MXS_IOMUX_PAD_NAKED(3, 20, PAD_MUXSEL_0)
+#define MX23_PAD_EMI_CLKN__EMI_CLKN		MXS_IOMUX_PAD_NAKED(3, 21, PAD_MUXSEL_0)
+
+/* MUXSEL_1 */
+#define MX23_PAD_GPMI_D00__LCD_D8		MXS_IOMUX_PAD_NAKED(0,  0, PAD_MUXSEL_1)
+#define MX23_PAD_GPMI_D01__LCD_D9		MXS_IOMUX_PAD_NAKED(0,  1, PAD_MUXSEL_1)
+#define MX23_PAD_GPMI_D02__LCD_D10		MXS_IOMUX_PAD_NAKED(0,  2, PAD_MUXSEL_1)
+#define MX23_PAD_GPMI_D03__LCD_D11		MXS_IOMUX_PAD_NAKED(0,  3, PAD_MUXSEL_1)
+#define MX23_PAD_GPMI_D04__LCD_D12		MXS_IOMUX_PAD_NAKED(0,  4, PAD_MUXSEL_1)
+#define MX23_PAD_GPMI_D05__LCD_D13		MXS_IOMUX_PAD_NAKED(0,  5, PAD_MUXSEL_1)
+#define MX23_PAD_GPMI_D06__LCD_D14		MXS_IOMUX_PAD_NAKED(0,  6, PAD_MUXSEL_1)
+#define MX23_PAD_GPMI_D07__LCD_D15		MXS_IOMUX_PAD_NAKED(0,  7, PAD_MUXSEL_1)
+#define MX23_PAD_GPMI_D08__LCD_D18		MXS_IOMUX_PAD_NAKED(0,  8, PAD_MUXSEL_1)
+#define MX23_PAD_GPMI_D09__LCD_D19		MXS_IOMUX_PAD_NAKED(0,  9, PAD_MUXSEL_1)
+#define MX23_PAD_GPMI_D10__LCD_D20		MXS_IOMUX_PAD_NAKED(0, 10, PAD_MUXSEL_1)
+#define MX23_PAD_GPMI_D11__LCD_D21		MXS_IOMUX_PAD_NAKED(0, 11, PAD_MUXSEL_1)
+#define MX23_PAD_GPMI_D12__LCD_D22		MXS_IOMUX_PAD_NAKED(0, 12, PAD_MUXSEL_1)
+#define MX23_PAD_GPMI_D13__LCD_D23		MXS_IOMUX_PAD_NAKED(0, 13, PAD_MUXSEL_1)
+#define MX23_PAD_GPMI_D14__AUART2_RX		MXS_IOMUX_PAD_NAKED(0, 14, PAD_MUXSEL_1)
+#define MX23_PAD_GPMI_D15__AUART2_TX		MXS_IOMUX_PAD_NAKED(0, 15, PAD_MUXSEL_1)
+#define MX23_PAD_GPMI_CLE__LCD_D16		MXS_IOMUX_PAD_NAKED(0, 16, PAD_MUXSEL_1)
+#define MX23_PAD_GPMI_ALE__LCD_D17		MXS_IOMUX_PAD_NAKED(0, 17, PAD_MUXSEL_1)
+#define MX23_PAD_GPMI_CE2N__ATA_A2		MXS_IOMUX_PAD_NAKED(0, 18, PAD_MUXSEL_1)
+#define MX23_PAD_AUART1_RTS__IR_CLK		MXS_IOMUX_PAD_NAKED(0, 27, PAD_MUXSEL_1)
+#define MX23_PAD_AUART1_RX__IR_RX		MXS_IOMUX_PAD_NAKED(0, 28, PAD_MUXSEL_1)
+#define MX23_PAD_AUART1_TX__IR_TX		MXS_IOMUX_PAD_NAKED(0, 29, PAD_MUXSEL_1)
+#define MX23_PAD_I2C_SCL__GPMI_RDY2		MXS_IOMUX_PAD_NAKED(0, 30, PAD_MUXSEL_1)
+#define MX23_PAD_I2C_SDA__GPMI_CE2N		MXS_IOMUX_PAD_NAKED(0, 31, PAD_MUXSEL_1)
+
+#define MX23_PAD_LCD_D00__ETM_DA8		MXS_IOMUX_PAD_NAKED(1,  0, PAD_MUXSEL_1)
+#define MX23_PAD_LCD_D01__ETM_DA9		MXS_IOMUX_PAD_NAKED(1,  1, PAD_MUXSEL_1)
+#define MX23_PAD_LCD_D02__ETM_DA10		MXS_IOMUX_PAD_NAKED(1,  2, PAD_MUXSEL_1)
+#define MX23_PAD_LCD_D03__ETM_DA11		MXS_IOMUX_PAD_NAKED(1,  3, PAD_MUXSEL_1)
+#define MX23_PAD_LCD_D04__ETM_DA12		MXS_IOMUX_PAD_NAKED(1,  4, PAD_MUXSEL_1)
+#define MX23_PAD_LCD_D05__ETM_DA13		MXS_IOMUX_PAD_NAKED(1,  5, PAD_MUXSEL_1)
+#define MX23_PAD_LCD_D06__ETM_DA14		MXS_IOMUX_PAD_NAKED(1,  6, PAD_MUXSEL_1)
+#define MX23_PAD_LCD_D07__ETM_DA15		MXS_IOMUX_PAD_NAKED(1,  7, PAD_MUXSEL_1)
+#define MX23_PAD_LCD_D08__ETM_DA0		MXS_IOMUX_PAD_NAKED(1,  8, PAD_MUXSEL_1)
+#define MX23_PAD_LCD_D09__ETM_DA1		MXS_IOMUX_PAD_NAKED(1,  9, PAD_MUXSEL_1)
+#define MX23_PAD_LCD_D10__ETM_DA2		MXS_IOMUX_PAD_NAKED(1, 10, PAD_MUXSEL_1)
+#define MX23_PAD_LCD_D11__ETM_DA3		MXS_IOMUX_PAD_NAKED(1, 11, PAD_MUXSEL_1)
+#define MX23_PAD_LCD_D12__ETM_DA4		MXS_IOMUX_PAD_NAKED(1, 12, PAD_MUXSEL_1)
+#define MX23_PAD_LCD_D13__ETM_DA5		MXS_IOMUX_PAD_NAKED(1, 13, PAD_MUXSEL_1)
+#define MX23_PAD_LCD_D14__ETM_DA6		MXS_IOMUX_PAD_NAKED(1, 14, PAD_MUXSEL_1)
+#define MX23_PAD_LCD_D15__ETM_DA7		MXS_IOMUX_PAD_NAKED(1, 15, PAD_MUXSEL_1)
+#define MX23_PAD_LCD_RESET__ETM_TCTL		MXS_IOMUX_PAD_NAKED(1, 18, PAD_MUXSEL_1)
+#define MX23_PAD_LCD_RS__ETM_TCLK		MXS_IOMUX_PAD_NAKED(1, 19, PAD_MUXSEL_1)
+#define MX23_PAD_LCD_DOTCK__GPMI_RDY3		MXS_IOMUX_PAD_NAKED(1, 22, PAD_MUXSEL_1)
+#define MX23_PAD_LCD_ENABLE__I2C_SCL		MXS_IOMUX_PAD_NAKED(1, 23, PAD_MUXSEL_1)
+#define MX23_PAD_LCD_HSYNC__I2C_SDA		MXS_IOMUX_PAD_NAKED(1, 24, PAD_MUXSEL_1)
+#define MX23_PAD_LCD_VSYNC__LCD_BUSY		MXS_IOMUX_PAD_NAKED(1, 25, PAD_MUXSEL_1)
+#define MX23_PAD_PWM0__ROTARYA			MXS_IOMUX_PAD_NAKED(1, 26, PAD_MUXSEL_1)
+#define MX23_PAD_PWM1__ROTARYB			MXS_IOMUX_PAD_NAKED(1, 27, PAD_MUXSEL_1)
+#define MX23_PAD_PWM2__GPMI_RDY3		MXS_IOMUX_PAD_NAKED(1, 28, PAD_MUXSEL_1)
+#define MX23_PAD_PWM3__ETM_TCTL			MXS_IOMUX_PAD_NAKED(1, 29, PAD_MUXSEL_1)
+#define MX23_PAD_PWM4__ETM_TCLK			MXS_IOMUX_PAD_NAKED(1, 30, PAD_MUXSEL_1)
+
+#define MX23_PAD_SSP1_DETECT__GPMI_CE3N		MXS_IOMUX_PAD_NAKED(2,  1, PAD_MUXSEL_1)
+#define MX23_PAD_SSP1_DATA1__I2C_SCL		MXS_IOMUX_PAD_NAKED(2,  3, PAD_MUXSEL_1)
+#define MX23_PAD_SSP1_DATA2__I2C_SDA		MXS_IOMUX_PAD_NAKED(2,  4, PAD_MUXSEL_1)
+#define MX23_PAD_ROTARYA__AUART2_RTS		MXS_IOMUX_PAD_NAKED(2,  7, PAD_MUXSEL_1)
+#define MX23_PAD_ROTARYB__AUART2_CTS		MXS_IOMUX_PAD_NAKED(2,  8, PAD_MUXSEL_1)
+
+/* MUXSEL_2 */
+#define MX23_PAD_GPMI_D00__SSP2_DATA0		MXS_IOMUX_PAD_NAKED(0,  0, PAD_MUXSEL_2)
+#define MX23_PAD_GPMI_D01__SSP2_DATA1		MXS_IOMUX_PAD_NAKED(0,  1, PAD_MUXSEL_2)
+#define MX23_PAD_GPMI_D02__SSP2_DATA2		MXS_IOMUX_PAD_NAKED(0,  2, PAD_MUXSEL_2)
+#define MX23_PAD_GPMI_D03__SSP2_DATA3		MXS_IOMUX_PAD_NAKED(0,  3, PAD_MUXSEL_2)
+#define MX23_PAD_GPMI_D04__SSP2_DATA4		MXS_IOMUX_PAD_NAKED(0,  4, PAD_MUXSEL_2)
+#define MX23_PAD_GPMI_D05__SSP2_DATA5		MXS_IOMUX_PAD_NAKED(0,  5, PAD_MUXSEL_2)
+#define MX23_PAD_GPMI_D06__SSP2_DATA6		MXS_IOMUX_PAD_NAKED(0,  6, PAD_MUXSEL_2)
+#define MX23_PAD_GPMI_D07__SSP2_DATA7		MXS_IOMUX_PAD_NAKED(0,  7, PAD_MUXSEL_2)
+#define MX23_PAD_GPMI_D08__SSP1_DATA4		MXS_IOMUX_PAD_NAKED(0,  8, PAD_MUXSEL_2)
+#define MX23_PAD_GPMI_D09__SSP1_DATA5		MXS_IOMUX_PAD_NAKED(0,  9, PAD_MUXSEL_2)
+#define MX23_PAD_GPMI_D10__SSP1_DATA6		MXS_IOMUX_PAD_NAKED(0, 10, PAD_MUXSEL_2)
+#define MX23_PAD_GPMI_D11__SSP1_DATA7		MXS_IOMUX_PAD_NAKED(0, 11, PAD_MUXSEL_2)
+#define MX23_PAD_GPMI_D15__GPMI_CE3N		MXS_IOMUX_PAD_NAKED(0, 15, PAD_MUXSEL_2)
+#define MX23_PAD_GPMI_RDY0__SSP2_DETECT		MXS_IOMUX_PAD_NAKED(0, 19, PAD_MUXSEL_2)
+#define MX23_PAD_GPMI_RDY1__SSP2_CMD		MXS_IOMUX_PAD_NAKED(0, 20, PAD_MUXSEL_2)
+#define MX23_PAD_GPMI_WRN__SSP2_SCK		MXS_IOMUX_PAD_NAKED(0, 24, PAD_MUXSEL_2)
+#define MX23_PAD_AUART1_CTS__SSP1_DATA4		MXS_IOMUX_PAD_NAKED(0, 26, PAD_MUXSEL_2)
+#define MX23_PAD_AUART1_RTS__SSP1_DATA5		MXS_IOMUX_PAD_NAKED(0, 27, PAD_MUXSEL_2)
+#define MX23_PAD_AUART1_RX__SSP1_DATA6		MXS_IOMUX_PAD_NAKED(0, 28, PAD_MUXSEL_2)
+#define MX23_PAD_AUART1_TX__SSP1_DATA7		MXS_IOMUX_PAD_NAKED(0, 29, PAD_MUXSEL_2)
+#define MX23_PAD_I2C_SCL__AUART1_TX		MXS_IOMUX_PAD_NAKED(0, 30, PAD_MUXSEL_2)
+#define MX23_PAD_I2C_SDA__AUART1_RX		MXS_IOMUX_PAD_NAKED(0, 31, PAD_MUXSEL_2)
+
+#define MX23_PAD_LCD_D08__SAIF2_SDATA0		MXS_IOMUX_PAD_NAKED(1,  8, PAD_MUXSEL_2)
+#define MX23_PAD_LCD_D09__SAIF1_SDATA0		MXS_IOMUX_PAD_NAKED(1,  9, PAD_MUXSEL_2)
+#define MX23_PAD_LCD_D10__SAIF_MCLK_BITCLK	MXS_IOMUX_PAD_NAKED(1, 10, PAD_MUXSEL_2)
+#define MX23_PAD_LCD_D11__SAIF_LRCLK		MXS_IOMUX_PAD_NAKED(1, 11, PAD_MUXSEL_2)
+#define MX23_PAD_LCD_D12__SAIF2_SDATA1		MXS_IOMUX_PAD_NAKED(1, 12, PAD_MUXSEL_2)
+#define MX23_PAD_LCD_D13__SAIF2_SDATA2		MXS_IOMUX_PAD_NAKED(1, 13, PAD_MUXSEL_2)
+#define MX23_PAD_LCD_D14__SAIF1_SDATA2		MXS_IOMUX_PAD_NAKED(1, 14, PAD_MUXSEL_2)
+#define MX23_PAD_LCD_D15__SAIF1_SDATA1		MXS_IOMUX_PAD_NAKED(1, 15, PAD_MUXSEL_2)
+#define MX23_PAD_LCD_D16__SAIF_ALT_BITCLK	MXS_IOMUX_PAD_NAKED(1, 16, PAD_MUXSEL_2)
+#define MX23_PAD_LCD_RESET__GPMI_CE3N		MXS_IOMUX_PAD_NAKED(1, 18, PAD_MUXSEL_2)
+#define MX23_PAD_PWM0__DUART_RX			MXS_IOMUX_PAD_NAKED(1, 26, PAD_MUXSEL_2)
+#define MX23_PAD_PWM1__DUART_TX			MXS_IOMUX_PAD_NAKED(1, 27, PAD_MUXSEL_2)
+#define MX23_PAD_PWM3__AUART1_CTS		MXS_IOMUX_PAD_NAKED(1, 29, PAD_MUXSEL_2)
+#define MX23_PAD_PWM4__AUART1_RTS		MXS_IOMUX_PAD_NAKED(1, 30, PAD_MUXSEL_2)
+
+#define MX23_PAD_SSP1_CMD__JTAG_TDO		MXS_IOMUX_PAD_NAKED(2,  0, PAD_MUXSEL_2)
+#define MX23_PAD_SSP1_DETECT__USB_OTG_ID	MXS_IOMUX_PAD_NAKED(2,  1, PAD_MUXSEL_2)
+#define MX23_PAD_SSP1_DATA0__JTAG_TDI		MXS_IOMUX_PAD_NAKED(2,  2, PAD_MUXSEL_2)
+#define MX23_PAD_SSP1_DATA1__JTAG_TCLK		MXS_IOMUX_PAD_NAKED(2,  3, PAD_MUXSEL_2)
+#define MX23_PAD_SSP1_DATA2__JTAG_RTCK		MXS_IOMUX_PAD_NAKED(2,  4, PAD_MUXSEL_2)
+#define MX23_PAD_SSP1_DATA3__JTAG_TMS		MXS_IOMUX_PAD_NAKED(2,  5, PAD_MUXSEL_2)
+#define MX23_PAD_SSP1_SCK__JTAG_TRST		MXS_IOMUX_PAD_NAKED(2,  6, PAD_MUXSEL_2)
+#define MX23_PAD_ROTARYA__SPDIF			MXS_IOMUX_PAD_NAKED(2,  7, PAD_MUXSEL_2)
+#define MX23_PAD_ROTARYB__GPMI_CE3N		MXS_IOMUX_PAD_NAKED(2,  8, PAD_MUXSEL_2)
+
+/* MUXSEL_GPIO */
+#define MX23_PAD_GPMI_D00__GPIO_0_0		MXS_IOMUX_PAD_NAKED(0,  0, PAD_MUXSEL_GPIO)
+#define MX23_PAD_GPMI_D01__GPIO_0_1		MXS_IOMUX_PAD_NAKED(0,  1, PAD_MUXSEL_GPIO)
+#define MX23_PAD_GPMI_D02__GPIO_0_2		MXS_IOMUX_PAD_NAKED(0,  2, PAD_MUXSEL_GPIO)
+#define MX23_PAD_GPMI_D03__GPIO_0_3		MXS_IOMUX_PAD_NAKED(0,  3, PAD_MUXSEL_GPIO)
+#define MX23_PAD_GPMI_D04__GPIO_0_4		MXS_IOMUX_PAD_NAKED(0,  4, PAD_MUXSEL_GPIO)
+#define MX23_PAD_GPMI_D05__GPIO_0_5		MXS_IOMUX_PAD_NAKED(0,  5, PAD_MUXSEL_GPIO)
+#define MX23_PAD_GPMI_D06__GPIO_0_6		MXS_IOMUX_PAD_NAKED(0,  6, PAD_MUXSEL_GPIO)
+#define MX23_PAD_GPMI_D07__GPIO_0_7		MXS_IOMUX_PAD_NAKED(0,  7, PAD_MUXSEL_GPIO)
+#define MX23_PAD_GPMI_D08__GPIO_0_8		MXS_IOMUX_PAD_NAKED(0,  8, PAD_MUXSEL_GPIO)
+#define MX23_PAD_GPMI_D09__GPIO_0_9		MXS_IOMUX_PAD_NAKED(0,  9, PAD_MUXSEL_GPIO)
+#define MX23_PAD_GPMI_D10__GPIO_0_10		MXS_IOMUX_PAD_NAKED(0, 10, PAD_MUXSEL_GPIO)
+#define MX23_PAD_GPMI_D11__GPIO_0_11		MXS_IOMUX_PAD_NAKED(0, 11, PAD_MUXSEL_GPIO)
+#define MX23_PAD_GPMI_D12__GPIO_0_12		MXS_IOMUX_PAD_NAKED(0, 12, PAD_MUXSEL_GPIO)
+#define MX23_PAD_GPMI_D13__GPIO_0_13		MXS_IOMUX_PAD_NAKED(0, 13, PAD_MUXSEL_GPIO)
+#define MX23_PAD_GPMI_D14__GPIO_0_14		MXS_IOMUX_PAD_NAKED(0, 14, PAD_MUXSEL_GPIO)
+#define MX23_PAD_GPMI_D15__GPIO_0_15		MXS_IOMUX_PAD_NAKED(0, 15, PAD_MUXSEL_GPIO)
+#define MX23_PAD_GPMI_CLE__GPIO_0_16		MXS_IOMUX_PAD_NAKED(0, 16, PAD_MUXSEL_GPIO)
+#define MX23_PAD_GPMI_ALE__GPIO_0_17		MXS_IOMUX_PAD_NAKED(0, 17, PAD_MUXSEL_GPIO)
+#define MX23_PAD_GPMI_CE2N__GPIO_0_18		MXS_IOMUX_PAD_NAKED(0, 18, PAD_MUXSEL_GPIO)
+#define MX23_PAD_GPMI_RDY0__GPIO_0_19		MXS_IOMUX_PAD_NAKED(0, 19, PAD_MUXSEL_GPIO)
+#define MX23_PAD_GPMI_RDY1__GPIO_0_20		MXS_IOMUX_PAD_NAKED(0, 20, PAD_MUXSEL_GPIO)
+#define MX23_PAD_GPMI_RDY2__GPIO_0_21		MXS_IOMUX_PAD_NAKED(0, 21, PAD_MUXSEL_GPIO)
+#define MX23_PAD_GPMI_RDY3__GPIO_0_22		MXS_IOMUX_PAD_NAKED(0, 22, PAD_MUXSEL_GPIO)
+#define MX23_PAD_GPMI_WPN__GPIO_0_23		MXS_IOMUX_PAD_NAKED(0, 23, PAD_MUXSEL_GPIO)
+#define MX23_PAD_GPMI_WRN__GPIO_0_24		MXS_IOMUX_PAD_NAKED(0, 24, PAD_MUXSEL_GPIO)
+#define MX23_PAD_GPMI_RDN__GPIO_0_25		MXS_IOMUX_PAD_NAKED(0, 25, PAD_MUXSEL_GPIO)
+#define MX23_PAD_AUART1_CTS__GPIO_0_26		MXS_IOMUX_PAD_NAKED(0, 26, PAD_MUXSEL_GPIO)
+#define MX23_PAD_AUART1_RTS__GPIO_0_27		MXS_IOMUX_PAD_NAKED(0, 27, PAD_MUXSEL_GPIO)
+#define MX23_PAD_AUART1_RX__GPIO_0_28		MXS_IOMUX_PAD_NAKED(0, 28, PAD_MUXSEL_GPIO)
+#define MX23_PAD_AUART1_TX__GPIO_0_29		MXS_IOMUX_PAD_NAKED(0, 29, PAD_MUXSEL_GPIO)
+#define MX23_PAD_I2C_SCL__GPIO_0_30		MXS_IOMUX_PAD_NAKED(0, 30, PAD_MUXSEL_GPIO)
+#define MX23_PAD_I2C_SDA__GPIO_0_31		MXS_IOMUX_PAD_NAKED(0, 31, PAD_MUXSEL_GPIO)
+
+#define MX23_PAD_LCD_D00__GPIO_1_0		MXS_IOMUX_PAD_NAKED(1,  0, PAD_MUXSEL_GPIO)
+#define MX23_PAD_LCD_D01__GPIO_1_1		MXS_IOMUX_PAD_NAKED(1,  1, PAD_MUXSEL_GPIO)
+#define MX23_PAD_LCD_D02__GPIO_1_2		MXS_IOMUX_PAD_NAKED(1,  2, PAD_MUXSEL_GPIO)
+#define MX23_PAD_LCD_D03__GPIO_1_3		MXS_IOMUX_PAD_NAKED(1,  3, PAD_MUXSEL_GPIO)
+#define MX23_PAD_LCD_D04__GPIO_1_4		MXS_IOMUX_PAD_NAKED(1,  4, PAD_MUXSEL_GPIO)
+#define MX23_PAD_LCD_D05__GPIO_1_5		MXS_IOMUX_PAD_NAKED(1,  5, PAD_MUXSEL_GPIO)
+#define MX23_PAD_LCD_D06__GPIO_1_6		MXS_IOMUX_PAD_NAKED(1,  6, PAD_MUXSEL_GPIO)
+#define MX23_PAD_LCD_D07__GPIO_1_7		MXS_IOMUX_PAD_NAKED(1,  7, PAD_MUXSEL_GPIO)
+#define MX23_PAD_LCD_D08__GPIO_1_8		MXS_IOMUX_PAD_NAKED(1,  8, PAD_MUXSEL_GPIO)
+#define MX23_PAD_LCD_D09__GPIO_1_9		MXS_IOMUX_PAD_NAKED(1,  9, PAD_MUXSEL_GPIO)
+#define MX23_PAD_LCD_D10__GPIO_1_10		MXS_IOMUX_PAD_NAKED(1, 10, PAD_MUXSEL_GPIO)
+#define MX23_PAD_LCD_D11__GPIO_1_11		MXS_IOMUX_PAD_NAKED(1, 11, PAD_MUXSEL_GPIO)
+#define MX23_PAD_LCD_D12__GPIO_1_12		MXS_IOMUX_PAD_NAKED(1, 12, PAD_MUXSEL_GPIO)
+#define MX23_PAD_LCD_D13__GPIO_1_13		MXS_IOMUX_PAD_NAKED(1, 13, PAD_MUXSEL_GPIO)
+#define MX23_PAD_LCD_D14__GPIO_1_14		MXS_IOMUX_PAD_NAKED(1, 14, PAD_MUXSEL_GPIO)
+#define MX23_PAD_LCD_D15__GPIO_1_15		MXS_IOMUX_PAD_NAKED(1, 15, PAD_MUXSEL_GPIO)
+#define MX23_PAD_LCD_D16__GPIO_1_16		MXS_IOMUX_PAD_NAKED(1, 16, PAD_MUXSEL_GPIO)
+#define MX23_PAD_LCD_D17__GPIO_1_17		MXS_IOMUX_PAD_NAKED(1, 17, PAD_MUXSEL_GPIO)
+#define MX23_PAD_LCD_RESET__GPIO_1_18		MXS_IOMUX_PAD_NAKED(1, 18, PAD_MUXSEL_GPIO)
+#define MX23_PAD_LCD_RS__GPIO_1_19		MXS_IOMUX_PAD_NAKED(1, 19, PAD_MUXSEL_GPIO)
+#define MX23_PAD_LCD_WR__GPIO_1_20		MXS_IOMUX_PAD_NAKED(1, 20, PAD_MUXSEL_GPIO)
+#define MX23_PAD_LCD_CS__GPIO_1_21		MXS_IOMUX_PAD_NAKED(1, 21, PAD_MUXSEL_GPIO)
+#define MX23_PAD_LCD_DOTCK__GPIO_1_22		MXS_IOMUX_PAD_NAKED(1, 22, PAD_MUXSEL_GPIO)
+#define MX23_PAD_LCD_ENABLE__GPIO_1_23		MXS_IOMUX_PAD_NAKED(1, 23, PAD_MUXSEL_GPIO)
+#define MX23_PAD_LCD_HSYNC__GPIO_1_24		MXS_IOMUX_PAD_NAKED(1, 24, PAD_MUXSEL_GPIO)
+#define MX23_PAD_LCD_VSYNC__GPIO_1_25		MXS_IOMUX_PAD_NAKED(1, 25, PAD_MUXSEL_GPIO)
+#define MX23_PAD_PWM0__GPIO_1_26		MXS_IOMUX_PAD_NAKED(1, 26, PAD_MUXSEL_GPIO)
+#define MX23_PAD_PWM1__GPIO_1_27		MXS_IOMUX_PAD_NAKED(1, 27, PAD_MUXSEL_GPIO)
+#define MX23_PAD_PWM2__GPIO_1_28		MXS_IOMUX_PAD_NAKED(1, 28, PAD_MUXSEL_GPIO)
+#define MX23_PAD_PWM3__GPIO_1_29		MXS_IOMUX_PAD_NAKED(1, 29, PAD_MUXSEL_GPIO)
+#define MX23_PAD_PWM4__GPIO_1_30		MXS_IOMUX_PAD_NAKED(1, 30, PAD_MUXSEL_GPIO)
+
+#define MX23_PAD_SSP1_CMD__GPIO_2_0		MXS_IOMUX_PAD_NAKED(2,  0, PAD_MUXSEL_GPIO)
+#define MX23_PAD_SSP1_DETECT__GPIO_2_1		MXS_IOMUX_PAD_NAKED(2,  1, PAD_MUXSEL_GPIO)
+#define MX23_PAD_SSP1_DATA0__GPIO_2_2		MXS_IOMUX_PAD_NAKED(2,  2, PAD_MUXSEL_GPIO)
+#define MX23_PAD_SSP1_DATA1__GPIO_2_3		MXS_IOMUX_PAD_NAKED(2,  3, PAD_MUXSEL_GPIO)
+#define MX23_PAD_SSP1_DATA2__GPIO_2_4		MXS_IOMUX_PAD_NAKED(2,  4, PAD_MUXSEL_GPIO)
+#define MX23_PAD_SSP1_DATA3__GPIO_2_5		MXS_IOMUX_PAD_NAKED(2,  5, PAD_MUXSEL_GPIO)
+#define MX23_PAD_SSP1_SCK__GPIO_2_6		MXS_IOMUX_PAD_NAKED(2,  6, PAD_MUXSEL_GPIO)
+#define MX23_PAD_ROTARYA__GPIO_2_7		MXS_IOMUX_PAD_NAKED(2,  7, PAD_MUXSEL_GPIO)
+#define MX23_PAD_ROTARYB__GPIO_2_8		MXS_IOMUX_PAD_NAKED(2,  8, PAD_MUXSEL_GPIO)
+#define MX23_PAD_EMI_A00__GPIO_2_9		MXS_IOMUX_PAD_NAKED(2,  9, PAD_MUXSEL_GPIO)
+#define MX23_PAD_EMI_A01__GPIO_2_10		MXS_IOMUX_PAD_NAKED(2, 10, PAD_MUXSEL_GPIO)
+#define MX23_PAD_EMI_A02__GPIO_2_11		MXS_IOMUX_PAD_NAKED(2, 11, PAD_MUXSEL_GPIO)
+#define MX23_PAD_EMI_A03__GPIO_2_12		MXS_IOMUX_PAD_NAKED(2, 12, PAD_MUXSEL_GPIO)
+#define MX23_PAD_EMI_A04__GPIO_2_13		MXS_IOMUX_PAD_NAKED(2, 13, PAD_MUXSEL_GPIO)
+#define MX23_PAD_EMI_A05__GPIO_2_14		MXS_IOMUX_PAD_NAKED(2, 14, PAD_MUXSEL_GPIO)
+#define MX23_PAD_EMI_A06__GPIO_2_15		MXS_IOMUX_PAD_NAKED(2, 15, PAD_MUXSEL_GPIO)
+#define MX23_PAD_EMI_A07__GPIO_2_16		MXS_IOMUX_PAD_NAKED(2, 16, PAD_MUXSEL_GPIO)
+#define MX23_PAD_EMI_A08__GPIO_2_17		MXS_IOMUX_PAD_NAKED(2, 17, PAD_MUXSEL_GPIO)
+#define MX23_PAD_EMI_A09__GPIO_2_18		MXS_IOMUX_PAD_NAKED(2, 18, PAD_MUXSEL_GPIO)
+#define MX23_PAD_EMI_A10__GPIO_2_19		MXS_IOMUX_PAD_NAKED(2, 19, PAD_MUXSEL_GPIO)
+#define MX23_PAD_EMI_A11__GPIO_2_20		MXS_IOMUX_PAD_NAKED(2, 20, PAD_MUXSEL_GPIO)
+#define MX23_PAD_EMI_A12__GPIO_2_21		MXS_IOMUX_PAD_NAKED(2, 21, PAD_MUXSEL_GPIO)
+#define MX23_PAD_EMI_BA0__GPIO_2_22		MXS_IOMUX_PAD_NAKED(2, 22, PAD_MUXSEL_GPIO)
+#define MX23_PAD_EMI_BA1__GPIO_2_23		MXS_IOMUX_PAD_NAKED(2, 23, PAD_MUXSEL_GPIO)
+#define MX23_PAD_EMI_CASN__GPIO_2_24		MXS_IOMUX_PAD_NAKED(2, 24, PAD_MUXSEL_GPIO)
+#define MX23_PAD_EMI_CE0N__GPIO_2_25		MXS_IOMUX_PAD_NAKED(2, 25, PAD_MUXSEL_GPIO)
+#define MX23_PAD_EMI_CE1N__GPIO_2_26		MXS_IOMUX_PAD_NAKED(2, 26, PAD_MUXSEL_GPIO)
+#define MX23_PAD_GPMI_CE1N__GPIO_2_27		MXS_IOMUX_PAD_NAKED(2, 27, PAD_MUXSEL_GPIO)
+#define MX23_PAD_GPMI_CE0N__GPIO_2_28		MXS_IOMUX_PAD_NAKED(2, 28, PAD_MUXSEL_GPIO)
+#define MX23_PAD_EMI_CKE__GPIO_2_29		MXS_IOMUX_PAD_NAKED(2, 29, PAD_MUXSEL_GPIO)
+#define MX23_PAD_EMI_RASN__GPIO_2_30		MXS_IOMUX_PAD_NAKED(2, 30, PAD_MUXSEL_GPIO)
+#define MX23_PAD_EMI_WEN__GPIO_2_31		MXS_IOMUX_PAD_NAKED(2, 31, PAD_MUXSEL_GPIO)
+
+#endif /* __MACH_IOMUX_MX23_H__ */
diff --git a/arch/arm/include/asm/arch-mxs/sys_proto.h b/arch/arm/include/asm/arch-mxs/sys_proto.h
index 9bddc12..a4290d8 100644
--- a/arch/arm/include/asm/arch-mxs/sys_proto.h
+++ b/arch/arm/include/asm/arch-mxs/sys_proto.h
@@ -34,7 +34,13 @@ int mxs_wait_mask_clr(struct mxs_register_32 *reg,
 int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int));
 
 #ifdef CONFIG_SPL_BUILD
+
+#if defined(CONFIG_MX23)
+#include <asm/arch/iomux-mx23.h>
+#elif defined(CONFIG_MX28)
 #include <asm/arch/iomux-mx28.h>
+#endif
+
 void mxs_common_spl_init(const iomux_cfg_t *iomux_setup,
 			const unsigned int iomux_size);
 #endif
-- 
1.7.10.4

[U-Boot] [PATCH 06/18] mx23: Add POWER and CLKCTRL register definitions

[Marek Vasut]

Add register definitions for the i.MX23 power control block and
clock control block. These are essential for the basic bootstrap
of the i.MX23. Also, properly include them in imx-regs.h .

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
---
 arch/arm/include/asm/arch-mxs/imx-regs.h          |    7 +-
 arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h |  221 +++++++++++++
 arch/arm/include/asm/arch-mxs/regs-power-mx23.h   |  358 +++++++++++++++++++++
 3 files changed, 585 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h
 create mode 100644 arch/arm/include/asm/arch-mxs/regs-power-mx23.h

diff --git a/arch/arm/include/asm/arch-mxs/imx-regs.h b/arch/arm/include/asm/arch-mxs/imx-regs.h
index 9764041..05eb63c 100644
--- a/arch/arm/include/asm/arch-mxs/imx-regs.h
+++ b/arch/arm/include/asm/arch-mxs/imx-regs.h
@@ -1,5 +1,5 @@
 /*
- * Freescale i.MX28 Registers
+ * Freescale i.MX23/i.MX28 Registers
  *
  * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
  * on behalf of DENX Software Engineering GmbH
@@ -37,6 +37,11 @@
 #include <asm/arch/regs-ssp.h>
 #include <asm/arch/regs-timrot.h>
 
+#ifdef CONFIG_MX23
+#include <asm/arch/regs-clkctrl-mx23.h>
+#include <asm/arch/regs-power-mx23.h>
+#endif
+
 #ifdef CONFIG_MX28
 #include <asm/arch/regs-clkctrl-mx28.h>
 #include <asm/arch/regs-power-mx28.h>
diff --git a/arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h b/arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h
new file mode 100644
index 0000000..62810ec
--- /dev/null
+++ b/arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h
@@ -0,0 +1,221 @@
+/*
+ * Freescale i.MX23 CLKCTRL Register Definitions
+ *
+ * Copyright (C) 2012 Marek Vasut <marek.vasut@gmail.com>
+ * on behalf of DENX Software Engineering GmbH
+ *
+ * Based on code from LTIB:
+ * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ *
+ */
+
+#ifndef __MX23_REGS_CLKCTRL_H__
+#define __MX23_REGS_CLKCTRL_H__
+
+#include <asm/arch/regs-common.h>
+
+#ifndef	__ASSEMBLY__
+struct mxs_clkctrl_regs {
+	mxs_reg_32(hw_clkctrl_pll0ctrl0)	/* 0x00 */
+	uint32_t	hw_clkctrl_pll0ctrl1;	/* 0x10 */
+	uint32_t	reserved_pll0ctrl1[3];	/* 0x14-0x1c */
+	mxs_reg_32(hw_clkctrl_cpu)		/* 0x20 */
+	mxs_reg_32(hw_clkctrl_hbus)		/* 0x30 */
+	mxs_reg_32(hw_clkctrl_xbus)		/* 0x40 */
+	mxs_reg_32(hw_clkctrl_xtal)		/* 0x50 */
+	mxs_reg_32(hw_clkctrl_pix)		/* 0x60 */
+	mxs_reg_32(hw_clkctrl_ssp0)		/* 0x70 */
+	mxs_reg_32(hw_clkctrl_gpmi)		/* 0x80 */
+	mxs_reg_32(hw_clkctrl_spdif)		/* 0x90 */
+	mxs_reg_32(hw_clkctrl_emi)		/* 0xa0 */
+
+	uint32_t	reserved1[4];
+
+	mxs_reg_32(hw_clkctrl_saif0)		/* 0xc0 */
+	mxs_reg_32(hw_clkctrl_tv)		/* 0xd0 */
+	mxs_reg_32(hw_clkctrl_etm)		/* 0xe0 */
+	mxs_reg_8(hw_clkctrl_frac0)		/* 0xf0 */
+	mxs_reg_8(hw_clkctrl_frac1)		/* 0x100 */
+	mxs_reg_32(hw_clkctrl_clkseq)		/* 0x110 */
+	mxs_reg_32(hw_clkctrl_reset)		/* 0x120 */
+	mxs_reg_32(hw_clkctrl_status)		/* 0x130 */
+	mxs_reg_32(hw_clkctrl_version)		/* 0x140 */
+};
+#endif
+
+#define	CLKCTRL_PLL0CTRL0_LFR_SEL_MASK		(0x3 << 28)
+#define	CLKCTRL_PLL0CTRL0_LFR_SEL_OFFSET	28
+#define	CLKCTRL_PLL0CTRL0_LFR_SEL_DEFAULT	(0x0 << 28)
+#define	CLKCTRL_PLL0CTRL0_LFR_SEL_TIMES_2	(0x1 << 28)
+#define	CLKCTRL_PLL0CTRL0_LFR_SEL_TIMES_05	(0x2 << 28)
+#define	CLKCTRL_PLL0CTRL0_LFR_SEL_UNDEFINED	(0x3 << 28)
+#define	CLKCTRL_PLL0CTRL0_CP_SEL_MASK		(0x3 << 24)
+#define	CLKCTRL_PLL0CTRL0_CP_SEL_OFFSET		24
+#define	CLKCTRL_PLL0CTRL0_CP_SEL_DEFAULT	(0x0 << 24)
+#define	CLKCTRL_PLL0CTRL0_CP_SEL_TIMES_2	(0x1 << 24)
+#define	CLKCTRL_PLL0CTRL0_CP_SEL_TIMES_05	(0x2 << 24)
+#define	CLKCTRL_PLL0CTRL0_CP_SEL_UNDEFINED	(0x3 << 24)
+#define	CLKCTRL_PLL0CTRL0_DIV_SEL_MASK		(0x3 << 20)
+#define	CLKCTRL_PLL0CTRL0_DIV_SEL_OFFSET	20
+#define	CLKCTRL_PLL0CTRL0_DIV_SEL_DEFAULT	(0x0 << 20)
+#define	CLKCTRL_PLL0CTRL0_DIV_SEL_LOWER		(0x1 << 20)
+#define	CLKCTRL_PLL0CTRL0_DIV_SEL_LOWEST	(0x2 << 20)
+#define	CLKCTRL_PLL0CTRL0_DIV_SEL_UNDEFINED	(0x3 << 20)
+#define	CLKCTRL_PLL0CTRL0_EN_USB_CLKS		(1 << 18)
+#define	CLKCTRL_PLL0CTRL0_POWER			(1 << 16)
+
+#define	CLKCTRL_PLL0CTRL1_LOCK			(1 << 31)
+#define	CLKCTRL_PLL0CTRL1_FORCE_LOCK		(1 << 30)
+#define	CLKCTRL_PLL0CTRL1_LOCK_COUNT_MASK	0xffff
+#define	CLKCTRL_PLL0CTRL1_LOCK_COUNT_OFFSET	0
+
+#define	CLKCTRL_CPU_BUSY_REF_XTAL		(1 << 29)
+#define	CLKCTRL_CPU_BUSY_REF_CPU		(1 << 28)
+#define	CLKCTRL_CPU_DIV_XTAL_FRAC_EN		(1 << 26)
+#define	CLKCTRL_CPU_DIV_XTAL_MASK		(0x3ff << 16)
+#define	CLKCTRL_CPU_DIV_XTAL_OFFSET		16
+#define	CLKCTRL_CPU_INTERRUPT_WAIT		(1 << 12)
+#define	CLKCTRL_CPU_DIV_CPU_FRAC_EN		(1 << 10)
+#define	CLKCTRL_CPU_DIV_CPU_MASK		0x3f
+#define	CLKCTRL_CPU_DIV_CPU_OFFSET		0
+
+#define	CLKCTRL_HBUS_BUSY			(1 << 29)
+#define	CLKCTRL_HBUS_DCP_AS_ENABLE		(1 << 28)
+#define	CLKCTRL_HBUS_PXP_AS_ENABLE		(1 << 27)
+#define	CLKCTRL_HBUS_APBHDMA_AS_ENABLE		(1 << 26)
+#define	CLKCTRL_HBUS_APBXDMA_AS_ENABLE		(1 << 25)
+#define	CLKCTRL_HBUS_TRAFFIC_JAM_AS_ENABLE	(1 << 24)
+#define	CLKCTRL_HBUS_TRAFFIC_AS_ENABLE		(1 << 23)
+#define	CLKCTRL_HBUS_CPU_DATA_AS_ENABLE		(1 << 22)
+#define	CLKCTRL_HBUS_CPU_INSTR_AS_ENABLE	(1 << 21)
+#define	CLKCTRL_HBUS_AUTO_SLOW_MODE		(1 << 20)
+#define	CLKCTRL_HBUS_SLOW_DIV_MASK		(0x7 << 16)
+#define	CLKCTRL_HBUS_SLOW_DIV_OFFSET		16
+#define	CLKCTRL_HBUS_SLOW_DIV_BY1		(0x0 << 16)
+#define	CLKCTRL_HBUS_SLOW_DIV_BY2		(0x1 << 16)
+#define	CLKCTRL_HBUS_SLOW_DIV_BY4		(0x2 << 16)
+#define	CLKCTRL_HBUS_SLOW_DIV_BY8		(0x3 << 16)
+#define	CLKCTRL_HBUS_SLOW_DIV_BY16		(0x4 << 16)
+#define	CLKCTRL_HBUS_SLOW_DIV_BY32		(0x5 << 16)
+#define	CLKCTRL_HBUS_DIV_FRAC_EN		(1 << 5)
+#define	CLKCTRL_HBUS_DIV_MASK			0x1f
+#define	CLKCTRL_HBUS_DIV_OFFSET			0
+
+#define	CLKCTRL_XBUS_BUSY			(1 << 31)
+#define	CLKCTRL_XBUS_DIV_FRAC_EN		(1 << 10)
+#define	CLKCTRL_XBUS_DIV_MASK			0x3ff
+#define	CLKCTRL_XBUS_DIV_OFFSET			0
+
+#define	CLKCTRL_XTAL_UART_CLK_GATE		(1 << 31)
+#define	CLKCTRL_XTAL_FILT_CLK24M_GATE		(1 << 30)
+#define	CLKCTRL_XTAL_PWM_CLK24M_GATE		(1 << 29)
+#define	CLKCTRL_XTAL_DRI_CLK24M_GATE		(1 << 28)
+#define	CLKCTRL_XTAL_DIGCTRL_CLK1M_GATE		(1 << 27)
+#define	CLKCTRL_XTAL_TIMROT_CLK32K_GATE		(1 << 26)
+#define	CLKCTRL_XTAL_DIV_UART_MASK		0x3
+#define	CLKCTRL_XTAL_DIV_UART_OFFSET		0
+
+#define	CLKCTRL_PIX_CLKGATE			(1 << 31)
+#define	CLKCTRL_PIX_BUSY			(1 << 29)
+#define	CLKCTRL_PIX_DIV_FRAC_EN			(1 << 12)
+#define	CLKCTRL_PIX_DIV_MASK			0xfff
+#define	CLKCTRL_PIX_DIV_OFFSET			0
+
+#define	CLKCTRL_SSP_CLKGATE			(1 << 31)
+#define	CLKCTRL_SSP_BUSY			(1 << 29)
+#define	CLKCTRL_SSP_DIV_FRAC_EN			(1 << 9)
+#define	CLKCTRL_SSP_DIV_MASK			0x1ff
+#define	CLKCTRL_SSP_DIV_OFFSET			0
+
+#define	CLKCTRL_GPMI_CLKGATE			(1 << 31)
+#define	CLKCTRL_GPMI_BUSY			(1 << 29)
+#define	CLKCTRL_GPMI_DIV_FRAC_EN		(1 << 10)
+#define	CLKCTRL_GPMI_DIV_MASK			0x3ff
+#define	CLKCTRL_GPMI_DIV_OFFSET			0
+
+#define	CLKCTRL_SPDIF_CLKGATE			(1 << 31)
+
+#define	CLKCTRL_EMI_CLKGATE			(1 << 31)
+#define	CLKCTRL_EMI_SYNC_MODE_EN		(1 << 30)
+#define	CLKCTRL_EMI_BUSY_REF_XTAL		(1 << 29)
+#define	CLKCTRL_EMI_BUSY_REF_EMI		(1 << 28)
+#define	CLKCTRL_EMI_BUSY_REF_CPU		(1 << 27)
+#define	CLKCTRL_EMI_BUSY_SYNC_MODE		(1 << 26)
+#define	CLKCTRL_EMI_BUSY_DCC_RESYNC		(1 << 17)
+#define	CLKCTRL_EMI_DCC_RESYNC_ENABLE		(1 << 16)
+#define	CLKCTRL_EMI_DIV_XTAL_MASK		(0xf << 8)
+#define	CLKCTRL_EMI_DIV_XTAL_OFFSET		8
+#define	CLKCTRL_EMI_DIV_EMI_MASK		0x3f
+#define	CLKCTRL_EMI_DIV_EMI_OFFSET		0
+
+#define	CLKCTRL_IR_CLKGATE			(1 << 31)
+#define	CLKCTRL_IR_AUTO_DIV			(1 << 29)
+#define	CLKCTRL_IR_IR_BUSY			(1 << 28)
+#define	CLKCTRL_IR_IROV_BUSY			(1 << 27)
+#define	CLKCTRL_IR_IROV_DIV_MASK		(0x1ff << 16)
+#define	CLKCTRL_IR_IROV_DIV_OFFSET		16
+#define	CLKCTRL_IR_IR_DIV_MASK			0x3ff
+#define	CLKCTRL_IR_IR_DIV_OFFSET		0
+
+#define	CLKCTRL_SAIF0_CLKGATE			(1 << 31)
+#define	CLKCTRL_SAIF0_BUSY			(1 << 29)
+#define	CLKCTRL_SAIF0_DIV_FRAC_EN		(1 << 16)
+#define	CLKCTRL_SAIF0_DIV_MASK			0xffff
+#define	CLKCTRL_SAIF0_DIV_OFFSET		0
+
+#define	CLKCTRL_TV_CLK_TV108M_GATE		(1 << 31)
+#define	CLKCTRL_TV_CLK_TV_GATE			(1 << 30)
+
+#define	CLKCTRL_ETM_CLKGATE			(1 << 31)
+#define	CLKCTRL_ETM_BUSY			(1 << 29)
+#define	CLKCTRL_ETM_DIV_FRAC_EN			(1 << 6)
+#define	CLKCTRL_ETM_DIV_MASK			0x3f
+#define	CLKCTRL_ETM_DIV_OFFSET			0
+
+#define	CLKCTRL_FRAC_CLKGATE			(1 << 7)
+#define	CLKCTRL_FRAC_STABLE			(1 << 6)
+#define	CLKCTRL_FRAC_FRAC_MASK			0x3f
+#define	CLKCTRL_FRAC_FRAC_OFFSET		0
+#define	CLKCTRL_FRAC0_CPU			0
+#define	CLKCTRL_FRAC0_EMI			1
+#define	CLKCTRL_FRAC0_PIX			2
+#define	CLKCTRL_FRAC0_IO0			3
+#define	CLKCTRL_FRAC1_VID			3
+
+#define	CLKCTRL_CLKSEQ_BYPASS_ETM		(1 << 8)
+#define	CLKCTRL_CLKSEQ_BYPASS_CPU		(1 << 7)
+#define	CLKCTRL_CLKSEQ_BYPASS_EMI		(1 << 6)
+#define	CLKCTRL_CLKSEQ_BYPASS_SSP0		(1 << 5)
+#define	CLKCTRL_CLKSEQ_BYPASS_GPMI		(1 << 4)
+#define	CLKCTRL_CLKSEQ_BYPASS_IR		(1 << 3)
+#define	CLKCTRL_CLKSEQ_BYPASS_PIX		(1 << 1)
+#define	CLKCTRL_CLKSEQ_BYPASS_SAIF		(1 << 0)
+
+#define	CLKCTRL_RESET_CHIP			(1 << 1)
+#define	CLKCTRL_RESET_DIG			(1 << 0)
+
+#define	CLKCTRL_STATUS_CPU_LIMIT_MASK		(0x3 << 30)
+#define	CLKCTRL_STATUS_CPU_LIMIT_OFFSET		30
+
+#define	CLKCTRL_VERSION_MAJOR_MASK		(0xff << 24)
+#define	CLKCTRL_VERSION_MAJOR_OFFSET		24
+#define	CLKCTRL_VERSION_MINOR_MASK		(0xff << 16)
+#define	CLKCTRL_VERSION_MINOR_OFFSET		16
+#define	CLKCTRL_VERSION_STEP_MASK		0xffff
+#define	CLKCTRL_VERSION_STEP_OFFSET		0
+
+#endif /* __MX23_REGS_CLKCTRL_H__ */
diff --git a/arch/arm/include/asm/arch-mxs/regs-power-mx23.h b/arch/arm/include/asm/arch-mxs/regs-power-mx23.h
new file mode 100644
index 0000000..51a981a
--- /dev/null
+++ b/arch/arm/include/asm/arch-mxs/regs-power-mx23.h
@@ -0,0 +1,358 @@
+/*
+ * Freescale i.MX23 Power Controller Register Definitions
+ *
+ * Copyright (C) 2012 Marek Vasut <marex@denx.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ *
+ */
+
+#ifndef __MX23_REGS_POWER_H__
+#define __MX23_REGS_POWER_H__
+
+#include <asm/arch/regs-common.h>
+
+#ifndef	__ASSEMBLY__
+struct mxs_power_regs {
+	mxs_reg_32(hw_power_ctrl)
+	mxs_reg_32(hw_power_5vctrl)
+	mxs_reg_32(hw_power_minpwr)
+	mxs_reg_32(hw_power_charge)
+	uint32_t	hw_power_vdddctrl;
+	uint32_t	reserved_vddd[3];
+	uint32_t	hw_power_vddactrl;
+	uint32_t	reserved_vdda[3];
+	uint32_t	hw_power_vddioctrl;
+	uint32_t	reserved_vddio[3];
+	uint32_t	hw_power_vddmemctrl;
+	uint32_t	reserved_vddmem[3];
+	uint32_t	hw_power_dcdc4p2;
+	uint32_t	reserved_dcdc4p2[3];
+	uint32_t	hw_power_misc;
+	uint32_t	reserved_misc[3];
+	uint32_t	hw_power_dclimits;
+	uint32_t	reserved_dclimits[3];
+	mxs_reg_32(hw_power_loopctrl)
+	uint32_t	hw_power_sts;
+	uint32_t	reserved_sts[3];
+	mxs_reg_32(hw_power_speed)
+	uint32_t	hw_power_battmonitor;
+	uint32_t	reserved_battmonitor[3];
+
+	uint32_t	reserved1[4];
+
+	mxs_reg_32(hw_power_reset)
+
+	uint32_t	reserved2[4];
+
+	mxs_reg_32(hw_power_special)
+	mxs_reg_32(hw_power_version)
+};
+#endif
+
+#define	POWER_CTRL_CLKGATE				(1 << 30)
+#define	POWER_CTRL_PSWITCH_MID_TRAN			(1 << 27)
+#define	POWER_CTRL_DCDC4P2_BO_IRQ			(1 << 24)
+#define	POWER_CTRL_ENIRQ_DCDC4P2_BO			(1 << 23)
+#define	POWER_CTRL_VDD5V_DROOP_IRQ			(1 << 22)
+#define	POWER_CTRL_ENIRQ_VDD5V_DROOP			(1 << 21)
+#define	POWER_CTRL_PSWITCH_IRQ				(1 << 20)
+#define	POWER_CTRL_PSWITCH_IRQ_SRC			(1 << 19)
+#define	POWER_CTRL_POLARITY_PSWITCH			(1 << 18)
+#define	POWER_CTRL_ENIRQ_PSWITCH			(1 << 17)
+#define	POWER_CTRL_POLARITY_DC_OK			(1 << 16)
+#define	POWER_CTRL_DC_OK_IRQ				(1 << 15)
+#define	POWER_CTRL_ENIRQ_DC_OK				(1 << 14)
+#define	POWER_CTRL_BATT_BO_IRQ				(1 << 13)
+#define	POWER_CTRL_ENIRQ_BATT_BO			(1 << 12)
+#define	POWER_CTRL_VDDIO_BO_IRQ				(1 << 11)
+#define	POWER_CTRL_ENIRQ_VDDIO_BO			(1 << 10)
+#define	POWER_CTRL_VDDA_BO_IRQ				(1 << 9)
+#define	POWER_CTRL_ENIRQ_VDDA_BO			(1 << 8)
+#define	POWER_CTRL_VDDD_BO_IRQ				(1 << 7)
+#define	POWER_CTRL_ENIRQ_VDDD_BO			(1 << 6)
+#define	POWER_CTRL_POLARITY_VBUSVALID			(1 << 5)
+#define	POWER_CTRL_VBUS_VALID_IRQ			(1 << 4)
+#define	POWER_CTRL_ENIRQ_VBUS_VALID			(1 << 3)
+#define	POWER_CTRL_POLARITY_VDD5V_GT_VDDIO		(1 << 2)
+#define	POWER_CTRL_VDD5V_GT_VDDIO_IRQ			(1 << 1)
+#define	POWER_CTRL_ENIRQ_VDD5V_GT_VDDIO			(1 << 0)
+
+#define	POWER_5VCTRL_VBUSDROOP_TRSH_MASK		(0x3 << 28)
+#define	POWER_5VCTRL_VBUSDROOP_TRSH_OFFSET		28
+#define	POWER_5VCTRL_VBUSDROOP_TRSH_4V3			(0x0 << 28)
+#define	POWER_5VCTRL_VBUSDROOP_TRSH_4V4			(0x1 << 28)
+#define	POWER_5VCTRL_VBUSDROOP_TRSH_4V5			(0x2 << 28)
+#define	POWER_5VCTRL_VBUSDROOP_TRSH_4V7			(0x3 << 28)
+#define	POWER_5VCTRL_HEADROOM_ADJ_MASK			(0x7 << 24)
+#define	POWER_5VCTRL_HEADROOM_ADJ_OFFSET		24
+#define	POWER_5VCTRL_PWD_CHARGE_4P2_MASK		(0x1 << 20)
+#define	POWER_5VCTRL_PWD_CHARGE_4P2_OFFSET		20
+#define	POWER_5VCTRL_CHARGE_4P2_ILIMIT_MASK		(0x3f << 12)
+#define	POWER_5VCTRL_CHARGE_4P2_ILIMIT_OFFSET		12
+#define	POWER_5VCTRL_VBUSVALID_TRSH_MASK		(0x7 << 8)
+#define	POWER_5VCTRL_VBUSVALID_TRSH_OFFSET		8
+#define	POWER_5VCTRL_VBUSVALID_TRSH_2V9			(0x0 << 8)
+#define	POWER_5VCTRL_VBUSVALID_TRSH_4V0			(0x1 << 8)
+#define	POWER_5VCTRL_VBUSVALID_TRSH_4V1			(0x2 << 8)
+#define	POWER_5VCTRL_VBUSVALID_TRSH_4V2			(0x3 << 8)
+#define	POWER_5VCTRL_VBUSVALID_TRSH_4V3			(0x4 << 8)
+#define	POWER_5VCTRL_VBUSVALID_TRSH_4V4			(0x5 << 8)
+#define	POWER_5VCTRL_VBUSVALID_TRSH_4V5			(0x6 << 8)
+#define	POWER_5VCTRL_VBUSVALID_TRSH_4V6			(0x7 << 8)
+#define	POWER_5VCTRL_PWDN_5VBRNOUT			(1 << 7)
+#define	POWER_5VCTRL_ENABLE_LINREG_ILIMIT		(1 << 6)
+#define	POWER_5VCTRL_DCDC_XFER				(1 << 5)
+#define	POWER_5VCTRL_VBUSVALID_5VDETECT			(1 << 4)
+#define	POWER_5VCTRL_VBUSVALID_TO_B			(1 << 3)
+#define	POWER_5VCTRL_ILIMIT_EQ_ZERO			(1 << 2)
+#define	POWER_5VCTRL_PWRUP_VBUS_CMPS			(1 << 1)
+#define	POWER_5VCTRL_ENABLE_DCDC			(1 << 0)
+
+#define	POWER_MINPWR_LOWPWR_4P2				(1 << 14)
+#define	POWER_MINPWR_VDAC_DUMP_CTRL			(1 << 13)
+#define	POWER_MINPWR_PWD_BO				(1 << 12)
+#define	POWER_MINPWR_USE_VDDXTAL_VBG			(1 << 11)
+#define	POWER_MINPWR_PWD_ANA_CMPS			(1 << 10)
+#define	POWER_MINPWR_ENABLE_OSC				(1 << 9)
+#define	POWER_MINPWR_SELECT_OSC				(1 << 8)
+#define	POWER_MINPWR_VBG_OFF				(1 << 7)
+#define	POWER_MINPWR_DOUBLE_FETS			(1 << 6)
+#define	POWER_MINPWR_HALFFETS				(1 << 5)
+#define	POWER_MINPWR_LESSANA_I				(1 << 4)
+#define	POWER_MINPWR_PWD_XTAL24				(1 << 3)
+#define	POWER_MINPWR_DC_STOPCLK				(1 << 2)
+#define	POWER_MINPWR_EN_DC_PFM				(1 << 1)
+#define	POWER_MINPWR_DC_HALFCLK				(1 << 0)
+
+#define	POWER_CHARGE_ADJ_VOLT_MASK			(0x7 << 24)
+#define	POWER_CHARGE_ADJ_VOLT_OFFSET			24
+#define	POWER_CHARGE_ADJ_VOLT_M025P			(0x1 << 24)
+#define	POWER_CHARGE_ADJ_VOLT_P050P			(0x2 << 24)
+#define	POWER_CHARGE_ADJ_VOLT_M075P			(0x3 << 24)
+#define	POWER_CHARGE_ADJ_VOLT_P025P			(0x4 << 24)
+#define	POWER_CHARGE_ADJ_VOLT_M050P			(0x5 << 24)
+#define	POWER_CHARGE_ADJ_VOLT_P075P			(0x6 << 24)
+#define	POWER_CHARGE_ADJ_VOLT_M100P			(0x7 << 24)
+#define	POWER_CHARGE_ENABLE_LOAD			(1 << 22)
+#define	POWER_CHARGE_ENABLE_CHARGER_RESISTORS		(1 << 21)
+#define	POWER_CHARGE_ENABLE_FAULT_DETECT		(1 << 20)
+#define	POWER_CHARGE_CHRG_STS_OFF			(1 << 19)
+#define	POWER_CHARGE_USE_EXTERN_R			(1 << 17)
+#define	POWER_CHARGE_PWD_BATTCHRG			(1 << 16)
+#define	POWER_CHARGE_STOP_ILIMIT_MASK			(0xf << 8)
+#define	POWER_CHARGE_STOP_ILIMIT_OFFSET			8
+#define	POWER_CHARGE_STOP_ILIMIT_10MA			(0x1 << 8)
+#define	POWER_CHARGE_STOP_ILIMIT_20MA			(0x2 << 8)
+#define	POWER_CHARGE_STOP_ILIMIT_50MA			(0x4 << 8)
+#define	POWER_CHARGE_STOP_ILIMIT_100MA			(0x8 << 8)
+#define	POWER_CHARGE_BATTCHRG_I_MASK			0x3f
+#define	POWER_CHARGE_BATTCHRG_I_OFFSET			0
+#define	POWER_CHARGE_BATTCHRG_I_10MA			0x01
+#define	POWER_CHARGE_BATTCHRG_I_20MA			0x02
+#define	POWER_CHARGE_BATTCHRG_I_50MA			0x04
+#define	POWER_CHARGE_BATTCHRG_I_100MA			0x08
+#define	POWER_CHARGE_BATTCHRG_I_200MA			0x10
+#define	POWER_CHARGE_BATTCHRG_I_400MA			0x20
+
+#define	POWER_VDDDCTRL_ADJTN_MASK			(0xf << 28)
+#define	POWER_VDDDCTRL_ADJTN_OFFSET			28
+#define	POWER_VDDDCTRL_PWDN_BRNOUT			(1 << 23)
+#define	POWER_VDDDCTRL_DISABLE_STEPPING			(1 << 22)
+#define	POWER_VDDDCTRL_ENABLE_LINREG			(1 << 21)
+#define	POWER_VDDDCTRL_DISABLE_FET			(1 << 20)
+#define	POWER_VDDDCTRL_LINREG_OFFSET_MASK		(0x3 << 16)
+#define	POWER_VDDDCTRL_LINREG_OFFSET_OFFSET		16
+#define	POWER_VDDDCTRL_LINREG_OFFSET_0STEPS		(0x0 << 16)
+#define	POWER_VDDDCTRL_LINREG_OFFSET_1STEPS_ABOVE	(0x1 << 16)
+#define	POWER_VDDDCTRL_LINREG_OFFSET_1STEPS_BELOW	(0x2 << 16)
+#define	POWER_VDDDCTRL_LINREG_OFFSET_2STEPS_BELOW	(0x3 << 16)
+#define	POWER_VDDDCTRL_BO_OFFSET_MASK			(0x7 << 8)
+#define	POWER_VDDDCTRL_BO_OFFSET_OFFSET			8
+#define	POWER_VDDDCTRL_TRG_MASK				0x1f
+#define	POWER_VDDDCTRL_TRG_OFFSET			0
+
+#define	POWER_VDDACTRL_PWDN_BRNOUT			(1 << 19)
+#define	POWER_VDDACTRL_DISABLE_STEPPING			(1 << 18)
+#define	POWER_VDDACTRL_ENABLE_LINREG			(1 << 17)
+#define	POWER_VDDACTRL_DISABLE_FET			(1 << 16)
+#define	POWER_VDDACTRL_LINREG_OFFSET_MASK		(0x3 << 12)
+#define	POWER_VDDACTRL_LINREG_OFFSET_OFFSET		12
+#define	POWER_VDDACTRL_LINREG_OFFSET_0STEPS		(0x0 << 12)
+#define	POWER_VDDACTRL_LINREG_OFFSET_1STEPS_ABOVE	(0x1 << 12)
+#define	POWER_VDDACTRL_LINREG_OFFSET_1STEPS_BELOW	(0x2 << 12)
+#define	POWER_VDDACTRL_LINREG_OFFSET_2STEPS_BELOW	(0x3 << 12)
+#define	POWER_VDDACTRL_BO_OFFSET_MASK			(0x7 << 8)
+#define	POWER_VDDACTRL_BO_OFFSET_OFFSET			8
+#define	POWER_VDDACTRL_TRG_MASK				0x1f
+#define	POWER_VDDACTRL_TRG_OFFSET			0
+
+#define	POWER_VDDIOCTRL_ADJTN_MASK			(0xf << 20)
+#define	POWER_VDDIOCTRL_ADJTN_OFFSET			20
+#define	POWER_VDDIOCTRL_PWDN_BRNOUT			(1 << 18)
+#define	POWER_VDDIOCTRL_DISABLE_STEPPING		(1 << 17)
+#define	POWER_VDDIOCTRL_DISABLE_FET			(1 << 16)
+#define	POWER_VDDIOCTRL_LINREG_OFFSET_MASK		(0x3 << 12)
+#define	POWER_VDDIOCTRL_LINREG_OFFSET_OFFSET		12
+#define	POWER_VDDIOCTRL_LINREG_OFFSET_0STEPS		(0x0 << 12)
+#define	POWER_VDDIOCTRL_LINREG_OFFSET_1STEPS_ABOVE	(0x1 << 12)
+#define	POWER_VDDIOCTRL_LINREG_OFFSET_1STEPS_BELOW	(0x2 << 12)
+#define	POWER_VDDIOCTRL_LINREG_OFFSET_2STEPS_BELOW	(0x3 << 12)
+#define	POWER_VDDIOCTRL_BO_OFFSET_MASK			(0x7 << 8)
+#define	POWER_VDDIOCTRL_BO_OFFSET_OFFSET		8
+#define	POWER_VDDIOCTRL_TRG_MASK			0x1f
+#define	POWER_VDDIOCTRL_TRG_OFFSET			0
+
+#define	POWER_VDDMEMCTRL_PULLDOWN_ACTIVE		(1 << 10)
+#define	POWER_VDDMEMCTRL_ENABLE_ILIMIT			(1 << 9)
+#define	POWER_VDDMEMCTRL_ENABLE_LINREG			(1 << 8)
+#define	POWER_VDDMEMCTRL_TRG_MASK			0x1f
+#define	POWER_VDDMEMCTRL_TRG_OFFSET			0
+
+#define	POWER_DCDC4P2_DROPOUT_CTRL_MASK			(0xf << 28)
+#define	POWER_DCDC4P2_DROPOUT_CTRL_OFFSET		28
+#define	POWER_DCDC4P2_DROPOUT_CTRL_200MV		(0x3 << 30)
+#define	POWER_DCDC4P2_DROPOUT_CTRL_100MV		(0x2 << 30)
+#define	POWER_DCDC4P2_DROPOUT_CTRL_50MV			(0x1 << 30)
+#define	POWER_DCDC4P2_DROPOUT_CTRL_25MV			(0x0 << 30)
+#define	POWER_DCDC4P2_DROPOUT_CTRL_SRC_4P2		(0x0 << 28)
+#define	POWER_DCDC4P2_DROPOUT_CTRL_SRC_4P2_LT_BATT	(0x1 << 28)
+#define	POWER_DCDC4P2_DROPOUT_CTRL_SRC_SEL		(0x2 << 28)
+#define	POWER_DCDC4P2_ISTEAL_THRESH_MASK		(0x3 << 24)
+#define	POWER_DCDC4P2_ISTEAL_THRESH_OFFSET		24
+#define	POWER_DCDC4P2_ENABLE_4P2			(1 << 23)
+#define	POWER_DCDC4P2_ENABLE_DCDC			(1 << 22)
+#define	POWER_DCDC4P2_HYST_DIR				(1 << 21)
+#define	POWER_DCDC4P2_HYST_THRESH			(1 << 20)
+#define	POWER_DCDC4P2_TRG_MASK				(0x7 << 16)
+#define	POWER_DCDC4P2_TRG_OFFSET			16
+#define	POWER_DCDC4P2_TRG_4V2				(0x0 << 16)
+#define	POWER_DCDC4P2_TRG_4V1				(0x1 << 16)
+#define	POWER_DCDC4P2_TRG_4V0				(0x2 << 16)
+#define	POWER_DCDC4P2_TRG_3V9				(0x3 << 16)
+#define	POWER_DCDC4P2_TRG_BATT				(0x4 << 16)
+#define	POWER_DCDC4P2_BO_MASK				(0x1f << 8)
+#define	POWER_DCDC4P2_BO_OFFSET				8
+#define	POWER_DCDC4P2_CMPTRIP_MASK			0x1f
+#define	POWER_DCDC4P2_CMPTRIP_OFFSET			0
+
+#define	POWER_MISC_FREQSEL_MASK				(0x7 << 4)
+#define	POWER_MISC_FREQSEL_OFFSET			4
+#define	POWER_MISC_FREQSEL_20MHZ			(0x1 << 4)
+#define	POWER_MISC_FREQSEL_24MHZ			(0x2 << 4)
+#define	POWER_MISC_FREQSEL_19MHZ			(0x3 << 4)
+#define	POWER_MISC_FREQSEL_14MHZ			(0x4 << 4)
+#define	POWER_MISC_FREQSEL_18MHZ			(0x5 << 4)
+#define	POWER_MISC_FREQSEL_21MHZ			(0x6 << 4)
+#define	POWER_MISC_FREQSEL_17MHZ			(0x7 << 4)
+#define	POWER_MISC_DISABLE_FET_BO_LOGIC			(1 << 3)
+#define	POWER_MISC_DELAY_TIMING				(1 << 2)
+#define	POWER_MISC_TEST					(1 << 1)
+#define	POWER_MISC_SEL_PLLCLK				(1 << 0)
+
+#define	POWER_DCLIMITS_POSLIMIT_BUCK_MASK		(0x7f << 8)
+#define	POWER_DCLIMITS_POSLIMIT_BUCK_OFFSET		8
+#define	POWER_DCLIMITS_NEGLIMIT_MASK			0x7f
+#define	POWER_DCLIMITS_NEGLIMIT_OFFSET			0
+
+#define	POWER_LOOPCTRL_TOGGLE_DIF			(1 << 20)
+#define	POWER_LOOPCTRL_HYST_SIGN			(1 << 19)
+#define	POWER_LOOPCTRL_EN_CM_HYST			(1 << 18)
+#define	POWER_LOOPCTRL_EN_DF_HYST			(1 << 17)
+#define	POWER_LOOPCTRL_CM_HYST_THRESH			(1 << 16)
+#define	POWER_LOOPCTRL_DF_HYST_THRESH			(1 << 15)
+#define	POWER_LOOPCTRL_RCSCALE_THRESH			(1 << 14)
+#define	POWER_LOOPCTRL_EN_RCSCALE_MASK			(0x3 << 12)
+#define	POWER_LOOPCTRL_EN_RCSCALE_OFFSET		12
+#define	POWER_LOOPCTRL_EN_RCSCALE_DIS			(0x0 << 12)
+#define	POWER_LOOPCTRL_EN_RCSCALE_2X			(0x1 << 12)
+#define	POWER_LOOPCTRL_EN_RCSCALE_4X			(0x2 << 12)
+#define	POWER_LOOPCTRL_EN_RCSCALE_8X			(0x3 << 12)
+#define	POWER_LOOPCTRL_DC_FF_MASK			(0x7 << 8)
+#define	POWER_LOOPCTRL_DC_FF_OFFSET			8
+#define	POWER_LOOPCTRL_DC_R_MASK			(0xf << 4)
+#define	POWER_LOOPCTRL_DC_R_OFFSET			4
+#define	POWER_LOOPCTRL_DC_C_MASK			0x3
+#define	POWER_LOOPCTRL_DC_C_OFFSET			0
+#define	POWER_LOOPCTRL_DC_C_MAX				0x0
+#define	POWER_LOOPCTRL_DC_C_2X				0x1
+#define	POWER_LOOPCTRL_DC_C_4X				0x2
+#define	POWER_LOOPCTRL_DC_C_MIN				0x3
+
+#define	POWER_STS_PWRUP_SOURCE_MASK			(0x3f << 24)
+#define	POWER_STS_PWRUP_SOURCE_OFFSET			24
+#define	POWER_STS_PWRUP_SOURCE_5V			(0x20 << 24)
+#define	POWER_STS_PWRUP_SOURCE_RTC			(0x10 << 24)
+#define	POWER_STS_PWRUP_SOURCE_PSWITCH_HIGH		(0x02 << 24)
+#define	POWER_STS_PWRUP_SOURCE_PSWITCH_MID		(0x01 << 24)
+#define	POWER_STS_PSWITCH_MASK				(0x3 << 20)
+#define	POWER_STS_PSWITCH_OFFSET			20
+#define	POWER_STS_AVALID0_STATUS			(1 << 17)
+#define	POWER_STS_BVALID0_STATUS			(1 << 16)
+#define	POWER_STS_VBUSVALID0_STATUS			(1 << 15)
+#define	POWER_STS_SESSEND0_STATUS			(1 << 14)
+#define	POWER_STS_BATT_BO				(1 << 13)
+#define	POWER_STS_VDD5V_FAULT				(1 << 12)
+#define	POWER_STS_CHRGSTS				(1 << 11)
+#define	POWER_STS_DCDC_4P2_BO				(1 << 10)
+#define	POWER_STS_DC_OK					(1 << 9)
+#define	POWER_STS_VDDIO_BO				(1 << 8)
+#define	POWER_STS_VDDA_BO				(1 << 7)
+#define	POWER_STS_VDDD_BO				(1 << 6)
+#define	POWER_STS_VDD5V_GT_VDDIO			(1 << 5)
+#define	POWER_STS_VDD5V_DROOP				(1 << 4)
+#define	POWER_STS_AVALID0				(1 << 3)
+#define	POWER_STS_BVALID0				(1 << 2)
+#define	POWER_STS_VBUSVALID0				(1 << 1)
+#define	POWER_STS_SESSEND0				(1 << 0)
+
+#define	POWER_SPEED_STATUS_MASK				(0xff << 16)
+#define	POWER_SPEED_STATUS_OFFSET			16
+#define	POWER_SPEED_CTRL_MASK				0x3
+#define	POWER_SPEED_CTRL_OFFSET				0
+#define	POWER_SPEED_CTRL_SS_OFF				0x0
+#define	POWER_SPEED_CTRL_SS_ON				0x1
+#define	POWER_SPEED_CTRL_SS_ENABLE			0x3
+
+#define	POWER_BATTMONITOR_BATT_VAL_MASK			(0x3ff << 16)
+#define	POWER_BATTMONITOR_BATT_VAL_OFFSET		16
+#define	POWER_BATTMONITOR_EN_BATADJ			(1 << 10)
+#define	POWER_BATTMONITOR_PWDN_BATTBRNOUT		(1 << 9)
+#define	POWER_BATTMONITOR_BRWNOUT_PWD			(1 << 8)
+#define	POWER_BATTMONITOR_BRWNOUT_LVL_MASK		0x1f
+#define	POWER_BATTMONITOR_BRWNOUT_LVL_OFFSET		0
+
+#define	POWER_RESET_UNLOCK_MASK				(0xffff << 16)
+#define	POWER_RESET_UNLOCK_OFFSET			16
+#define	POWER_RESET_UNLOCK_KEY				(0x3e77 << 16)
+#define	POWER_RESET_PWD_OFF				(1 << 1)
+#define	POWER_RESET_PWD					(1 << 0)
+
+#define	POWER_DEBUG_VBUSVALIDPIOLOCK			(1 << 3)
+#define	POWER_DEBUG_AVALIDPIOLOCK			(1 << 2)
+#define	POWER_DEBUG_BVALIDPIOLOCK			(1 << 1)
+#define	POWER_DEBUG_SESSENDPIOLOCK			(1 << 0)
+
+#define	POWER_SPECIAL_TEST_MASK				0xffffffff
+#define	POWER_SPECIAL_TEST_OFFSET			0
+
+#define	POWER_VERSION_MAJOR_MASK			(0xff << 24)
+#define	POWER_VERSION_MAJOR_OFFSET			24
+#define	POWER_VERSION_MINOR_MASK			(0xff << 16)
+#define	POWER_VERSION_MINOR_OFFSET			16
+#define	POWER_VERSION_STEP_MASK				0xffff
+#define	POWER_VERSION_STEP_OFFSET			0
+
+#endif	/* __MX23_REGS_POWER_H__ */
-- 
1.7.10.4

[U-Boot] [PATCH 07/18] mx23: ssp: Fix ssp-regs.h for MX23

[Marek Vasut]

Disable SSP2 and SSP3 ports on MX23.

Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
---
 arch/arm/include/asm/arch-mxs/regs-ssp.h |    2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/include/asm/arch-mxs/regs-ssp.h b/arch/arm/include/asm/arch-mxs/regs-ssp.h
index 4a75029..b97ac35 100644
--- a/arch/arm/include/asm/arch-mxs/regs-ssp.h
+++ b/arch/arm/include/asm/arch-mxs/regs-ssp.h
@@ -58,10 +58,12 @@ static inline struct mxs_ssp_regs *mxs_ssp_regs_by_bus(unsigned int port)
 		return (struct mxs_ssp_regs *)MXS_SSP0_BASE;
 	case 1:
 		return (struct mxs_ssp_regs *)MXS_SSP1_BASE;
+#ifdef CONFIG_MX28
 	case 2:
 		return (struct mxs_ssp_regs *)MXS_SSP2_BASE;
 	case 3:
 		return (struct mxs_ssp_regs *)MXS_SSP3_BASE;
+#endif
 	default:
 		return NULL;
 	}
-- 
1.7.10.4

[U-Boot] [PATCH 08/18] mx23: Add support on print_cpuinfo()

[Marek Vasut]

From: Otavio Salvador <otavio@ossystems.com.br>

Add information to identify i.MX23 chips and its known revisions.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
---
 arch/arm/cpu/arm926ejs/mxs/mxs.c            |   19 ++++++++++++++++++-
 arch/arm/include/asm/arch-mxs/regs-digctl.h |    1 +
 2 files changed, 19 insertions(+), 1 deletion(-)

diff --git a/arch/arm/cpu/arm926ejs/mxs/mxs.c b/arch/arm/cpu/arm926ejs/mxs/mxs.c
index 6ce8019..a748623 100644
--- a/arch/arm/cpu/arm926ejs/mxs/mxs.c
+++ b/arch/arm/cpu/arm926ejs/mxs/mxs.c
@@ -1,5 +1,5 @@
 /*
- * Freescale i.MX28 common code
+ * Freescale i.MX23/i.MX28 common code
  *
  * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
  * on behalf of DENX Software Engineering GmbH
@@ -196,6 +196,8 @@ static const char *get_cpu_type(void)
 		(struct mxs_digctl_regs *)MXS_DIGCTL_BASE;
 
 	switch (readl(&digctl_regs->hw_digctl_chipid) & HW_DIGCTL_CHIPID_MASK) {
+	case HW_DIGCTL_CHIPID_MX23:
+		return "23";
 	case HW_DIGCTL_CHIPID_MX28:
 		return "28";
 	default:
@@ -210,6 +212,21 @@ static const char *get_cpu_rev(void)
 	uint8_t rev = readl(&digctl_regs->hw_digctl_chipid) & 0x000000FF;
 
 	switch (readl(&digctl_regs->hw_digctl_chipid) & HW_DIGCTL_CHIPID_MASK) {
+	case HW_DIGCTL_CHIPID_MX23:
+		switch (rev) {
+		case 0x0:
+			return "1.0";
+		case 0x1:
+			return "1.1";
+		case 0x2:
+			return "1.2";
+		case 0x3:
+			return "1.3";
+		case 0x4:
+			return "1.4";
+		default:
+			return "??";
+		}
 	case HW_DIGCTL_CHIPID_MX28:
 		switch (rev) {
 		case 0x1:
diff --git a/arch/arm/include/asm/arch-mxs/regs-digctl.h b/arch/arm/include/asm/arch-mxs/regs-digctl.h
index e7cc4b4..d043325 100644
--- a/arch/arm/include/asm/arch-mxs/regs-digctl.h
+++ b/arch/arm/include/asm/arch-mxs/regs-digctl.h
@@ -154,6 +154,7 @@ struct mxs_digctl_regs {
 
 /* Product code identification */
 #define HW_DIGCTL_CHIPID_MASK	(0xffff << 16)
+#define HW_DIGCTL_CHIPID_MX23	(0x3780 << 16)
 #define HW_DIGCTL_CHIPID_MX28	(0x2800 << 16)
 
 #endif /* __MX28_REGS_DIGCTL_H__ */
-- 
1.7.10.4

[U-Boot] [PATCH 09/18] mx23: Add boot mode description

[Marek Vasut]

From: Otavio Salvador <otavio@ossystems.com.br>

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
---
 arch/arm/include/asm/arch-mxs/sys_proto.h |   12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm/include/asm/arch-mxs/sys_proto.h b/arch/arm/include/asm/arch-mxs/sys_proto.h
index a4290d8..8aaf196 100644
--- a/arch/arm/include/asm/arch-mxs/sys_proto.h
+++ b/arch/arm/include/asm/arch-mxs/sys_proto.h
@@ -52,6 +52,17 @@ struct mxs_pair {
 };
 
 static const struct mxs_pair mxs_boot_modes[] = {
+#if defined(CONFIG_MX23)
+	{ 0x00, 0x0f, "USB" },
+	{ 0x01, 0x1f, "I2C, master" },
+	{ 0x02, 0x1f, "SSP SPI #1, master, NOR" },
+	{ 0x03, 0x1f, "SSP SPI #2, master, NOR" },
+	{ 0x04, 0x1f, "NAND" },
+	{ 0x08, 0x1f, "SSP SPI #3, master, EEPROM" },
+	{ 0x09, 0x1f, "SSP SD/MMC #0" },
+	{ 0x0a, 0x1f, "SSP SD/MMC #1" },
+	{ 0x00, 0x00, "Reserved/Unknown/Wrong" },
+#elif defined(CONFIG_MX28)
 	{ 0x00, 0x0f, "USB #0" },
 	{ 0x01, 0x1f, "I2C #0, master, 3V3" },
 	{ 0x11, 0x1f, "I2C #0, master, 1V8" },
@@ -68,6 +79,7 @@ static const struct mxs_pair mxs_boot_modes[] = {
 	{ 0x0a, 0x1f, "SSP SD/MMC #1, 3V3" },
 	{ 0x1a, 0x1f, "SSP SD/MMC #1, 1V8" },
 	{ 0x00, 0x00, "Reserved/Unknown/Wrong" },
+#endif
 };
 
 struct mxs_spl_data {
-- 
1.7.10.4

[U-Boot] [PATCH 10/18] mx23: SPL: Add boot mode support

[Marek Vasut]

From: Otavio Salvador <otavio@ossystems.com.br>

This adds the boot mode support for i.MX23 processors.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
---
 arch/arm/cpu/arm926ejs/mxs/spl_boot.c |   25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
index 1b8502e..7e70440 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
@@ -51,12 +51,21 @@ void early_delay(int delay)
 
 #define	MUX_CONFIG_BOOTMODE_PAD	(MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL)
 static const iomux_cfg_t iomux_boot[] = {
+#if defined(CONFIG_MX23)
+	MX23_PAD_LCD_D00__GPIO_1_0 | MUX_CONFIG_BOOTMODE_PAD,
+	MX23_PAD_LCD_D01__GPIO_1_1 | MUX_CONFIG_BOOTMODE_PAD,
+	MX23_PAD_LCD_D02__GPIO_1_2 | MUX_CONFIG_BOOTMODE_PAD,
+	MX23_PAD_LCD_D03__GPIO_1_3 | MUX_CONFIG_BOOTMODE_PAD,
+	MX23_PAD_LCD_D04__GPIO_1_4 | MUX_CONFIG_BOOTMODE_PAD,
+	MX23_PAD_LCD_D05__GPIO_1_5 | MUX_CONFIG_BOOTMODE_PAD,
+#elif defined(CONFIG_MX28)
 	MX28_PAD_LCD_D00__GPIO_1_0 | MUX_CONFIG_BOOTMODE_PAD,
 	MX28_PAD_LCD_D01__GPIO_1_1 | MUX_CONFIG_BOOTMODE_PAD,
 	MX28_PAD_LCD_D02__GPIO_1_2 | MUX_CONFIG_BOOTMODE_PAD,
 	MX28_PAD_LCD_D03__GPIO_1_3 | MUX_CONFIG_BOOTMODE_PAD,
 	MX28_PAD_LCD_D04__GPIO_1_4 | MUX_CONFIG_BOOTMODE_PAD,
 	MX28_PAD_LCD_D05__GPIO_1_5 | MUX_CONFIG_BOOTMODE_PAD,
+#endif
 };
 
 static uint8_t mxs_get_bootmode_index(void)
@@ -68,6 +77,21 @@ static uint8_t mxs_get_bootmode_index(void)
 	/* Setup IOMUX of bootmode pads to GPIO */
 	mxs_iomux_setup_multiple_pads(iomux_boot, ARRAY_SIZE(iomux_boot));
 
+#if defined(CONFIG_MX23)
+	/* Setup bootmode pins as GPIO input */
+	gpio_direction_input(MX23_PAD_LCD_D00__GPIO_1_0);
+	gpio_direction_input(MX23_PAD_LCD_D01__GPIO_1_1);
+	gpio_direction_input(MX23_PAD_LCD_D02__GPIO_1_2);
+	gpio_direction_input(MX23_PAD_LCD_D03__GPIO_1_3);
+	gpio_direction_input(MX23_PAD_LCD_D05__GPIO_1_5);
+
+	/* Read bootmode pads */
+	bootmode |= (gpio_get_value(MX23_PAD_LCD_D00__GPIO_1_0) ? 1 : 0) << 0;
+	bootmode |= (gpio_get_value(MX23_PAD_LCD_D01__GPIO_1_1) ? 1 : 0) << 1;
+	bootmode |= (gpio_get_value(MX23_PAD_LCD_D02__GPIO_1_2) ? 1 : 0) << 2;
+	bootmode |= (gpio_get_value(MX23_PAD_LCD_D03__GPIO_1_3) ? 1 : 0) << 3;
+	bootmode |= (gpio_get_value(MX23_PAD_LCD_D05__GPIO_1_5) ? 1 : 0) << 5;
+#elif defined(CONFIG_MX28)
 	/* Setup bootmode pins as GPIO input */
 	gpio_direction_input(MX28_PAD_LCD_D00__GPIO_1_0);
 	gpio_direction_input(MX28_PAD_LCD_D01__GPIO_1_1);
@@ -83,6 +107,7 @@ static uint8_t mxs_get_bootmode_index(void)
 	bootmode |= (gpio_get_value(MX28_PAD_LCD_D03__GPIO_1_3) ? 1 : 0) << 3;
 	bootmode |= (gpio_get_value(MX28_PAD_LCD_D04__GPIO_1_4) ? 1 : 0) << 4;
 	bootmode |= (gpio_get_value(MX28_PAD_LCD_D05__GPIO_1_5) ? 1 : 0) << 5;
+#endif
 
 	for (i = 0; i < ARRAY_SIZE(mxs_boot_modes); i++) {
 		masked = bootmode & mxs_boot_modes[i].boot_mask;
-- 
1.7.10.4

[U-Boot] [PATCH 11/18] mx23: SPL: Initialize DDR at 133MHz

[Marek Vasut]

From: Otavio Salvador <otavio@ossystems.com.br>

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
---
 arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c |   20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
index 401c513..9d05f83 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
@@ -83,6 +83,22 @@ static uint32_t dram_vals[] = {
 	0x06120612, 0x04320432, 0x04320432, 0x00040004,
 	0x00040004, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00010001
+
+/*
+ * i.MX23 DDR at 133MHz
+ */
+#elif defined(CONFIG_MX23)
+	0x01010001, 0x00010100, 0x01000101, 0x00000001,
+	0x00000101, 0x00000000, 0x00010000, 0x01000001,
+	0x00000000, 0x00000001, 0x07000200, 0x00070202,
+	0x02020000, 0x04040a01, 0x00000201, 0x02040000,
+	0x02000000, 0x19000f08, 0x0d0d0000, 0x02021313,
+	0x02061521, 0x0000000a, 0x00080008, 0x00200020,
+	0x00200020, 0x00200020, 0x000003f7, 0x00000000,
+	0x00000000, 0x00000020, 0x00000020, 0x00c80000,
+	0x000a23cd, 0x000000c8, 0x00006665, 0x00000000,
+	0x00000101, 0x00040001, 0x00000000, 0x00000000,
+	0x00010000
 #else
 #error Unsupported memory initialization
 #endif
@@ -102,6 +118,10 @@ static void initialize_dram_values(void)
 
 	for (i = 0; i < ARRAY_SIZE(dram_vals); i++)
 		writel(dram_vals[i], MXS_DRAM_BASE + (4 * i));
+
+#ifdef CONFIG_MX23
+	writel((1 << 24), MXS_DRAM_BASE + (4 * 8));
+#endif
 }
 
 static void mxs_mem_init_clock(void)
-- 
1.7.10.4

[U-Boot] [PATCH 12/18] mx23: config: Enable building of u-boot.sb binary

[Marek Vasut]

From: Otavio Salvador <otavio@ossystems.com.br>

For i.MX23 we need to pass imx23 as elftosb param.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
---
 Makefile                                   |    1 +
 arch/arm/cpu/arm926ejs/mxs/u-boot-imx23.bd |   18 ++++++++++++++++++
 2 files changed, 19 insertions(+)
 create mode 100644 arch/arm/cpu/arm926ejs/mxs/u-boot-imx23.bd

diff --git a/Makefile b/Makefile
index a7b6cd1..af6baa4 100644
--- a/Makefile
+++ b/Makefile
@@ -508,6 +508,7 @@ $(obj)u-boot.ais:       $(obj)spl/u-boot-spl.bin $(obj)u-boot.img
 			$(obj)u-boot.ais
 
 # Specify the target for use in elftosb call
+ELFTOSB_TARGET-$(CONFIG_MX23) = imx23
 ELFTOSB_TARGET-$(CONFIG_MX28) = imx28
 
 $(obj)u-boot.sb:       $(obj)u-boot.bin $(obj)spl/u-boot-spl.bin
diff --git a/arch/arm/cpu/arm926ejs/mxs/u-boot-imx23.bd b/arch/arm/cpu/arm926ejs/mxs/u-boot-imx23.bd
new file mode 100644
index 0000000..3a51879
--- /dev/null
+++ b/arch/arm/cpu/arm926ejs/mxs/u-boot-imx23.bd
@@ -0,0 +1,18 @@
+options {
+	driveTag = 0x00;
+	flags = 0x01;
+}
+
+sources {
+	u_boot_spl="spl/u-boot-spl.bin";
+	u_boot="u-boot.bin";
+}
+
+section (0) {
+	load u_boot_spl > 0x0000;
+	load ivt (entry = 0x0014) > 0x8000;
+	call 0x8000;
+
+	load u_boot > 0x40000100;
+	call 0x40000100;
+}
-- 
1.7.10.4

[U-Boot] [PATCH 13/18] mx23: config: Enable mxsboot tool for i.MX23 based boards

[Marek Vasut]

From: Otavio Salvador <otavio@ossystems.com.br>

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
---
 tools/Makefile |    2 ++
 1 file changed, 2 insertions(+)

diff --git a/tools/Makefile b/tools/Makefile
index 686840a..c5952fc 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -69,6 +69,7 @@ BIN_FILES-$(CONFIG_XWAY_SWAP_BYTES) += xway-swap-bytes$(SFX)
 BIN_FILES-y += mkenvimage$(SFX)
 BIN_FILES-y += mkimage$(SFX)
 BIN_FILES-$(CONFIG_SMDK5250) += mksmdk5250spl$(SFX)
+BIN_FILES-$(CONFIG_MX23) += mxsboot$(SFX)
 BIN_FILES-$(CONFIG_MX28) += mxsboot$(SFX)
 BIN_FILES-$(CONFIG_NETCONSOLE) += ncb$(SFX)
 BIN_FILES-$(CONFIG_SHA1_CHECK_UB_IMG) += ubsha1$(SFX)
@@ -98,6 +99,7 @@ NOPED_OBJ_FILES-y += omapimage.o
 NOPED_OBJ_FILES-y += mkenvimage.o
 NOPED_OBJ_FILES-y += mkimage.o
 OBJ_FILES-$(CONFIG_SMDK5250) += mkexynosspl.o
+OBJ_FILES-$(CONFIG_MX23) += mxsboot.o
 OBJ_FILES-$(CONFIG_MX28) += mxsboot.o
 OBJ_FILES-$(CONFIG_NETCONSOLE) += ncb.o
 NOPED_OBJ_FILES-y += os_support.o
-- 
1.7.10.4

[U-Boot] [PATCH 14/18] mmc: Limit the number of used SSP ports on MX23

[Marek Vasut]

The MX23 can only use two SSP ports.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
---
 drivers/mmc/mxsmmc.c |   12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/drivers/mmc/mxsmmc.c b/drivers/mmc/mxsmmc.c
index 76878d0..0c4cd54 100644
--- a/drivers/mmc/mxsmmc.c
+++ b/drivers/mmc/mxsmmc.c
@@ -356,6 +356,16 @@ int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int))
 	struct mmc *mmc = NULL;
 	struct mxsmmc_priv *priv = NULL;
 	int ret;
+#if defined(CONFIG_MX23)
+	const unsigned int mxsmmc_max_id = 2;
+	const unsigned int mxsmmc_clk_id = 0;
+#elif defined(CONFIG_MX28)
+	const unsigned int mxsmmc_max_id = 4;
+	const unsigned int mxsmmc_clk_id = id;
+#endif
+
+	if (id >= mxsmmc_max_id)
+		return -ENODEV;
 
 	mmc = malloc(sizeof(struct mmc));
 	if (!mmc)
@@ -401,7 +411,7 @@ int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int))
 	 * CLOCK_RATE could be any integer from 0 to 255.
 	 */
 	mmc->f_min = 400000;
-	mmc->f_max = mxc_get_clock(MXC_SSP0_CLK + id) * 1000 / 2;
+	mmc->f_max = mxc_get_clock(MXC_SSP0_CLK + mxsmmc_clk_id) * 1000 / 2;
 	mmc->b_max = 0x20;
 
 	mmc_register(mmc);
-- 
1.7.10.4

[U-Boot] [PATCH 15/18] mxs: Add MX23 quirks into the clock code

[Marek Vasut]

From: Otavio Salvador <otavio@ossystems.com.br>

The MX23 has different handling of the SSP clock and GPMI NAND clock sources,
add necessary quirks into the clock code to properly handle these.

Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
---
 arch/arm/cpu/arm926ejs/mxs/clock.c    |   44 +++++++++++++++++++++++++--------
 arch/arm/include/asm/arch-mxs/clock.h |    8 ++++--
 2 files changed, 40 insertions(+), 12 deletions(-)

diff --git a/arch/arm/cpu/arm926ejs/mxs/clock.c b/arch/arm/cpu/arm926ejs/mxs/clock.c
index b7cf98f..2df7ec6 100644
--- a/arch/arm/cpu/arm926ejs/mxs/clock.c
+++ b/arch/arm/cpu/arm926ejs/mxs/clock.c
@@ -1,5 +1,5 @@
 /*
- * Freescale i.MX28 clock setup code
+ * Freescale i.MX23/i.MX28 clock setup code
  *
  * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
  * on behalf of DENX Software Engineering GmbH
@@ -32,15 +32,24 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
 
-/* The PLL frequency is always 480MHz, see section 10.2 in iMX28 datasheet. */
+/*
+ * The PLL frequency is 480MHz and XTAL frequency is 24MHz
+ *   iMX23: datasheet section 4.2
+ *   iMX28: datasheet section 10.2
+ */
 #define	PLL_FREQ_KHZ	480000
 #define	PLL_FREQ_COEF	18
-/* The XTAL frequency is always 24MHz, see section 10.2 in iMX28 datasheet. */
 #define	XTAL_FREQ_KHZ	24000
 
 #define	PLL_FREQ_MHZ	(PLL_FREQ_KHZ / 1000)
 #define	XTAL_FREQ_MHZ	(XTAL_FREQ_KHZ / 1000)
 
+#if defined(CONFIG_MX23)
+#define MXC_SSPCLK_MAX MXC_SSPCLK0
+#elif defined(CONFIG_MX28)
+#define MXC_SSPCLK_MAX MXC_SSPCLK3
+#endif
+
 static uint32_t mxs_get_pclk(void)
 {
 	struct mxs_clkctrl_regs *clkctrl_regs =
@@ -120,10 +129,17 @@ static uint32_t mxs_get_gpmiclk(void)
 {
 	struct mxs_clkctrl_regs *clkctrl_regs =
 		(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
-
+#if defined(CONFIG_MX23)
+	uint8_t *reg =
+		&clkctrl_regs->hw_clkctrl_frac0[CLKCTRL_FRAC0_CPU];
+#elif defined(CONFIG_MX28)
+	uint8_t *reg =
+		&clkctrl_regs->hw_clkctrl_frac1[CLKCTRL_FRAC1_GPMI];
+#endif
 	uint32_t clkctrl, clkseq, div;
 	uint8_t clkfrac, frac;
 
+
 	clkseq = readl(&clkctrl_regs->hw_clkctrl_clkseq);
 	clkctrl = readl(&clkctrl_regs->hw_clkctrl_gpmi);
 
@@ -134,7 +150,7 @@ static uint32_t mxs_get_gpmiclk(void)
 	}
 
 	/* REF Path */
-	clkfrac = readb(&clkctrl_regs->hw_clkctrl_frac1[CLKCTRL_FRAC1_GPMI]);
+	clkfrac = readb(reg);
 	frac = clkfrac & CLKCTRL_FRAC_FRAC_MASK;
 	div = clkctrl & CLKCTRL_GPMI_DIV_MASK;
 	return (PLL_FREQ_MHZ * PLL_FREQ_COEF / frac) / div;
@@ -203,7 +219,7 @@ void mxs_set_sspclk(enum mxs_sspclock ssp, uint32_t freq, int xtal)
 		(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
 	uint32_t clk, clkreg;
 
-	if (ssp > MXC_SSPCLK3)
+	if (ssp > MXC_SSPCLK_MAX)
 		return;
 
 	clkreg = (uint32_t)(&clkctrl_regs->hw_clkctrl_ssp0) +
@@ -248,7 +264,7 @@ static uint32_t mxs_get_sspclk(enum mxs_sspclock ssp)
 	uint32_t clkreg;
 	uint32_t clk, tmp;
 
-	if (ssp > MXC_SSPCLK3)
+	if (ssp > MXC_SSPCLK_MAX)
 		return 0;
 
 	tmp = readl(&clkctrl_regs->hw_clkctrl_clkseq);
@@ -273,8 +289,14 @@ static uint32_t mxs_get_sspclk(enum mxs_sspclock ssp)
  */
 void mxs_set_ssp_busclock(unsigned int bus, uint32_t freq)
 {
+#if defined(CONFIG_MX23)
+	const unsigned int clkbus = 0;
+#elif defined(CONFIG_MX28)
+	const unsigned int clkbus = bus;
+#endif
+
 	struct mxs_ssp_regs *ssp_regs;
-	const uint32_t sspclk = mxs_get_sspclk(bus);
+	const uint32_t sspclk = mxs_get_sspclk(clkbus);
 	uint32_t reg;
 	uint32_t divide, rate, tgtclk;
 
@@ -325,16 +347,18 @@ uint32_t mxc_get_clock(enum mxc_clock clk)
 		return mxs_get_ioclk(MXC_IOCLK0);
 	case MXC_IO1_CLK:
 		return mxs_get_ioclk(MXC_IOCLK1);
+	case MXC_XTAL_CLK:
+		return XTAL_FREQ_KHZ * 1000;
 	case MXC_SSP0_CLK:
 		return mxs_get_sspclk(MXC_SSPCLK0);
+#ifdef CONFIG_MX28
 	case MXC_SSP1_CLK:
 		return mxs_get_sspclk(MXC_SSPCLK1);
 	case MXC_SSP2_CLK:
 		return mxs_get_sspclk(MXC_SSPCLK2);
 	case MXC_SSP3_CLK:
 		return mxs_get_sspclk(MXC_SSPCLK3);
-	case MXC_XTAL_CLK:
-		return XTAL_FREQ_KHZ * 1000;
+#endif
 	}
 
 	return 0;
diff --git a/arch/arm/include/asm/arch-mxs/clock.h b/arch/arm/include/asm/arch-mxs/clock.h
index d3927c7..3f7d3f0 100644
--- a/arch/arm/include/asm/arch-mxs/clock.h
+++ b/arch/arm/include/asm/arch-mxs/clock.h
@@ -1,5 +1,5 @@
 /*
- * Freescale i.MX28 Clock
+ * Freescale i.MX23/i.MX28 Clock
  *
  * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
  * on behalf of DENX Software Engineering GmbH
@@ -31,11 +31,13 @@ enum mxc_clock {
 	MXC_GPMI_CLK,
 	MXC_IO0_CLK,
 	MXC_IO1_CLK,
+	MXC_XTAL_CLK,
 	MXC_SSP0_CLK,
+#ifdef CONFIG_MX28
 	MXC_SSP1_CLK,
 	MXC_SSP2_CLK,
 	MXC_SSP3_CLK,
-	MXC_XTAL_CLK,
+#endif
 };
 
 enum mxs_ioclock {
@@ -45,9 +47,11 @@ enum mxs_ioclock {
 
 enum mxs_sspclock {
 	MXC_SSPCLK0 = 0,
+#ifdef CONFIG_MX28
 	MXC_SSPCLK1,
 	MXC_SSPCLK2,
 	MXC_SSPCLK3,
+#endif
 };
 
 uint32_t mxc_get_clock(enum mxc_clock clk);
-- 
1.7.10.4

[U-Boot] [PATCH 15/18 V2] mxs: Add MX23 quirks into the clock code

[Marek Vasut]

From: Otavio Salvador <otavio@ossystems.com.br>

The MX23 has different handling of the SSP clock and GPMI NAND clock sources,
add necessary quirks into the clock code to properly handle these.

Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
---
 arch/arm/cpu/arm926ejs/mxs/clock.c    |   35 ++++++++++++++++++++++++---------
 arch/arm/include/asm/arch-mxs/clock.h |    8 ++++++--
 2 files changed, 32 insertions(+), 11 deletions(-)

V2: There is one SSP clock divider per SSP block, these are not shared.
    mxs_set_ssp_busclock() mistakenly always used SSP0 on mx23.

diff --git a/arch/arm/cpu/arm926ejs/mxs/clock.c b/arch/arm/cpu/arm926ejs/mxs/clock.c
index b7cf98f..00b9aba 100644
--- a/arch/arm/cpu/arm926ejs/mxs/clock.c
+++ b/arch/arm/cpu/arm926ejs/mxs/clock.c
@@ -1,5 +1,5 @@
 /*
- * Freescale i.MX28 clock setup code
+ * Freescale i.MX23/i.MX28 clock setup code
  *
  * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
  * on behalf of DENX Software Engineering GmbH
@@ -32,15 +32,24 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
 
-/* The PLL frequency is always 480MHz, see section 10.2 in iMX28 datasheet. */
+/*
+ * The PLL frequency is 480MHz and XTAL frequency is 24MHz
+ *   iMX23: datasheet section 4.2
+ *   iMX28: datasheet section 10.2
+ */
 #define	PLL_FREQ_KHZ	480000
 #define	PLL_FREQ_COEF	18
-/* The XTAL frequency is always 24MHz, see section 10.2 in iMX28 datasheet. */
 #define	XTAL_FREQ_KHZ	24000
 
 #define	PLL_FREQ_MHZ	(PLL_FREQ_KHZ / 1000)
 #define	XTAL_FREQ_MHZ	(XTAL_FREQ_KHZ / 1000)
 
+#if defined(CONFIG_MX23)
+#define MXC_SSPCLK_MAX MXC_SSPCLK0
+#elif defined(CONFIG_MX28)
+#define MXC_SSPCLK_MAX MXC_SSPCLK3
+#endif
+
 static uint32_t mxs_get_pclk(void)
 {
 	struct mxs_clkctrl_regs *clkctrl_regs =
@@ -120,7 +129,13 @@ static uint32_t mxs_get_gpmiclk(void)
 {
 	struct mxs_clkctrl_regs *clkctrl_regs =
 		(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
-
+#if defined(CONFIG_MX23)
+	uint8_t *reg =
+		&clkctrl_regs->hw_clkctrl_frac0[CLKCTRL_FRAC0_CPU];
+#elif defined(CONFIG_MX28)
+	uint8_t *reg =
+		&clkctrl_regs->hw_clkctrl_frac1[CLKCTRL_FRAC1_GPMI];
+#endif
 	uint32_t clkctrl, clkseq, div;
 	uint8_t clkfrac, frac;
 
@@ -134,7 +149,7 @@ static uint32_t mxs_get_gpmiclk(void)
 	}
 
 	/* REF Path */
-	clkfrac = readb(&clkctrl_regs->hw_clkctrl_frac1[CLKCTRL_FRAC1_GPMI]);
+	clkfrac = readb(reg);
 	frac = clkfrac & CLKCTRL_FRAC_FRAC_MASK;
 	div = clkctrl & CLKCTRL_GPMI_DIV_MASK;
 	return (PLL_FREQ_MHZ * PLL_FREQ_COEF / frac) / div;
@@ -203,7 +218,7 @@ void mxs_set_sspclk(enum mxs_sspclock ssp, uint32_t freq, int xtal)
 		(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
 	uint32_t clk, clkreg;
 
-	if (ssp > MXC_SSPCLK3)
+	if (ssp > MXC_SSPCLK_MAX)
 		return;
 
 	clkreg = (uint32_t)(&clkctrl_regs->hw_clkctrl_ssp0) +
@@ -248,7 +263,7 @@ static uint32_t mxs_get_sspclk(enum mxs_sspclock ssp)
 	uint32_t clkreg;
 	uint32_t clk, tmp;
 
-	if (ssp > MXC_SSPCLK3)
+	if (ssp > MXC_SSPCLK_MAX)
 		return 0;
 
 	tmp = readl(&clkctrl_regs->hw_clkctrl_clkseq);
@@ -325,16 +340,18 @@ uint32_t mxc_get_clock(enum mxc_clock clk)
 		return mxs_get_ioclk(MXC_IOCLK0);
 	case MXC_IO1_CLK:
 		return mxs_get_ioclk(MXC_IOCLK1);
+	case MXC_XTAL_CLK:
+		return XTAL_FREQ_KHZ * 1000;
 	case MXC_SSP0_CLK:
 		return mxs_get_sspclk(MXC_SSPCLK0);
+#ifdef CONFIG_MX28
 	case MXC_SSP1_CLK:
 		return mxs_get_sspclk(MXC_SSPCLK1);
 	case MXC_SSP2_CLK:
 		return mxs_get_sspclk(MXC_SSPCLK2);
 	case MXC_SSP3_CLK:
 		return mxs_get_sspclk(MXC_SSPCLK3);
-	case MXC_XTAL_CLK:
-		return XTAL_FREQ_KHZ * 1000;
+#endif
 	}
 
 	return 0;
diff --git a/arch/arm/include/asm/arch-mxs/clock.h b/arch/arm/include/asm/arch-mxs/clock.h
index d3927c7..3f7d3f0 100644
--- a/arch/arm/include/asm/arch-mxs/clock.h
+++ b/arch/arm/include/asm/arch-mxs/clock.h
@@ -1,5 +1,5 @@
 /*
- * Freescale i.MX28 Clock
+ * Freescale i.MX23/i.MX28 Clock
  *
  * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
  * on behalf of DENX Software Engineering GmbH
@@ -31,11 +31,13 @@ enum mxc_clock {
 	MXC_GPMI_CLK,
 	MXC_IO0_CLK,
 	MXC_IO1_CLK,
+	MXC_XTAL_CLK,
 	MXC_SSP0_CLK,
+#ifdef CONFIG_MX28
 	MXC_SSP1_CLK,
 	MXC_SSP2_CLK,
 	MXC_SSP3_CLK,
-	MXC_XTAL_CLK,
+#endif
 };
 
 enum mxs_ioclock {
@@ -45,9 +47,11 @@ enum mxs_ioclock {
 
 enum mxs_sspclock {
 	MXC_SSPCLK0 = 0,
+#ifdef CONFIG_MX28
 	MXC_SSPCLK1,
 	MXC_SSPCLK2,
 	MXC_SSPCLK3,
+#endif
 };
 
 uint32_t mxc_get_clock(enum mxc_clock clk);
-- 
1.7.10.4

[U-Boot] [PATCH 16/18] mxs: Add MX23 olinuxino board support

[Marek Vasut]

This patch adds support for MX23-based Olinuxino board.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
---
 board/olimex/mx23_olinuxino/Makefile         |   47 +++++++++
 board/olimex/mx23_olinuxino/mx23_olinuxino.c |   51 ++++++++++
 board/olimex/mx23_olinuxino/spl_boot.c       |   90 +++++++++++++++++
 boards.cfg                                   |    1 +
 include/configs/mx23_olinuxino.h             |  136 ++++++++++++++++++++++++++
 5 files changed, 325 insertions(+)
 create mode 100644 board/olimex/mx23_olinuxino/Makefile
 create mode 100644 board/olimex/mx23_olinuxino/mx23_olinuxino.c
 create mode 100644 board/olimex/mx23_olinuxino/spl_boot.c
 create mode 100644 include/configs/mx23_olinuxino.h

diff --git a/board/olimex/mx23_olinuxino/Makefile b/board/olimex/mx23_olinuxino/Makefile
new file mode 100644
index 0000000..ff41cff
--- /dev/null
+++ b/board/olimex/mx23_olinuxino/Makefile
@@ -0,0 +1,47 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).o
+
+ifndef	CONFIG_SPL_BUILD
+COBJS	:= mx23_olinuxino.o
+else
+COBJS	:= spl_boot.o
+endif
+
+SRCS	:= $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+
+$(LIB):	$(obj).depend $(OBJS)
+	$(call cmd_link_o_target, $(OBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/olimex/mx23_olinuxino/mx23_olinuxino.c b/board/olimex/mx23_olinuxino/mx23_olinuxino.c
new file mode 100644
index 0000000..2fcad26
--- /dev/null
+++ b/board/olimex/mx23_olinuxino/mx23_olinuxino.c
@@ -0,0 +1,51 @@
+/*
+ * Olimex MX23 Olinuxino board
+ *
+ * Copyright (C) 2013 Marek Vasut <marex@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/sys_proto.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Functions
+ */
+int board_early_init_f(void)
+{
+	/* SSP clock init will come here soon. */
+	return 0;
+}
+
+int dram_init(void)
+{
+	return mxs_dram_init();
+}
+
+int board_init(void)
+{
+	/* Adress of boot parameters */
+	gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
+
+	return 0;
+}
diff --git a/board/olimex/mx23_olinuxino/spl_boot.c b/board/olimex/mx23_olinuxino/spl_boot.c
new file mode 100644
index 0000000..aaebe6c
--- /dev/null
+++ b/board/olimex/mx23_olinuxino/spl_boot.c
@@ -0,0 +1,90 @@
+/*
+ * Olimex MX23 Olinuxino Boot setup
+ *
+ * Copyright (C) 2013 Marek Vasut <marex@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <config.h>
+#include <asm/io.h>
+#include <asm/arch/iomux-mx23.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/sys_proto.h>
+
+#define	MUX_CONFIG_EMI	(MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL)
+
+const iomux_cfg_t iomux_setup[] = {
+	/* DUART */
+	MX23_PAD_PWM0__DUART_RX,
+	MX23_PAD_PWM1__DUART_TX,
+
+	/* EMI */
+	MX23_PAD_EMI_D00__EMI_D00 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D01__EMI_D01 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D02__EMI_D02 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D03__EMI_D03 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D04__EMI_D04 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D05__EMI_D05 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D06__EMI_D06 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D07__EMI_D07 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D08__EMI_D08 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D09__EMI_D09 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D10__EMI_D10 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D11__EMI_D11 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D12__EMI_D12 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D13__EMI_D13 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D14__EMI_D14 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D15__EMI_D15 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_DQM0__EMI_DQM0 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_DQM1__EMI_DQM1 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_DQS0__EMI_DQS0 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_DQS1__EMI_DQS1 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_CLK__EMI_CLK | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_CLKN__EMI_CLKN | MUX_CONFIG_EMI,
+
+	MX23_PAD_EMI_A00__EMI_A00 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_A01__EMI_A01 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_A02__EMI_A02 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_A03__EMI_A03 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_A04__EMI_A04 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_A05__EMI_A05 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_A06__EMI_A06 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_A07__EMI_A07 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_A08__EMI_A08 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_A09__EMI_A09 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_A10__EMI_A10 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_A11__EMI_A11 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_A12__EMI_A12 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_BA0__EMI_BA0 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_BA1__EMI_BA1 | MUX_CONFIG_EMI,
+
+	MX23_PAD_EMI_CASN__EMI_CASN | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_CE0N__EMI_CE0N | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_CE1N__EMI_CE1N | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_CKE__EMI_CKE | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_RASN__EMI_RASN | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_WEN__EMI_WEN | MUX_CONFIG_EMI,
+};
+
+void board_init_ll(void)
+{
+	mxs_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
+}
diff --git a/boards.cfg b/boards.cfg
index 388e4a4..ef17745 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -189,6 +189,7 @@ tx25                         arm         arm926ejs   tx25                karo
 zmx25                        arm         arm926ejs   zmx25               syteco         mx25
 imx27lite                    arm         arm926ejs   imx27lite           logicpd        mx27
 magnesium                    arm         arm926ejs   imx27lite           logicpd        mx27
+mx23_olinuxino               arm         arm926ejs   mx23_olinuxino      olimex         mxs		mx23_olinuxino
 apx4devkit                   arm         arm926ejs   apx4devkit          bluegiga       mxs		apx4devkit
 m28evk                       arm         arm926ejs   m28evk              denx           mxs		m28evk
 mx28evk                      arm         arm926ejs   mx28evk             freescale      mxs		mx28evk
diff --git a/include/configs/mx23_olinuxino.h b/include/configs/mx23_olinuxino.h
new file mode 100644
index 0000000..8bc13ff
--- /dev/null
+++ b/include/configs/mx23_olinuxino.h
@@ -0,0 +1,136 @@
+/*
+ * Copyright (C) 2013 Marek Vasut <marex@denx.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef __MX23_OLINUXINO_CONFIG_H__
+#define __MX23_OLINUXINO_CONFIG_H__
+
+/*
+ * SoC configurations
+ */
+#define	CONFIG_MX23				/* i.MX23 SoC */
+#define	CONFIG_MXS_GPIO				/* GPIO control */
+#define	CONFIG_SYS_HZ		1000		/* Ticks per second */
+
+/* Device-tree only boot. */
+#define	CONFIG_MACH_TYPE	0xffffffff
+
+#include <asm/arch/regs-base.h>
+
+#define	CONFIG_SYS_NO_FLASH
+#define	CONFIG_BOARD_EARLY_INIT_F
+#define	CONFIG_ARCH_MISC_INIT
+
+/*
+ * SPL
+ */
+#define	CONFIG_SPL
+#define	CONFIG_SPL_NO_CPU_SUPPORT_CODE
+#define	CONFIG_SPL_START_S_PATH		"arch/arm/cpu/arm926ejs/mxs"
+#define	CONFIG_SPL_LDSCRIPT	"arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
+#define	CONFIG_SPL_LIBCOMMON_SUPPORT
+#define	CONFIG_SPL_LIBGENERIC_SUPPORT
+#define	CONFIG_SPL_GPIO_SUPPORT
+
+/*
+ * U-Boot Commands
+ */
+#include <config_cmd_default.h>
+#define	CONFIG_DISPLAY_CPUINFO
+#define	CONFIG_DOS_PARTITION
+
+#define	CONFIG_CMD_CACHE
+#define	CONFIG_CMD_FAT
+#define	CONFIG_CMD_GPIO
+
+/*
+ * Memory configurations
+ */
+#define	CONFIG_NR_DRAM_BANKS		1		/* 1 bank of DRAM */
+#define	PHYS_SDRAM_1			0x40000000	/* Base address */
+#define	PHYS_SDRAM_1_SIZE		0x08000000	/* Max 128 MB RAM */
+#define	CONFIG_SYS_MALLOC_LEN		0x00400000	/* 4 MB for malloc */
+#define	CONFIG_SYS_GBL_DATA_SIZE	128		/* Initial data */
+#define	CONFIG_SYS_MEMTEST_START	0x40000000	/* Memtest start adr */
+#define	CONFIG_SYS_MEMTEST_END		0x40400000	/* 4 MB RAM test */
+#define	CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+/* Point initial SP in SRAM so SPL can use it too. */
+
+#define CONFIG_SYS_INIT_RAM_ADDR	0x00000000
+#define CONFIG_SYS_INIT_RAM_SIZE	(128 * 1024)
+
+#define CONFIG_SYS_INIT_SP_OFFSET \
+	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR \
+	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+/*
+ * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
+ * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
+ * binary. In case there was more of this mess, 0x100 bytes are skipped.
+ */
+#define	CONFIG_SYS_TEXT_BASE		0x40000100
+
+/*
+ * U-Boot general configurations
+ */
+#define	CONFIG_SYS_LONGHELP
+#define	CONFIG_SYS_PROMPT	"=> "
+#define	CONFIG_SYS_CBSIZE	1024		/* Console I/O buffer size */
+#define	CONFIG_SYS_PBSIZE	\
+	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+						/* Print buffer size */
+#define	CONFIG_SYS_MAXARGS	32		/* Max number of command args */
+#define	CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
+						/* Boot argument buffer size */
+#define	CONFIG_VERSION_VARIABLE			/* U-BOOT version */
+#define	CONFIG_AUTO_COMPLETE			/* Command auto complete */
+#define	CONFIG_CMDLINE_EDITING			/* Command history etc */
+#define	CONFIG_SYS_HUSH_PARSER
+
+/*
+ * Serial Driver
+ */
+#define	CONFIG_PL011_SERIAL
+#define	CONFIG_PL011_CLOCK		24000000
+#define	CONFIG_PL01x_PORTS		{ (void *)MXS_UARTDBG_BASE }
+#define	CONFIG_CONS_INDEX		0
+#define	CONFIG_BAUDRATE			115200	/* Default baud rate */
+
+/*
+ * APBH DMA
+ */
+#define CONFIG_APBH_DMA
+
+/*
+ * ENV -- nowhere so far
+ */
+#define	CONFIG_ENV_SIZE			(16 * 1024)
+#define	CONFIG_ENV_IS_NOWHERE
+
+/*
+ * Boot Linux
+ */
+#define	CONFIG_CMDLINE_TAG
+#define	CONFIG_SETUP_MEMORY_TAGS
+#define	CONFIG_BOOTDELAY	3
+#define	CONFIG_BOOTFILE		"uImage"
+#define	CONFIG_BOOTARGS		"console=ttyAM0,115200n8 "
+#define	CONFIG_LOADADDR		0x42000000
+#define	CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR
+#define	CONFIG_OF_LIBFDT
+
+#endif /* __MX23_OLINUXINO_CONFIG_H__ */
-- 
1.7.10.4

[U-Boot] [PATCH 16/18] mxs: Add MX23 olinuxino board support

[Fabio Estevam]

Hi Marek,

On Fri, Jan 11, 2013 at 11:19 AM, Marek Vasut <marex@denx.de> wrote:
> This patch adds support for MX23-based Olinuxino board.
>
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Fabio Estevam <fabio.estevam@freescale.com>
> Cc: Otavio Salvador <otavio@ossystems.com.br>
> Cc: Stefano Babic <sbabic@denx.de>
> ---
>  board/olimex/mx23_olinuxino/Makefile         |   47 +++++++++
>  board/olimex/mx23_olinuxino/mx23_olinuxino.c |   51 ++++++++++
>  board/olimex/mx23_olinuxino/spl_boot.c       |   90 +++++++++++++++++
>  boards.cfg                                   |    1 +
>  include/configs/mx23_olinuxino.h             |  136 ++++++++++++++++++++++++++

You missed an entry in MAINTAINER file.

>  5 files changed, 325 insertions(+)
>  create mode 100644 board/olimex/mx23_olinuxino/Makefile

Can't we name it 'mx23olinuxino', without the underscore ?

>  create mode 100644 board/olimex/mx23_olinuxino/mx23_olinuxino.c
>  create mode 100644 board/olimex/mx23_olinuxino/spl_boot.c
>  create mode 100644 include/configs/mx23_olinuxino.h
>
> diff --git a/board/olimex/mx23_olinuxino/Makefile b/board/olimex/mx23_olinuxino/Makefile
> new file mode 100644
> index 0000000..ff41cff
> --- /dev/null
> +++ b/board/olimex/mx23_olinuxino/Makefile
> @@ -0,0 +1,47 @@
> +#
> +# (C) Copyright 2000-2006
> +# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
> +#
> +# See file CREDITS for list of people who contributed to this
> +# project.
> +#
> +# This program is free software; you can redistribute it and/or
> +# modify it under the terms of the GNU General Public License as
> +# published by the Free Software Foundation; either version 2 of
> +# the License, or (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> +# GNU General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public License
> +# along with this program; if not, write to the Free Software
> +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> +# MA 02111-1307 USA
> +#
> +
> +include $(TOPDIR)/config.mk
> +
> +LIB    = $(obj)lib$(BOARD).o
> +
> +ifndef CONFIG_SPL_BUILD
> +COBJS  := mx23_olinuxino.o
> +else
> +COBJS  := spl_boot.o
> +endif
> +
> +SRCS   := $(COBJS:.o=.c)
> +OBJS   := $(addprefix $(obj),$(COBJS))
> +
> +$(LIB):        $(obj).depend $(OBJS)
> +       $(call cmd_link_o_target, $(OBJS))
> +
> +#########################################################################
> +
> +# defines $(obj).depend target
> +include $(SRCTREE)/rules.mk
> +
> +sinclude $(obj).depend
> +
> +#########################################################################
> diff --git a/board/olimex/mx23_olinuxino/mx23_olinuxino.c b/board/olimex/mx23_olinuxino/mx23_olinuxino.c
> new file mode 100644
> index 0000000..2fcad26
> --- /dev/null
> +++ b/board/olimex/mx23_olinuxino/mx23_olinuxino.c
> @@ -0,0 +1,51 @@
> +/*
> + * Olimex MX23 Olinuxino board
> + *
> + * Copyright (C) 2013 Marek Vasut <marex@denx.de>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include <common.h>
> +#include <asm/arch/imx-regs.h>
> +#include <asm/arch/sys_proto.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +/*
> + * Functions
> + */
> +int board_early_init_f(void)
> +{
> +       /* SSP clock init will come here soon. */
> +       return 0;
> +}
> +
> +int dram_init(void)
> +{
> +       return mxs_dram_init();
> +}
> +
> +int board_init(void)
> +{
> +       /* Adress of boot parameters */
> +       gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
> +
> +       return 0;
> +}
> diff --git a/board/olimex/mx23_olinuxino/spl_boot.c b/board/olimex/mx23_olinuxino/spl_boot.c
> new file mode 100644
> index 0000000..aaebe6c
> --- /dev/null
> +++ b/board/olimex/mx23_olinuxino/spl_boot.c
> @@ -0,0 +1,90 @@
> +/*
> + * Olimex MX23 Olinuxino Boot setup
> + *
> + * Copyright (C) 2013 Marek Vasut <marex@denx.de>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include <common.h>
> +#include <config.h>
> +#include <asm/io.h>
> +#include <asm/arch/iomux-mx23.h>
> +#include <asm/arch/imx-regs.h>
> +#include <asm/arch/sys_proto.h>
> +
> +#define        MUX_CONFIG_EMI  (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL)
> +
> +const iomux_cfg_t iomux_setup[] = {
> +       /* DUART */
> +       MX23_PAD_PWM0__DUART_RX,
> +       MX23_PAD_PWM1__DUART_TX,
> +
> +       /* EMI */
> +       MX23_PAD_EMI_D00__EMI_D00 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_D01__EMI_D01 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_D02__EMI_D02 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_D03__EMI_D03 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_D04__EMI_D04 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_D05__EMI_D05 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_D06__EMI_D06 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_D07__EMI_D07 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_D08__EMI_D08 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_D09__EMI_D09 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_D10__EMI_D10 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_D11__EMI_D11 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_D12__EMI_D12 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_D13__EMI_D13 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_D14__EMI_D14 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_D15__EMI_D15 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_DQM0__EMI_DQM0 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_DQM1__EMI_DQM1 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_DQS0__EMI_DQS0 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_DQS1__EMI_DQS1 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_CLK__EMI_CLK | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_CLKN__EMI_CLKN | MUX_CONFIG_EMI,
> +
> +       MX23_PAD_EMI_A00__EMI_A00 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_A01__EMI_A01 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_A02__EMI_A02 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_A03__EMI_A03 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_A04__EMI_A04 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_A05__EMI_A05 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_A06__EMI_A06 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_A07__EMI_A07 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_A08__EMI_A08 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_A09__EMI_A09 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_A10__EMI_A10 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_A11__EMI_A11 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_A12__EMI_A12 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_BA0__EMI_BA0 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_BA1__EMI_BA1 | MUX_CONFIG_EMI,
> +
> +       MX23_PAD_EMI_CASN__EMI_CASN | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_CE0N__EMI_CE0N | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_CE1N__EMI_CE1N | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_CKE__EMI_CKE | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_RASN__EMI_RASN | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_WEN__EMI_WEN | MUX_CONFIG_EMI,
> +};
> +
> +void board_init_ll(void)
> +{
> +       mxs_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
> +}
> diff --git a/boards.cfg b/boards.cfg
> index 388e4a4..ef17745 100644
> --- a/boards.cfg
> +++ b/boards.cfg
> @@ -189,6 +189,7 @@ tx25                         arm         arm926ejs   tx25                karo
>  zmx25                        arm         arm926ejs   zmx25               syteco         mx25
>  imx27lite                    arm         arm926ejs   imx27lite           logicpd        mx27
>  magnesium                    arm         arm926ejs   imx27lite           logicpd        mx27
> +mx23_olinuxino               arm         arm926ejs   mx23_olinuxino      olimex         mxs            mx23_olinuxino
>  apx4devkit                   arm         arm926ejs   apx4devkit          bluegiga       mxs            apx4devkit
>  m28evk                       arm         arm926ejs   m28evk              denx           mxs            m28evk
>  mx28evk                      arm         arm926ejs   mx28evk             freescale      mxs            mx28evk
> diff --git a/include/configs/mx23_olinuxino.h b/include/configs/mx23_olinuxino.h
> new file mode 100644
> index 0000000..8bc13ff
> --- /dev/null
> +++ b/include/configs/mx23_olinuxino.h
> @@ -0,0 +1,136 @@
> +/*
> + * Copyright (C) 2013 Marek Vasut <marex@denx.de>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +#ifndef __MX23_OLINUXINO_CONFIG_H__
> +#define __MX23_OLINUXINO_CONFIG_H__
> +
> +/*
> + * SoC configurations
> + */
> +#define        CONFIG_MX23                             /* i.MX23 SoC */
> +#define        CONFIG_MXS_GPIO                         /* GPIO control */
> +#define        CONFIG_SYS_HZ           1000            /* Ticks per second */
> +
> +/* Device-tree only boot. */
> +#define        CONFIG_MACH_TYPE        0xffffffff

Couldn't we define its real MACH_TYPE instead or just remove this line?

> +
> +#include <asm/arch/regs-base.h>
> +
> +#define        CONFIG_SYS_NO_FLASH
> +#define        CONFIG_BOARD_EARLY_INIT_F
> +#define        CONFIG_ARCH_MISC_INIT
> +
> +/*
> + * SPL
> + */
> +#define        CONFIG_SPL
> +#define        CONFIG_SPL_NO_CPU_SUPPORT_CODE
> +#define        CONFIG_SPL_START_S_PATH         "arch/arm/cpu/arm926ejs/mxs"
> +#define        CONFIG_SPL_LDSCRIPT     "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
> +#define        CONFIG_SPL_LIBCOMMON_SUPPORT
> +#define        CONFIG_SPL_LIBGENERIC_SUPPORT
> +#define        CONFIG_SPL_GPIO_SUPPORT
> +
> +/*
> + * U-Boot Commands
> + */
> +#include <config_cmd_default.h>
> +#define        CONFIG_DISPLAY_CPUINFO
> +#define        CONFIG_DOS_PARTITION
> +
> +#define        CONFIG_CMD_CACHE
> +#define        CONFIG_CMD_FAT
> +#define        CONFIG_CMD_GPIO
> +
> +/*
> + * Memory configurations
> + */
> +#define        CONFIG_NR_DRAM_BANKS            1               /* 1 bank of DRAM */
> +#define        PHYS_SDRAM_1                    0x40000000      /* Base address */
> +#define        PHYS_SDRAM_1_SIZE               0x08000000      /* Max 128 MB RAM */
> +#define        CONFIG_SYS_MALLOC_LEN           0x00400000      /* 4 MB for malloc */
> +#define        CONFIG_SYS_GBL_DATA_SIZE        128             /* Initial data */
> +#define        CONFIG_SYS_MEMTEST_START        0x40000000      /* Memtest start adr */
> +#define        CONFIG_SYS_MEMTEST_END          0x40400000      /* 4 MB RAM test */
> +#define        CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
> +/* Point initial SP in SRAM so SPL can use it too. */
> +
> +#define CONFIG_SYS_INIT_RAM_ADDR       0x00000000
> +#define CONFIG_SYS_INIT_RAM_SIZE       (128 * 1024)
> +
> +#define CONFIG_SYS_INIT_SP_OFFSET \
> +       (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
> +#define CONFIG_SYS_INIT_SP_ADDR \
> +       (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
> +/*
> + * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
> + * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
> + * binary. In case there was more of this mess, 0x100 bytes are skipped.
> + */
> +#define        CONFIG_SYS_TEXT_BASE            0x40000100
> +
> +/*
> + * U-Boot general configurations
> + */
> +#define        CONFIG_SYS_LONGHELP
> +#define        CONFIG_SYS_PROMPT       "=> "
> +#define        CONFIG_SYS_CBSIZE       1024            /* Console I/O buffer size */
> +#define        CONFIG_SYS_PBSIZE       \
> +       (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
> +                                               /* Print buffer size */
> +#define        CONFIG_SYS_MAXARGS      32              /* Max number of command args */
> +#define        CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE
> +                                               /* Boot argument buffer size */
> +#define        CONFIG_VERSION_VARIABLE                 /* U-BOOT version */
> +#define        CONFIG_AUTO_COMPLETE                    /* Command auto complete */
> +#define        CONFIG_CMDLINE_EDITING                  /* Command history etc */
> +#define        CONFIG_SYS_HUSH_PARSER
> +
> +/*
> + * Serial Driver
> + */
> +#define        CONFIG_PL011_SERIAL
> +#define        CONFIG_PL011_CLOCK              24000000
> +#define        CONFIG_PL01x_PORTS              { (void *)MXS_UARTDBG_BASE }
> +#define        CONFIG_CONS_INDEX               0
> +#define        CONFIG_BAUDRATE                 115200  /* Default baud rate */
> +
> +/*
> + * APBH DMA
> + */
> +#define CONFIG_APBH_DMA
> +
> +/*
> + * ENV -- nowhere so far
> + */
> +#define        CONFIG_ENV_SIZE                 (16 * 1024)
> +#define        CONFIG_ENV_IS_NOWHERE
> +
> +/*
> + * Boot Linux
> + */
> +#define        CONFIG_CMDLINE_TAG
> +#define        CONFIG_SETUP_MEMORY_TAGS
> +#define        CONFIG_BOOTDELAY        3
> +#define        CONFIG_BOOTFILE         "uImage"
> +#define        CONFIG_BOOTARGS         "console=ttyAM0,115200n8 "

Linux mainline uses ttyAMA0.

Thanks,

Fabio Estevam

[U-Boot] [PATCH 16/18] mxs: Add MX23 olinuxino board support

[Marek Vasut]

Dear Fabio Estevam,

> Hi Marek,
> 
> On Fri, Jan 11, 2013 at 11:19 AM, Marek Vasut <marex@denx.de> wrote:
> > This patch adds support for MX23-based Olinuxino board.
> > 
> > Signed-off-by: Marek Vasut <marex@denx.de>
> > Cc: Fabio Estevam <fabio.estevam@freescale.com>
> > Cc: Otavio Salvador <otavio@ossystems.com.br>
> > Cc: Stefano Babic <sbabic@denx.de>
> > ---
> > 
> >  board/olimex/mx23_olinuxino/Makefile         |   47 +++++++++
> >  board/olimex/mx23_olinuxino/mx23_olinuxino.c |   51 ++++++++++
> >  board/olimex/mx23_olinuxino/spl_boot.c       |   90 +++++++++++++++++
> >  boards.cfg                                   |    1 +
> >  include/configs/mx23_olinuxino.h             |  136
> >  ++++++++++++++++++++++++++
> 
> You missed an entry in MAINTAINER file.
> 
> >  5 files changed, 325 insertions(+)
> >  create mode 100644 board/olimex/mx23_olinuxino/Makefile
> 
> Can't we name it 'mx23olinuxino', without the underscore ?

No, since there'll be a13_olinuxino etc. Is there any particular reason for why 
you'd like to see this change?

Best regards,
Marek Vasut

[U-Boot] [PATCH 16/18] mxs: Add MX23 olinuxino board support

[Otavio Salvador]

On Fri, Jan 11, 2013 at 9:27 PM, Marek Vasut <marex@denx.de> wrote:
> Dear Fabio Estevam,
>
>> Hi Marek,
>>
>> On Fri, Jan 11, 2013 at 11:19 AM, Marek Vasut <marex@denx.de> wrote:
>> > This patch adds support for MX23-based Olinuxino board.
>> >
>> > Signed-off-by: Marek Vasut <marex@denx.de>
>> > Cc: Fabio Estevam <fabio.estevam@freescale.com>
>> > Cc: Otavio Salvador <otavio@ossystems.com.br>
>> > Cc: Stefano Babic <sbabic@denx.de>
>> > ---
>> >
>> >  board/olimex/mx23_olinuxino/Makefile         |   47 +++++++++
>> >  board/olimex/mx23_olinuxino/mx23_olinuxino.c |   51 ++++++++++
>> >  board/olimex/mx23_olinuxino/spl_boot.c       |   90 +++++++++++++++++
>> >  boards.cfg                                   |    1 +
>> >  include/configs/mx23_olinuxino.h             |  136
>> >  ++++++++++++++++++++++++++
>>
>> You missed an entry in MAINTAINER file.
>>
>> >  5 files changed, 325 insertions(+)
>> >  create mode 100644 board/olimex/mx23_olinuxino/Makefile
>>
>> Can't we name it 'mx23olinuxino', without the underscore ?
>
> No, since there'll be a13_olinuxino etc. Is there any particular reason for why
> you'd like to see this change?

it seems most boards dropped the underscore; we used to have mx53_loco
but now it is mx53loco so I think Fabio is right. I also prefer
without the underscore. You can have a13olinuxino later, I see no
problem with that.

--
Otavio Salvador                             O.S. Systems
E-mail: otavio at ossystems.com.br  http://www.ossystems.com.br
Mobile: +55 53 9981-7854              http://projetos.ossystems.com.br

[U-Boot] [PATCH 16/18] mxs: Add MX23 olinuxino board support

[Marek Vasut]

Dear Otavio Salvador,

> On Fri, Jan 11, 2013 at 9:27 PM, Marek Vasut <marex@denx.de> wrote:
> > Dear Fabio Estevam,
> > 
> >> Hi Marek,
> >> 
> >> On Fri, Jan 11, 2013 at 11:19 AM, Marek Vasut <marex@denx.de> wrote:
> >> > This patch adds support for MX23-based Olinuxino board.
> >> > 
> >> > Signed-off-by: Marek Vasut <marex@denx.de>
> >> > Cc: Fabio Estevam <fabio.estevam@freescale.com>
> >> > Cc: Otavio Salvador <otavio@ossystems.com.br>
> >> > Cc: Stefano Babic <sbabic@denx.de>
> >> > ---
> >> > 
> >> >  board/olimex/mx23_olinuxino/Makefile         |   47 +++++++++
> >> >  board/olimex/mx23_olinuxino/mx23_olinuxino.c |   51 ++++++++++
> >> >  board/olimex/mx23_olinuxino/spl_boot.c       |   90 +++++++++++++++++
> >> >  boards.cfg                                   |    1 +
> >> >  include/configs/mx23_olinuxino.h             |  136
> >> >  ++++++++++++++++++++++++++
> >> 
> >> You missed an entry in MAINTAINER file.
> >> 
> >> >  5 files changed, 325 insertions(+)
> >> >  create mode 100644 board/olimex/mx23_olinuxino/Makefile
> >> 
> >> Can't we name it 'mx23olinuxino', without the underscore ?
> > 
> > No, since there'll be a13_olinuxino etc. Is there any particular reason
> > for why you'd like to see this change?
> 
> it seems most boards dropped the underscore; we used to have mx53_loco
> but now it is mx53loco so I think Fabio is right. I also prefer
> without the underscore. You can have a13olinuxino later, I see no
> problem with that.

I believe it's confusing and it's a matter of taste.

Best regards,
Marek Vasut

[U-Boot] [PATCH 16/18 V2] mxs: Add MX23 olinuxino board support

[Marek Vasut]

This patch adds support for MX23-based Olinuxino board.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
---
 MAINTAINERS                                  |    1 +
 board/olimex/mx23_olinuxino/Makefile         |   47 +++++++++
 board/olimex/mx23_olinuxino/mx23_olinuxino.c |   51 ++++++++++
 board/olimex/mx23_olinuxino/spl_boot.c       |   90 +++++++++++++++++
 boards.cfg                                   |    1 +
 include/configs/mx23_olinuxino.h             |  133 ++++++++++++++++++++++++++
 6 files changed, 323 insertions(+)
 create mode 100644 board/olimex/mx23_olinuxino/Makefile
 create mode 100644 board/olimex/mx23_olinuxino/mx23_olinuxino.c
 create mode 100644 board/olimex/mx23_olinuxino/spl_boot.c
 create mode 100644 include/configs/mx23_olinuxino.h

V2: Add MAINTAINERS entry
    Remove CONFIG_MACH_TYPE (as this board is DT-only)

diff --git a/MAINTAINERS b/MAINTAINERS
index 36b47b7..08daa28 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -935,6 +935,7 @@ Marek Vasut <marek.vasut@gmail.com>
 	palmtc		xscale/pxa
 	vpac270		xscale/pxa
 	zipitz2		xscale/pxa
+	mx23_olinuxino	i.MX23
 	m28evk		i.MX28
 	sc_sps_1	i.MX28
 
diff --git a/board/olimex/mx23_olinuxino/Makefile b/board/olimex/mx23_olinuxino/Makefile
new file mode 100644
index 0000000..ff41cff
--- /dev/null
+++ b/board/olimex/mx23_olinuxino/Makefile
@@ -0,0 +1,47 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).o
+
+ifndef	CONFIG_SPL_BUILD
+COBJS	:= mx23_olinuxino.o
+else
+COBJS	:= spl_boot.o
+endif
+
+SRCS	:= $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+
+$(LIB):	$(obj).depend $(OBJS)
+	$(call cmd_link_o_target, $(OBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/olimex/mx23_olinuxino/mx23_olinuxino.c b/board/olimex/mx23_olinuxino/mx23_olinuxino.c
new file mode 100644
index 0000000..2fcad26
--- /dev/null
+++ b/board/olimex/mx23_olinuxino/mx23_olinuxino.c
@@ -0,0 +1,51 @@
+/*
+ * Olimex MX23 Olinuxino board
+ *
+ * Copyright (C) 2013 Marek Vasut <marex@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/sys_proto.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Functions
+ */
+int board_early_init_f(void)
+{
+	/* SSP clock init will come here soon. */
+	return 0;
+}
+
+int dram_init(void)
+{
+	return mxs_dram_init();
+}
+
+int board_init(void)
+{
+	/* Adress of boot parameters */
+	gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
+
+	return 0;
+}
diff --git a/board/olimex/mx23_olinuxino/spl_boot.c b/board/olimex/mx23_olinuxino/spl_boot.c
new file mode 100644
index 0000000..aaebe6c
--- /dev/null
+++ b/board/olimex/mx23_olinuxino/spl_boot.c
@@ -0,0 +1,90 @@
+/*
+ * Olimex MX23 Olinuxino Boot setup
+ *
+ * Copyright (C) 2013 Marek Vasut <marex@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <config.h>
+#include <asm/io.h>
+#include <asm/arch/iomux-mx23.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/sys_proto.h>
+
+#define	MUX_CONFIG_EMI	(MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL)
+
+const iomux_cfg_t iomux_setup[] = {
+	/* DUART */
+	MX23_PAD_PWM0__DUART_RX,
+	MX23_PAD_PWM1__DUART_TX,
+
+	/* EMI */
+	MX23_PAD_EMI_D00__EMI_D00 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D01__EMI_D01 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D02__EMI_D02 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D03__EMI_D03 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D04__EMI_D04 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D05__EMI_D05 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D06__EMI_D06 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D07__EMI_D07 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D08__EMI_D08 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D09__EMI_D09 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D10__EMI_D10 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D11__EMI_D11 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D12__EMI_D12 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D13__EMI_D13 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D14__EMI_D14 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D15__EMI_D15 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_DQM0__EMI_DQM0 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_DQM1__EMI_DQM1 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_DQS0__EMI_DQS0 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_DQS1__EMI_DQS1 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_CLK__EMI_CLK | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_CLKN__EMI_CLKN | MUX_CONFIG_EMI,
+
+	MX23_PAD_EMI_A00__EMI_A00 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_A01__EMI_A01 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_A02__EMI_A02 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_A03__EMI_A03 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_A04__EMI_A04 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_A05__EMI_A05 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_A06__EMI_A06 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_A07__EMI_A07 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_A08__EMI_A08 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_A09__EMI_A09 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_A10__EMI_A10 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_A11__EMI_A11 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_A12__EMI_A12 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_BA0__EMI_BA0 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_BA1__EMI_BA1 | MUX_CONFIG_EMI,
+
+	MX23_PAD_EMI_CASN__EMI_CASN | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_CE0N__EMI_CE0N | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_CE1N__EMI_CE1N | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_CKE__EMI_CKE | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_RASN__EMI_RASN | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_WEN__EMI_WEN | MUX_CONFIG_EMI,
+};
+
+void board_init_ll(void)
+{
+	mxs_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
+}
diff --git a/boards.cfg b/boards.cfg
index 388e4a4..ef17745 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -189,6 +189,7 @@ tx25                         arm         arm926ejs   tx25                karo
 zmx25                        arm         arm926ejs   zmx25               syteco         mx25
 imx27lite                    arm         arm926ejs   imx27lite           logicpd        mx27
 magnesium                    arm         arm926ejs   imx27lite           logicpd        mx27
+mx23_olinuxino               arm         arm926ejs   mx23_olinuxino      olimex         mxs		mx23_olinuxino
 apx4devkit                   arm         arm926ejs   apx4devkit          bluegiga       mxs		apx4devkit
 m28evk                       arm         arm926ejs   m28evk              denx           mxs		m28evk
 mx28evk                      arm         arm926ejs   mx28evk             freescale      mxs		mx28evk
diff --git a/include/configs/mx23_olinuxino.h b/include/configs/mx23_olinuxino.h
new file mode 100644
index 0000000..056436f
--- /dev/null
+++ b/include/configs/mx23_olinuxino.h
@@ -0,0 +1,133 @@
+/*
+ * Copyright (C) 2013 Marek Vasut <marex@denx.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef __MX23_OLINUXINO_CONFIG_H__
+#define __MX23_OLINUXINO_CONFIG_H__
+
+/*
+ * SoC configurations
+ */
+#define	CONFIG_MX23				/* i.MX23 SoC */
+#define	CONFIG_MXS_GPIO				/* GPIO control */
+#define	CONFIG_SYS_HZ		1000		/* Ticks per second */
+
+#include <asm/arch/regs-base.h>
+
+#define	CONFIG_SYS_NO_FLASH
+#define	CONFIG_BOARD_EARLY_INIT_F
+#define	CONFIG_ARCH_MISC_INIT
+
+/*
+ * SPL
+ */
+#define	CONFIG_SPL
+#define	CONFIG_SPL_NO_CPU_SUPPORT_CODE
+#define	CONFIG_SPL_START_S_PATH		"arch/arm/cpu/arm926ejs/mxs"
+#define	CONFIG_SPL_LDSCRIPT	"arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
+#define	CONFIG_SPL_LIBCOMMON_SUPPORT
+#define	CONFIG_SPL_LIBGENERIC_SUPPORT
+#define	CONFIG_SPL_GPIO_SUPPORT
+
+/*
+ * U-Boot Commands
+ */
+#include <config_cmd_default.h>
+#define	CONFIG_DISPLAY_CPUINFO
+#define	CONFIG_DOS_PARTITION
+
+#define	CONFIG_CMD_CACHE
+#define	CONFIG_CMD_FAT
+#define	CONFIG_CMD_GPIO
+
+/*
+ * Memory configurations
+ */
+#define	CONFIG_NR_DRAM_BANKS		1		/* 1 bank of DRAM */
+#define	PHYS_SDRAM_1			0x40000000	/* Base address */
+#define	PHYS_SDRAM_1_SIZE		0x08000000	/* Max 128 MB RAM */
+#define	CONFIG_SYS_MALLOC_LEN		0x00400000	/* 4 MB for malloc */
+#define	CONFIG_SYS_GBL_DATA_SIZE	128		/* Initial data */
+#define	CONFIG_SYS_MEMTEST_START	0x40000000	/* Memtest start adr */
+#define	CONFIG_SYS_MEMTEST_END		0x40400000	/* 4 MB RAM test */
+#define	CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+/* Point initial SP in SRAM so SPL can use it too. */
+
+#define CONFIG_SYS_INIT_RAM_ADDR	0x00000000
+#define CONFIG_SYS_INIT_RAM_SIZE	(128 * 1024)
+
+#define CONFIG_SYS_INIT_SP_OFFSET \
+	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR \
+	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+/*
+ * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
+ * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
+ * binary. In case there was more of this mess, 0x100 bytes are skipped.
+ */
+#define	CONFIG_SYS_TEXT_BASE		0x40000100
+
+/*
+ * U-Boot general configurations
+ */
+#define	CONFIG_SYS_LONGHELP
+#define	CONFIG_SYS_PROMPT	"=> "
+#define	CONFIG_SYS_CBSIZE	1024		/* Console I/O buffer size */
+#define	CONFIG_SYS_PBSIZE	\
+	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+						/* Print buffer size */
+#define	CONFIG_SYS_MAXARGS	32		/* Max number of command args */
+#define	CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
+						/* Boot argument buffer size */
+#define	CONFIG_VERSION_VARIABLE			/* U-BOOT version */
+#define	CONFIG_AUTO_COMPLETE			/* Command auto complete */
+#define	CONFIG_CMDLINE_EDITING			/* Command history etc */
+#define	CONFIG_SYS_HUSH_PARSER
+
+/*
+ * Serial Driver
+ */
+#define	CONFIG_PL011_SERIAL
+#define	CONFIG_PL011_CLOCK		24000000
+#define	CONFIG_PL01x_PORTS		{ (void *)MXS_UARTDBG_BASE }
+#define	CONFIG_CONS_INDEX		0
+#define	CONFIG_BAUDRATE			115200	/* Default baud rate */
+
+/*
+ * APBH DMA
+ */
+#define CONFIG_APBH_DMA
+
+/*
+ * ENV -- nowhere so far
+ */
+#define	CONFIG_ENV_SIZE			(16 * 1024)
+#define	CONFIG_ENV_IS_NOWHERE
+
+/*
+ * Boot Linux
+ */
+#define	CONFIG_CMDLINE_TAG
+#define	CONFIG_SETUP_MEMORY_TAGS
+#define	CONFIG_BOOTDELAY	3
+#define	CONFIG_BOOTFILE		"uImage"
+#define	CONFIG_BOOTARGS		"console=ttyAMA0,115200n8 "
+#define	CONFIG_LOADADDR		0x42000000
+#define	CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR
+#define	CONFIG_OF_LIBFDT
+
+#endif /* __MX23_OLINUXINO_CONFIG_H__ */
-- 
1.7.10.4

[U-Boot] [PATCH 16/18 V2] mxs: Add MX23 olinuxino board support

[Otavio Salvador]

On Fri, Jan 11, 2013 at 9:27 PM, Marek Vasut <marex@denx.de> wrote:
> This patch adds support for MX23-based Olinuxino board.
>
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Fabio Estevam <fabio.estevam@freescale.com>
> Cc: Otavio Salvador <otavio@ossystems.com.br>
> Cc: Stefano Babic <sbabic@denx.de>
> ---
>  MAINTAINERS                                  |    1 +
>  board/olimex/mx23_olinuxino/Makefile         |   47 +++++++++
>  board/olimex/mx23_olinuxino/mx23_olinuxino.c |   51 ++++++++++
>  board/olimex/mx23_olinuxino/spl_boot.c       |   90 +++++++++++++++++
>  boards.cfg                                   |    1 +
>  include/configs/mx23_olinuxino.h             |  133 ++++++++++++++++++++++++++
>  6 files changed, 323 insertions(+)
>  create mode 100644 board/olimex/mx23_olinuxino/Makefile
>  create mode 100644 board/olimex/mx23_olinuxino/mx23_olinuxino.c
>  create mode 100644 board/olimex/mx23_olinuxino/spl_boot.c
>  create mode 100644 include/configs/mx23_olinuxino.h
>
> V2: Add MAINTAINERS entry
>     Remove CONFIG_MACH_TYPE (as this board is DT-only)

In fact it is not DT-only; we support it in linux-imx inside of OE and
the images provided by Olinex are also based 2.6.35 so it seems better
to define the machine type.

> diff --git a/MAINTAINERS b/MAINTAINERS
> index 36b47b7..08daa28 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -935,6 +935,7 @@ Marek Vasut <marek.vasut@gmail.com>
>         palmtc          xscale/pxa
>         vpac270         xscale/pxa
>         zipitz2         xscale/pxa
> +       mx23_olinuxino  i.MX23
>         m28evk          i.MX28
>         sc_sps_1        i.MX28
>
> diff --git a/board/olimex/mx23_olinuxino/Makefile b/board/olimex/mx23_olinuxino/Makefile
> new file mode 100644
> index 0000000..ff41cff
> --- /dev/null
> +++ b/board/olimex/mx23_olinuxino/Makefile
> @@ -0,0 +1,47 @@
> +#
> +# (C) Copyright 2000-2006
> +# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
> +#
> +# See file CREDITS for list of people who contributed to this
> +# project.
> +#
> +# This program is free software; you can redistribute it and/or
> +# modify it under the terms of the GNU General Public License as
> +# published by the Free Software Foundation; either version 2 of
> +# the License, or (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> +# GNU General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public License
> +# along with this program; if not, write to the Free Software
> +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> +# MA 02111-1307 USA
> +#
> +
> +include $(TOPDIR)/config.mk
> +
> +LIB    = $(obj)lib$(BOARD).o
> +
> +ifndef CONFIG_SPL_BUILD
> +COBJS  := mx23_olinuxino.o
> +else
> +COBJS  := spl_boot.o
> +endif
> +
> +SRCS   := $(COBJS:.o=.c)
> +OBJS   := $(addprefix $(obj),$(COBJS))
> +
> +$(LIB):        $(obj).depend $(OBJS)
> +       $(call cmd_link_o_target, $(OBJS))
> +
> +#########################################################################
> +
> +# defines $(obj).depend target
> +include $(SRCTREE)/rules.mk
> +
> +sinclude $(obj).depend
> +
> +#########################################################################
> diff --git a/board/olimex/mx23_olinuxino/mx23_olinuxino.c b/board/olimex/mx23_olinuxino/mx23_olinuxino.c
> new file mode 100644
> index 0000000..2fcad26
> --- /dev/null
> +++ b/board/olimex/mx23_olinuxino/mx23_olinuxino.c
> @@ -0,0 +1,51 @@
> +/*
> + * Olimex MX23 Olinuxino board
> + *
> + * Copyright (C) 2013 Marek Vasut <marex@denx.de>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include <common.h>
> +#include <asm/arch/imx-regs.h>
> +#include <asm/arch/sys_proto.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +/*
> + * Functions
> + */
> +int board_early_init_f(void)
> +{
> +       /* SSP clock init will come here soon. */
> +       return 0;
> +}
> +
> +int dram_init(void)
> +{
> +       return mxs_dram_init();
> +}
> +
> +int board_init(void)
> +{
> +       /* Adress of boot parameters */
> +       gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
> +
> +       return 0;
> +}
> diff --git a/board/olimex/mx23_olinuxino/spl_boot.c b/board/olimex/mx23_olinuxino/spl_boot.c
> new file mode 100644
> index 0000000..aaebe6c
> --- /dev/null
> +++ b/board/olimex/mx23_olinuxino/spl_boot.c
> @@ -0,0 +1,90 @@
> +/*
> + * Olimex MX23 Olinuxino Boot setup
> + *
> + * Copyright (C) 2013 Marek Vasut <marex@denx.de>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include <common.h>
> +#include <config.h>
> +#include <asm/io.h>
> +#include <asm/arch/iomux-mx23.h>
> +#include <asm/arch/imx-regs.h>
> +#include <asm/arch/sys_proto.h>
> +
> +#define        MUX_CONFIG_EMI  (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL)
> +
> +const iomux_cfg_t iomux_setup[] = {
> +       /* DUART */
> +       MX23_PAD_PWM0__DUART_RX,
> +       MX23_PAD_PWM1__DUART_TX,
> +
> +       /* EMI */
> +       MX23_PAD_EMI_D00__EMI_D00 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_D01__EMI_D01 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_D02__EMI_D02 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_D03__EMI_D03 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_D04__EMI_D04 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_D05__EMI_D05 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_D06__EMI_D06 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_D07__EMI_D07 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_D08__EMI_D08 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_D09__EMI_D09 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_D10__EMI_D10 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_D11__EMI_D11 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_D12__EMI_D12 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_D13__EMI_D13 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_D14__EMI_D14 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_D15__EMI_D15 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_DQM0__EMI_DQM0 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_DQM1__EMI_DQM1 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_DQS0__EMI_DQS0 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_DQS1__EMI_DQS1 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_CLK__EMI_CLK | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_CLKN__EMI_CLKN | MUX_CONFIG_EMI,
> +
> +       MX23_PAD_EMI_A00__EMI_A00 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_A01__EMI_A01 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_A02__EMI_A02 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_A03__EMI_A03 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_A04__EMI_A04 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_A05__EMI_A05 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_A06__EMI_A06 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_A07__EMI_A07 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_A08__EMI_A08 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_A09__EMI_A09 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_A10__EMI_A10 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_A11__EMI_A11 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_A12__EMI_A12 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_BA0__EMI_BA0 | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_BA1__EMI_BA1 | MUX_CONFIG_EMI,
> +
> +       MX23_PAD_EMI_CASN__EMI_CASN | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_CE0N__EMI_CE0N | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_CE1N__EMI_CE1N | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_CKE__EMI_CKE | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_RASN__EMI_RASN | MUX_CONFIG_EMI,
> +       MX23_PAD_EMI_WEN__EMI_WEN | MUX_CONFIG_EMI,
> +};
> +
> +void board_init_ll(void)
> +{
> +       mxs_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
> +}
> diff --git a/boards.cfg b/boards.cfg
> index 388e4a4..ef17745 100644
> --- a/boards.cfg
> +++ b/boards.cfg
> @@ -189,6 +189,7 @@ tx25                         arm         arm926ejs   tx25                karo
>  zmx25                        arm         arm926ejs   zmx25               syteco         mx25
>  imx27lite                    arm         arm926ejs   imx27lite           logicpd        mx27
>  magnesium                    arm         arm926ejs   imx27lite           logicpd        mx27
> +mx23_olinuxino               arm         arm926ejs   mx23_olinuxino      olimex         mxs            mx23_olinuxino
>  apx4devkit                   arm         arm926ejs   apx4devkit          bluegiga       mxs            apx4devkit
>  m28evk                       arm         arm926ejs   m28evk              denx           mxs            m28evk
>  mx28evk                      arm         arm926ejs   mx28evk             freescale      mxs            mx28evk
> diff --git a/include/configs/mx23_olinuxino.h b/include/configs/mx23_olinuxino.h
> new file mode 100644
> index 0000000..056436f
> --- /dev/null
> +++ b/include/configs/mx23_olinuxino.h
> @@ -0,0 +1,133 @@
> +/*
> + * Copyright (C) 2013 Marek Vasut <marex@denx.de>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +#ifndef __MX23_OLINUXINO_CONFIG_H__
> +#define __MX23_OLINUXINO_CONFIG_H__
> +
> +/*
> + * SoC configurations
> + */
> +#define        CONFIG_MX23                             /* i.MX23 SoC */
> +#define        CONFIG_MXS_GPIO                         /* GPIO control */
> +#define        CONFIG_SYS_HZ           1000            /* Ticks per second */
> +
> +#include <asm/arch/regs-base.h>
> +
> +#define        CONFIG_SYS_NO_FLASH
> +#define        CONFIG_BOARD_EARLY_INIT_F
> +#define        CONFIG_ARCH_MISC_INIT
> +
> +/*
> + * SPL
> + */
> +#define        CONFIG_SPL
> +#define        CONFIG_SPL_NO_CPU_SUPPORT_CODE
> +#define        CONFIG_SPL_START_S_PATH         "arch/arm/cpu/arm926ejs/mxs"
> +#define        CONFIG_SPL_LDSCRIPT     "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
> +#define        CONFIG_SPL_LIBCOMMON_SUPPORT
> +#define        CONFIG_SPL_LIBGENERIC_SUPPORT
> +#define        CONFIG_SPL_GPIO_SUPPORT
> +
> +/*
> + * U-Boot Commands
> + */
> +#include <config_cmd_default.h>
> +#define        CONFIG_DISPLAY_CPUINFO
> +#define        CONFIG_DOS_PARTITION
> +
> +#define        CONFIG_CMD_CACHE
> +#define        CONFIG_CMD_FAT
> +#define        CONFIG_CMD_GPIO
> +
> +/*
> + * Memory configurations
> + */
> +#define        CONFIG_NR_DRAM_BANKS            1               /* 1 bank of DRAM */
> +#define        PHYS_SDRAM_1                    0x40000000      /* Base address */
> +#define        PHYS_SDRAM_1_SIZE               0x08000000      /* Max 128 MB RAM */
> +#define        CONFIG_SYS_MALLOC_LEN           0x00400000      /* 4 MB for malloc */
> +#define        CONFIG_SYS_GBL_DATA_SIZE        128             /* Initial data */
> +#define        CONFIG_SYS_MEMTEST_START        0x40000000      /* Memtest start adr */
> +#define        CONFIG_SYS_MEMTEST_END          0x40400000      /* 4 MB RAM test */
> +#define        CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
> +/* Point initial SP in SRAM so SPL can use it too. */
> +
> +#define CONFIG_SYS_INIT_RAM_ADDR       0x00000000
> +#define CONFIG_SYS_INIT_RAM_SIZE       (128 * 1024)
> +
> +#define CONFIG_SYS_INIT_SP_OFFSET \
> +       (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
> +#define CONFIG_SYS_INIT_SP_ADDR \
> +       (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
> +/*
> + * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
> + * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
> + * binary. In case there was more of this mess, 0x100 bytes are skipped.
> + */
> +#define        CONFIG_SYS_TEXT_BASE            0x40000100
> +
> +/*
> + * U-Boot general configurations
> + */
> +#define        CONFIG_SYS_LONGHELP
> +#define        CONFIG_SYS_PROMPT       "=> "
> +#define        CONFIG_SYS_CBSIZE       1024            /* Console I/O buffer size */

The  SYS_CBSIZE might be smaller I think; we use 256 in sabresd and
others which have a much bigger environment so I think it could be
reduced.

> +#define        CONFIG_SYS_PBSIZE       \
> +       (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
> +                                               /* Print buffer size */
> +#define        CONFIG_SYS_MAXARGS      32              /* Max number of command args */
> +#define        CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE
> +                                               /* Boot argument buffer size */
> +#define        CONFIG_VERSION_VARIABLE                 /* U-BOOT version */
> +#define        CONFIG_AUTO_COMPLETE                    /* Command auto complete */
> +#define        CONFIG_CMDLINE_EDITING                  /* Command history etc */
> +#define        CONFIG_SYS_HUSH_PARSER
> +
> +/*
> + * Serial Driver
> + */
> +#define        CONFIG_PL011_SERIAL
> +#define        CONFIG_PL011_CLOCK              24000000
> +#define        CONFIG_PL01x_PORTS              { (void *)MXS_UARTDBG_BASE }
> +#define        CONFIG_CONS_INDEX               0
> +#define        CONFIG_BAUDRATE                 115200  /* Default baud rate */
> +
> +/*
> + * APBH DMA
> + */
> +#define CONFIG_APBH_DMA
> +
> +/*
> + * ENV -- nowhere so far
> + */
> +#define        CONFIG_ENV_SIZE                 (16 * 1024)
> +#define        CONFIG_ENV_IS_NOWHERE
> +
> +/*
> + * Boot Linux
> + */
> +#define        CONFIG_CMDLINE_TAG
> +#define        CONFIG_SETUP_MEMORY_TAGS
> +#define        CONFIG_BOOTDELAY        3
> +#define        CONFIG_BOOTFILE         "uImage"
> +#define        CONFIG_BOOTARGS         "console=ttyAMA0,115200n8 "
> +#define        CONFIG_LOADADDR         0x42000000
> +#define        CONFIG_SYS_LOAD_ADDR    CONFIG_LOADADDR
> +#define        CONFIG_OF_LIBFDT
> +
> +#endif /* __MX23_OLINUXINO_CONFIG_H__ */
> --
> 1.7.10.4
>



--
Otavio Salvador                             O.S. Systems
E-mail: otavio at ossystems.com.br  http://www.ossystems.com.br
Mobile: +55 53 9981-7854              http://projetos.ossystems.com.br

[U-Boot] [PATCH 16/18 V2] mxs: Add MX23 olinuxino board support

[Marek Vasut]

Dear Otavio Salvador,

> On Fri, Jan 11, 2013 at 9:27 PM, Marek Vasut <marex@denx.de> wrote:
> > This patch adds support for MX23-based Olinuxino board.
> > 
> > Signed-off-by: Marek Vasut <marex@denx.de>
> > Cc: Fabio Estevam <fabio.estevam@freescale.com>
> > Cc: Otavio Salvador <otavio@ossystems.com.br>
> > Cc: Stefano Babic <sbabic@denx.de>
> > ---
> > 
> >  MAINTAINERS                                  |    1 +
> >  board/olimex/mx23_olinuxino/Makefile         |   47 +++++++++
> >  board/olimex/mx23_olinuxino/mx23_olinuxino.c |   51 ++++++++++
> >  board/olimex/mx23_olinuxino/spl_boot.c       |   90 +++++++++++++++++
> >  boards.cfg                                   |    1 +
> >  include/configs/mx23_olinuxino.h             |  133
> >  ++++++++++++++++++++++++++ 6 files changed, 323 insertions(+)
> >  create mode 100644 board/olimex/mx23_olinuxino/Makefile
> >  create mode 100644 board/olimex/mx23_olinuxino/mx23_olinuxino.c
> >  create mode 100644 board/olimex/mx23_olinuxino/spl_boot.c
> >  create mode 100644 include/configs/mx23_olinuxino.h
> > 
> > V2: Add MAINTAINERS entry
> > 
> >     Remove CONFIG_MACH_TYPE (as this board is DT-only)
> 
> In fact it is not DT-only; we support it in linux-imx inside of OE and
> the images provided by Olinex are also based 2.6.35 so it seems better
> to define the machine type.

Can be added in a subsequent patch.
[...]

> > +/*
> > + * U-Boot general configurations
> > + */
> > +#define        CONFIG_SYS_LONGHELP
> > +#define        CONFIG_SYS_PROMPT       "=> "
> > +#define        CONFIG_SYS_CBSIZE       1024            /* Console I/O
> > buffer size */
> 
> The  SYS_CBSIZE might be smaller I think; we use 256 in sabresd and
> others which have a much bigger environment so I think it could be
> reduced.

Can you elaborate what issues this causes please?

[U-Boot] [PATCH 16/18 V2] mxs: Add MX23 olinuxino board support

[Otavio Salvador]

On Sat, Jan 12, 2013 at 2:16 PM, Marek Vasut <marex@denx.de> wrote:
> Dear Otavio Salvador,
>
>> On Fri, Jan 11, 2013 at 9:27 PM, Marek Vasut <marex@denx.de> wrote:
>> > This patch adds support for MX23-based Olinuxino board.
>> >
>> > Signed-off-by: Marek Vasut <marex@denx.de>
>> > Cc: Fabio Estevam <fabio.estevam@freescale.com>
>> > Cc: Otavio Salvador <otavio@ossystems.com.br>
>> > Cc: Stefano Babic <sbabic@denx.de>
>> > ---
>> >
>> >  MAINTAINERS                                  |    1 +
>> >  board/olimex/mx23_olinuxino/Makefile         |   47 +++++++++
>> >  board/olimex/mx23_olinuxino/mx23_olinuxino.c |   51 ++++++++++
>> >  board/olimex/mx23_olinuxino/spl_boot.c       |   90 +++++++++++++++++
>> >  boards.cfg                                   |    1 +
>> >  include/configs/mx23_olinuxino.h             |  133
>> >  ++++++++++++++++++++++++++ 6 files changed, 323 insertions(+)
>> >  create mode 100644 board/olimex/mx23_olinuxino/Makefile
>> >  create mode 100644 board/olimex/mx23_olinuxino/mx23_olinuxino.c
>> >  create mode 100644 board/olimex/mx23_olinuxino/spl_boot.c
>> >  create mode 100644 include/configs/mx23_olinuxino.h
>> >
>> > V2: Add MAINTAINERS entry
>> >
>> >     Remove CONFIG_MACH_TYPE (as this board is DT-only)
>>
>> In fact it is not DT-only; we support it in linux-imx inside of OE and
>> the images provided by Olinex are also based 2.6.35 so it seems better
>> to define the machine type.
>
> Can be added in a subsequent patch.
> [...]

I don't think it is the way to go for several reasons, mainly:

 * your v1 had this support
 * all sdcards provided by olimex use 2.6.35 kernel (until now)
 * the FSL supported kernel is non-DT

So I see no reason to not fix the patch, seriously.

>> > +/*
>> > + * U-Boot general configurations
>> > + */
>> > +#define        CONFIG_SYS_LONGHELP
>> > +#define        CONFIG_SYS_PROMPT       "=> "
>> > +#define        CONFIG_SYS_CBSIZE       1024            /* Console I/O
>> > buffer size */
>>
>> The  SYS_CBSIZE might be smaller I think; we use 256 in sabresd and
>> others which have a much bigger environment so I think it could be
>> reduced.
>
> Can you elaborate what issues this causes please?

It causes nothing except more memory allocation than need. As other
bords work fine with less it seems a good option to move to a smaller
value. Just it.

--
Otavio Salvador                             O.S. Systems
E-mail: otavio at ossystems.com.br  http://www.ossystems.com.br
Mobile: +55 53 9981-7854              http://projetos.ossystems.com.br

[U-Boot] [PATCH 16/18 V2] mxs: Add MX23 olinuxino board support

[Marek Vasut]

Dear Otavio Salvador,

> On Sat, Jan 12, 2013 at 2:16 PM, Marek Vasut <marex@denx.de> wrote:
> > Dear Otavio Salvador,
> > 
> >> On Fri, Jan 11, 2013 at 9:27 PM, Marek Vasut <marex@denx.de> wrote:
> >> > This patch adds support for MX23-based Olinuxino board.
> >> > 
> >> > Signed-off-by: Marek Vasut <marex@denx.de>
> >> > Cc: Fabio Estevam <fabio.estevam@freescale.com>
> >> > Cc: Otavio Salvador <otavio@ossystems.com.br>
> >> > Cc: Stefano Babic <sbabic@denx.de>
> >> > ---
> >> > 
> >> >  MAINTAINERS                                  |    1 +
> >> >  board/olimex/mx23_olinuxino/Makefile         |   47 +++++++++
> >> >  board/olimex/mx23_olinuxino/mx23_olinuxino.c |   51 ++++++++++
> >> >  board/olimex/mx23_olinuxino/spl_boot.c       |   90 +++++++++++++++++
> >> >  boards.cfg                                   |    1 +
> >> >  include/configs/mx23_olinuxino.h             |  133
> >> >  ++++++++++++++++++++++++++ 6 files changed, 323 insertions(+)
> >> >  create mode 100644 board/olimex/mx23_olinuxino/Makefile
> >> >  create mode 100644 board/olimex/mx23_olinuxino/mx23_olinuxino.c
> >> >  create mode 100644 board/olimex/mx23_olinuxino/spl_boot.c
> >> >  create mode 100644 include/configs/mx23_olinuxino.h
> >> > 
> >> > V2: Add MAINTAINERS entry
> >> > 
> >> >     Remove CONFIG_MACH_TYPE (as this board is DT-only)
> >> 
> >> In fact it is not DT-only; we support it in linux-imx inside of OE and
> >> the images provided by Olinex are also based 2.6.35 so it seems better
> >> to define the machine type.
> > 
> > Can be added in a subsequent patch.
> > [...]
> 
> I don't think it is the way to go for several reasons, mainly:
> 
>  * your v1 had this support

0xffffffff is DT boot ID really.

>  * all sdcards provided by olimex use 2.6.35 kernel (until now)
>  * the FSL supported kernel is non-DT
> 
> So I see no reason to not fix the patch, seriously.

Can you provide pointer to olinuxino machine entry in RMK's ID database then 
please?

> >> > +/*
> >> > + * U-Boot general configurations
> >> > + */
> >> > +#define        CONFIG_SYS_LONGHELP
> >> > +#define        CONFIG_SYS_PROMPT       "=> "
> >> > +#define        CONFIG_SYS_CBSIZE       1024            /* Console I/O
> >> > buffer size */
> >> 
> >> The  SYS_CBSIZE might be smaller I think; we use 256 in sabresd and
> >> others which have a much bigger environment so I think it could be
> >> reduced.
> > 
> > Can you elaborate what issues this causes please?
> 
> It causes nothing except more memory allocation than need. As other
> bords work fine with less it seems a good option to move to a smaller
> value. Just it.

It reduces the size of console buffer, right?

Best regards,
Marek Vasut

[U-Boot] [PATCH 16/18 V2] mxs: Add MX23 olinuxino board support

[Otavio Salvador]

On Sat, Jan 12, 2013 at 2:52 PM, Marek Vasut <marex@denx.de> wrote:
> Dear Otavio Salvador,
>
>> On Sat, Jan 12, 2013 at 2:16 PM, Marek Vasut <marex@denx.de> wrote:
>> > Dear Otavio Salvador,
>> >
>> >> On Fri, Jan 11, 2013 at 9:27 PM, Marek Vasut <marex@denx.de> wrote:
>> >> > This patch adds support for MX23-based Olinuxino board.
>> >> >
>> >> > Signed-off-by: Marek Vasut <marex@denx.de>
>> >> > Cc: Fabio Estevam <fabio.estevam@freescale.com>
>> >> > Cc: Otavio Salvador <otavio@ossystems.com.br>
>> >> > Cc: Stefano Babic <sbabic@denx.de>
>> >> > ---
>> >> >
>> >> >  MAINTAINERS                                  |    1 +
>> >> >  board/olimex/mx23_olinuxino/Makefile         |   47 +++++++++
>> >> >  board/olimex/mx23_olinuxino/mx23_olinuxino.c |   51 ++++++++++
>> >> >  board/olimex/mx23_olinuxino/spl_boot.c       |   90 +++++++++++++++++
>> >> >  boards.cfg                                   |    1 +
>> >> >  include/configs/mx23_olinuxino.h             |  133
>> >> >  ++++++++++++++++++++++++++ 6 files changed, 323 insertions(+)
>> >> >  create mode 100644 board/olimex/mx23_olinuxino/Makefile
>> >> >  create mode 100644 board/olimex/mx23_olinuxino/mx23_olinuxino.c
>> >> >  create mode 100644 board/olimex/mx23_olinuxino/spl_boot.c
>> >> >  create mode 100644 include/configs/mx23_olinuxino.h
>> >> >
>> >> > V2: Add MAINTAINERS entry
>> >> >
>> >> >     Remove CONFIG_MACH_TYPE (as this board is DT-only)
>> >>
>> >> In fact it is not DT-only; we support it in linux-imx inside of OE and
>> >> the images provided by Olinex are also based 2.6.35 so it seems better
>> >> to define the machine type.
>> >
>> > Can be added in a subsequent patch.
>> > [...]
>>
>> I don't think it is the way to go for several reasons, mainly:
>>
>>  * your v1 had this support
>
> 0xffffffff is DT boot ID really.
>
>>  * all sdcards provided by olimex use 2.6.35 kernel (until now)
>>  * the FSL supported kernel is non-DT
>>
>> So I see no reason to not fix the patch, seriously.
>
> Can you provide pointer to olinuxino machine entry in RMK's ID database then
> please?

+imx233_olinuxino MACH_IMX233_OLINUXINO IMX233_OLINUXINO 4105

This is from the board patch.

>> >> > +/*
>> >> > + * U-Boot general configurations
>> >> > + */
>> >> > +#define        CONFIG_SYS_LONGHELP
>> >> > +#define        CONFIG_SYS_PROMPT       "=> "
>> >> > +#define        CONFIG_SYS_CBSIZE       1024            /* Console I/O
>> >> > buffer size */
>> >>
>> >> The  SYS_CBSIZE might be smaller I think; we use 256 in sabresd and
>> >> others which have a much bigger environment so I think it could be
>> >> reduced.
>> >
>> > Can you elaborate what issues this causes please?
>>
>> It causes nothing except more memory allocation than need. As other
>> bords work fine with less it seems a good option to move to a smaller
>> value. Just it.
>
> It reduces the size of console buffer, right?

AFAIK yes.

--
Otavio Salvador                             O.S. Systems
E-mail: otavio at ossystems.com.br  http://www.ossystems.com.br
Mobile: +55 53 9981-7854              http://projetos.ossystems.com.br

[U-Boot] [PATCH 16/18 V3] mxs: Add MX23 olinuxino board support

[Marek Vasut]

This patch adds support for MX23-based Olinuxino board.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
---
 MAINTAINERS                                  |    1 +
 board/olimex/mx23_olinuxino/Makefile         |   47 +++++++++
 board/olimex/mx23_olinuxino/mx23_olinuxino.c |   51 ++++++++++
 board/olimex/mx23_olinuxino/spl_boot.c       |   90 +++++++++++++++++
 boards.cfg                                   |    1 +
 include/configs/mx23_olinuxino.h             |  135 ++++++++++++++++++++++++++
 6 files changed, 325 insertions(+)
 create mode 100644 board/olimex/mx23_olinuxino/Makefile
 create mode 100644 board/olimex/mx23_olinuxino/mx23_olinuxino.c
 create mode 100644 board/olimex/mx23_olinuxino/spl_boot.c
 create mode 100644 include/configs/mx23_olinuxino.h

V2: Add MAINTAINERS entry
    Remove CONFIG_MACH_TYPE (as this board is DT-only)

V3: Re-add CONFIG_MACH_TYPE

diff --git a/MAINTAINERS b/MAINTAINERS
index 36b47b7..08daa28 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -935,6 +935,7 @@ Marek Vasut <marek.vasut@gmail.com>
 	palmtc		xscale/pxa
 	vpac270		xscale/pxa
 	zipitz2		xscale/pxa
+	mx23_olinuxino	i.MX23
 	m28evk		i.MX28
 	sc_sps_1	i.MX28
 
diff --git a/board/olimex/mx23_olinuxino/Makefile b/board/olimex/mx23_olinuxino/Makefile
new file mode 100644
index 0000000..ff41cff
--- /dev/null
+++ b/board/olimex/mx23_olinuxino/Makefile
@@ -0,0 +1,47 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).o
+
+ifndef	CONFIG_SPL_BUILD
+COBJS	:= mx23_olinuxino.o
+else
+COBJS	:= spl_boot.o
+endif
+
+SRCS	:= $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+
+$(LIB):	$(obj).depend $(OBJS)
+	$(call cmd_link_o_target, $(OBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/olimex/mx23_olinuxino/mx23_olinuxino.c b/board/olimex/mx23_olinuxino/mx23_olinuxino.c
new file mode 100644
index 0000000..2fcad26
--- /dev/null
+++ b/board/olimex/mx23_olinuxino/mx23_olinuxino.c
@@ -0,0 +1,51 @@
+/*
+ * Olimex MX23 Olinuxino board
+ *
+ * Copyright (C) 2013 Marek Vasut <marex@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/sys_proto.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Functions
+ */
+int board_early_init_f(void)
+{
+	/* SSP clock init will come here soon. */
+	return 0;
+}
+
+int dram_init(void)
+{
+	return mxs_dram_init();
+}
+
+int board_init(void)
+{
+	/* Adress of boot parameters */
+	gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
+
+	return 0;
+}
diff --git a/board/olimex/mx23_olinuxino/spl_boot.c b/board/olimex/mx23_olinuxino/spl_boot.c
new file mode 100644
index 0000000..aaebe6c
--- /dev/null
+++ b/board/olimex/mx23_olinuxino/spl_boot.c
@@ -0,0 +1,90 @@
+/*
+ * Olimex MX23 Olinuxino Boot setup
+ *
+ * Copyright (C) 2013 Marek Vasut <marex@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <config.h>
+#include <asm/io.h>
+#include <asm/arch/iomux-mx23.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/sys_proto.h>
+
+#define	MUX_CONFIG_EMI	(MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL)
+
+const iomux_cfg_t iomux_setup[] = {
+	/* DUART */
+	MX23_PAD_PWM0__DUART_RX,
+	MX23_PAD_PWM1__DUART_TX,
+
+	/* EMI */
+	MX23_PAD_EMI_D00__EMI_D00 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D01__EMI_D01 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D02__EMI_D02 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D03__EMI_D03 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D04__EMI_D04 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D05__EMI_D05 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D06__EMI_D06 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D07__EMI_D07 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D08__EMI_D08 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D09__EMI_D09 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D10__EMI_D10 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D11__EMI_D11 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D12__EMI_D12 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D13__EMI_D13 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D14__EMI_D14 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_D15__EMI_D15 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_DQM0__EMI_DQM0 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_DQM1__EMI_DQM1 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_DQS0__EMI_DQS0 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_DQS1__EMI_DQS1 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_CLK__EMI_CLK | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_CLKN__EMI_CLKN | MUX_CONFIG_EMI,
+
+	MX23_PAD_EMI_A00__EMI_A00 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_A01__EMI_A01 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_A02__EMI_A02 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_A03__EMI_A03 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_A04__EMI_A04 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_A05__EMI_A05 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_A06__EMI_A06 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_A07__EMI_A07 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_A08__EMI_A08 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_A09__EMI_A09 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_A10__EMI_A10 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_A11__EMI_A11 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_A12__EMI_A12 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_BA0__EMI_BA0 | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_BA1__EMI_BA1 | MUX_CONFIG_EMI,
+
+	MX23_PAD_EMI_CASN__EMI_CASN | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_CE0N__EMI_CE0N | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_CE1N__EMI_CE1N | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_CKE__EMI_CKE | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_RASN__EMI_RASN | MUX_CONFIG_EMI,
+	MX23_PAD_EMI_WEN__EMI_WEN | MUX_CONFIG_EMI,
+};
+
+void board_init_ll(void)
+{
+	mxs_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
+}
diff --git a/boards.cfg b/boards.cfg
index 388e4a4..ef17745 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -189,6 +189,7 @@ tx25                         arm         arm926ejs   tx25                karo
 zmx25                        arm         arm926ejs   zmx25               syteco         mx25
 imx27lite                    arm         arm926ejs   imx27lite           logicpd        mx27
 magnesium                    arm         arm926ejs   imx27lite           logicpd        mx27
+mx23_olinuxino               arm         arm926ejs   mx23_olinuxino      olimex         mxs		mx23_olinuxino
 apx4devkit                   arm         arm926ejs   apx4devkit          bluegiga       mxs		apx4devkit
 m28evk                       arm         arm926ejs   m28evk              denx           mxs		m28evk
 mx28evk                      arm         arm926ejs   mx28evk             freescale      mxs		mx28evk
diff --git a/include/configs/mx23_olinuxino.h b/include/configs/mx23_olinuxino.h
new file mode 100644
index 0000000..e5e718c
--- /dev/null
+++ b/include/configs/mx23_olinuxino.h
@@ -0,0 +1,135 @@
+/*
+ * Copyright (C) 2013 Marek Vasut <marex@denx.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef __MX23_OLINUXINO_CONFIG_H__
+#define __MX23_OLINUXINO_CONFIG_H__
+
+/*
+ * SoC configurations
+ */
+#define	CONFIG_MX23				/* i.MX23 SoC */
+#define	CONFIG_MXS_GPIO				/* GPIO control */
+#define	CONFIG_SYS_HZ		1000		/* Ticks per second */
+
+#define	CONFIG_MACH_TYPE	4105
+
+#include <asm/arch/regs-base.h>
+
+#define	CONFIG_SYS_NO_FLASH
+#define	CONFIG_BOARD_EARLY_INIT_F
+#define	CONFIG_ARCH_MISC_INIT
+
+/*
+ * SPL
+ */
+#define	CONFIG_SPL
+#define	CONFIG_SPL_NO_CPU_SUPPORT_CODE
+#define	CONFIG_SPL_START_S_PATH		"arch/arm/cpu/arm926ejs/mxs"
+#define	CONFIG_SPL_LDSCRIPT	"arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
+#define	CONFIG_SPL_LIBCOMMON_SUPPORT
+#define	CONFIG_SPL_LIBGENERIC_SUPPORT
+#define	CONFIG_SPL_GPIO_SUPPORT
+
+/*
+ * U-Boot Commands
+ */
+#include <config_cmd_default.h>
+#define	CONFIG_DISPLAY_CPUINFO
+#define	CONFIG_DOS_PARTITION
+
+#define	CONFIG_CMD_CACHE
+#define	CONFIG_CMD_FAT
+#define	CONFIG_CMD_GPIO
+
+/*
+ * Memory configurations
+ */
+#define	CONFIG_NR_DRAM_BANKS		1		/* 1 bank of DRAM */
+#define	PHYS_SDRAM_1			0x40000000	/* Base address */
+#define	PHYS_SDRAM_1_SIZE		0x08000000	/* Max 128 MB RAM */
+#define	CONFIG_SYS_MALLOC_LEN		0x00400000	/* 4 MB for malloc */
+#define	CONFIG_SYS_GBL_DATA_SIZE	128		/* Initial data */
+#define	CONFIG_SYS_MEMTEST_START	0x40000000	/* Memtest start adr */
+#define	CONFIG_SYS_MEMTEST_END		0x40400000	/* 4 MB RAM test */
+#define	CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+/* Point initial SP in SRAM so SPL can use it too. */
+
+#define CONFIG_SYS_INIT_RAM_ADDR	0x00000000
+#define CONFIG_SYS_INIT_RAM_SIZE	(128 * 1024)
+
+#define CONFIG_SYS_INIT_SP_OFFSET \
+	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR \
+	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+/*
+ * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
+ * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
+ * binary. In case there was more of this mess, 0x100 bytes are skipped.
+ */
+#define	CONFIG_SYS_TEXT_BASE		0x40000100
+
+/*
+ * U-Boot general configurations
+ */
+#define	CONFIG_SYS_LONGHELP
+#define	CONFIG_SYS_PROMPT	"=> "
+#define	CONFIG_SYS_CBSIZE	1024		/* Console I/O buffer size */
+#define	CONFIG_SYS_PBSIZE	\
+	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+						/* Print buffer size */
+#define	CONFIG_SYS_MAXARGS	32		/* Max number of command args */
+#define	CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
+						/* Boot argument buffer size */
+#define	CONFIG_VERSION_VARIABLE			/* U-BOOT version */
+#define	CONFIG_AUTO_COMPLETE			/* Command auto complete */
+#define	CONFIG_CMDLINE_EDITING			/* Command history etc */
+#define	CONFIG_SYS_HUSH_PARSER
+
+/*
+ * Serial Driver
+ */
+#define	CONFIG_PL011_SERIAL
+#define	CONFIG_PL011_CLOCK		24000000
+#define	CONFIG_PL01x_PORTS		{ (void *)MXS_UARTDBG_BASE }
+#define	CONFIG_CONS_INDEX		0
+#define	CONFIG_BAUDRATE			115200	/* Default baud rate */
+
+/*
+ * APBH DMA
+ */
+#define CONFIG_APBH_DMA
+
+/*
+ * ENV -- nowhere so far
+ */
+#define	CONFIG_ENV_SIZE			(16 * 1024)
+#define	CONFIG_ENV_IS_NOWHERE
+
+/*
+ * Boot Linux
+ */
+#define	CONFIG_CMDLINE_TAG
+#define	CONFIG_SETUP_MEMORY_TAGS
+#define	CONFIG_BOOTDELAY	3
+#define	CONFIG_BOOTFILE		"uImage"
+#define	CONFIG_BOOTARGS		"console=ttyAMA0,115200n8 "
+#define	CONFIG_LOADADDR		0x42000000
+#define	CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR
+#define	CONFIG_OF_LIBFDT
+
+#endif /* __MX23_OLINUXINO_CONFIG_H__ */
-- 
1.7.10.4

[U-Boot] [PATCH 17/18] mxs: Add function to ungate the power block on MX23

[Marek Vasut]

The power block on MX23 must first be ungated before it can be operated.
Add function to MXS power init that ungates it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
---
 arch/arm/cpu/arm926ejs/mxs/spl_power_init.c |   12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
index be44c22..e9d6302 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
@@ -881,11 +881,23 @@ static void mxs_setup_batt_detect(void)
 	early_delay(10);
 }
 
+static void mxs_ungate_power(void)
+{
+#ifdef CONFIG_MX23
+	struct mxs_power_regs *power_regs =
+		(struct mxs_power_regs *)MXS_POWER_BASE;
+
+	writel(POWER_CTRL_CLKGATE, &power_regs->hw_power_ctrl_clr);
+#endif
+}
+
 void mxs_power_init(void)
 {
 	struct mxs_power_regs *power_regs =
 		(struct mxs_power_regs *)MXS_POWER_BASE;
 
+	mxs_ungate_power();
+
 	mxs_power_clock2xtal();
 	mxs_power_clear_auto_restart();
 	mxs_power_set_linreg();
-- 
1.7.10.4

[U-Boot] [PATCH 18/18] mxs: Fix the memory init for MX23

[Marek Vasut]

From: Otavio Salvador <otavio@ossystems.com.br>

The memory init is slightly different on MX23, thus split the memory
init for mx23 and mx28 into different functions.

Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
---
 arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c |   93 ++++++++++++++++++++++++-----
 1 file changed, 78 insertions(+), 15 deletions(-)

diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
index 9d05f83..5944dd2 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
@@ -128,13 +128,20 @@ static void mxs_mem_init_clock(void)
 {
 	struct mxs_clkctrl_regs *clkctrl_regs =
 		(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
+#if defined(CONFIG_MX23)
+	/* Fractional divider for ref_emi is 33 ; 480 * 18 / 33 = 266MHz */
+	const unsigned char divider = 33;
+#elif defined(CONFIG_MX28)
+	/* Fractional divider for ref_emi is 21 ; 480 * 18 / 21 = 411MHz */
+	const unsigned char divider = 21;
+#endif
 
 	/* Gate EMI clock */
 	writeb(CLKCTRL_FRAC_CLKGATE,
 		&clkctrl_regs->hw_clkctrl_frac0_set[CLKCTRL_FRAC0_EMI]);
 
-	/* Set fractional divider for ref_emi to 480 * 18 / 21 = 411MHz */
-	writeb(CLKCTRL_FRAC_CLKGATE | (21 & CLKCTRL_FRAC_FRAC_MASK),
+	/* Set fractional divider for ref_emi */
+	writeb(CLKCTRL_FRAC_CLKGATE | (divider & CLKCTRL_FRAC_FRAC_MASK),
 		&clkctrl_regs->hw_clkctrl_frac0[CLKCTRL_FRAC0_EMI]);
 
 	/* Ungate EMI clock */
@@ -217,10 +224,60 @@ uint32_t mxs_mem_get_size(void)
 	return sz;
 }
 
-void mxs_mem_init(void)
+#ifdef CONFIG_MX23
+static void mx23_mem_setup_vddmem(void)
+{
+	struct mxs_power_regs *power_regs =
+		(struct mxs_power_regs *)MXS_POWER_BASE;
+
+	writel((0x10 << POWER_VDDMEMCTRL_TRG_OFFSET) |
+		POWER_VDDMEMCTRL_ENABLE_ILIMIT |
+		POWER_VDDMEMCTRL_ENABLE_LINREG |
+		POWER_VDDMEMCTRL_PULLDOWN_ACTIVE,
+		&power_regs->hw_power_vddmemctrl);
+
+	early_delay(10000);
+
+	writel((0x10 << POWER_VDDMEMCTRL_TRG_OFFSET) |
+		POWER_VDDMEMCTRL_ENABLE_LINREG,
+		&power_regs->hw_power_vddmemctrl);
+}
+
+static void mx23_mem_init(void)
+{
+	mx23_mem_setup_vddmem();
+
+	/*
+	 * Configure the DRAM registers
+	 */
+
+	/* Clear START and SREFRESH bit from DRAM_CTL8 */
+	clrbits_le32(MXS_DRAM_BASE + 0x20, (1 << 16) | (1 << 8));
+
+	initialize_dram_values();
+
+	/* Set START bit in DRAM_CTL16 */
+	setbits_le32(MXS_DRAM_BASE + 0x20, 1 << 16);
+
+	clrbits_le32(MXS_DRAM_BASE + 0x40, 1 << 17);
+	early_delay(20000);
+
+	/* Adjust EMI port priority. */
+	clrsetbits_le32(0x80020000, 0x1f << 16, 0x8);
+	early_delay(20000);
+
+	setbits_le32(MXS_DRAM_BASE + 0x40, 1 << 19);
+	setbits_le32(MXS_DRAM_BASE + 0x40, 1 << 11);
+
+	/* Wait for bit 10 (DRAM init complete) in DRAM_CTL18 */
+	while (!(readl(MXS_DRAM_BASE + 0x48) & (1 << 10)))
+		;
+}
+#endif
+
+#ifdef CONFIG_MX28
+static void mx28_mem_init(void)
 {
-	struct mxs_clkctrl_regs *clkctrl_regs =
-		(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
 	struct mxs_pinctrl_regs *pinctrl_regs =
 		(struct mxs_pinctrl_regs *)MXS_PINCTRL_BASE;
 
@@ -228,16 +285,6 @@ void mxs_mem_init(void)
 	writel(PINCTRL_EMI_DS_CTRL_DDR_MODE_DDR2,
 		&pinctrl_regs->hw_pinctrl_emi_ds_ctrl_set);
 
-	/* Power up PLL0 */
-	writel(CLKCTRL_PLL0CTRL0_POWER,
-		&clkctrl_regs->hw_clkctrl_pll0ctrl0_set);
-
-	early_delay(11000);
-
-	mxs_mem_init_clock();
-
-	mxs_mem_setup_vdda();
-
 	/*
 	 * Configure the DRAM registers
 	 */
@@ -256,6 +303,22 @@ void mxs_mem_init(void)
 	/* Wait for bit 20 (DRAM init complete) in DRAM_CTL58 */
 	while (!(readl(MXS_DRAM_BASE + 0xe8) & (1 << 20)))
 		;
+}
+#endif
+
+void mxs_mem_init(void)
+{
+	early_delay(11000);
+
+	mxs_mem_init_clock();
+
+	mxs_mem_setup_vdda();
+
+#if defined(CONFIG_MX23)
+	mx23_mem_init();
+#elif defined(CONFIG_MX28)
+	mx28_mem_init();
+#endif
 
 	early_delay(10000);
 
-- 
1.7.10.4

[U-Boot] [PATCH 01/18] mxs: mmc: Drop unused members from struct mxsmmc_priv

[Stefano Babic]

On 11/01/2013 14:19, Marek Vasut wrote:
> The clock data are not used by the driver, drop them.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Andy Fleming <afleming@freescale.com>
> Cc: Fabio Estevam <fabio.estevam@freescale.com>
> Cc: Stefano Babic <sbabic@denx.de>
> ---

Whole series applied to u-boot-imx, thanks.

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================