From mboxrd@z Thu Jan  1 00:00:00 1970
From: Marek Vasut <marex@denx.de>
Date: Wed, 30 Jan 2013 15:10:59 +0100
Subject: [U-Boot] [PATCH 02/10] mx23: Document the tRAS lockout setting
	in memory initialization
In-Reply-To: <1359548001-14278-3-git-send-email-otavio@ossystems.com.br>
References: <1359548001-14278-1-git-send-email-otavio@ossystems.com.br>
	<1359548001-14278-3-git-send-email-otavio@ossystems.com.br>
Message-ID: <201301301510.59940.marex@denx.de>
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To: u-boot@lists.denx.de

Dear Otavio Salvador,

> Add a comment about the tRAS lockout setting of HW_DRAM_CTL08 to
> enable the 'Fast Auto Pre-Charge' found in the memory chip. The
> setting is applied after memory initialization and it is worth
> document it.
> 
> Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
> ---
>  arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
> b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c index f8392f6..37b50e9 100644
> --- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
> +++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
> @@ -119,6 +119,7 @@ static void initialize_dram_values(void)
>  		writel(dram_vals[i], MXS_DRAM_BASE + (4 * i));
> 
>  #ifdef CONFIG_MX23
> +	/* Enable tRAS lockout in HW_DRAM_CTL08 */

This does not explain why it must be here and not in the dram_vals table. It 
would be nice to explain it here, since it'd prevent others from sending patch 
stuffing it into the dram_vals table without knowing it must definitelly be 
here.

But why does it have to be here? I wonder ...

>  	writel((1 << 24), MXS_DRAM_BASE + (4 * 8));
>  #endif
>  }

Best regards,
Marek Vasut