[U-Boot] [PATCH v2 01/11] Blackfin: bf60x: new processor header files

[Wolfgang Denk <wd@denx.de>]

Dear Sonic Zhang,

In message <1361257266-3722-2-git-send-email-sonic.adi@gmail.com> you wrote:
> 
> Add header files for blackfin new processor bf60x.
...
>  arch/blackfin/include/asm/mach-bf609/BF609_def.h  | 3758 +++++++++++++++++++++

This is a bit excessive, isn't it?  Do we really all thse many
thousands lines of defines?


> diff --git a/arch/blackfin/include/asm/mach-bf609/BF609_def.h b/arch/blackfin/include/asm/mach-bf609/BF609_def.h
> new file mode 100644
> index 0000000..39b740f
> --- /dev/null
> +++ b/arch/blackfin/include/asm/mach-bf609/BF609_def.h
> @@ -0,0 +1,3758 @@
> +/* DO NOT EDIT THIS FILE
> + * Automatically generated by generate-def-headers.xsl
> + * DO NOT EDIT THIS FILE
> + */
> +
> +#ifndef __BFIN_DEF_ADSP_BF609_proc__
> +#define __BFIN_DEF_ADSP_BF609_proc__
> +
> +#include "../mach-common/ADSP-EDN-core_def.h"
> +
> +#define CNT_CFG                     0xFFC00400         /* CNT0 Configuration Register */
> +#define CNT_IMSK                    0xFFC00404         /* CNT0 Interrupt Mask Register */
> +#define CNT_STAT                    0xFFC00408         /* CNT0 Status Register */
> +#define CNT_CMD                     0xFFC0040C         /* CNT0 Command Register */
> +#define CNT_DEBNCE                  0xFFC00410         /* CNT0 Debounce Register */
> +#define CNT_CNTR                    0xFFC00414         /* CNT0 Counter Register */
> +#define CNT_MAX                     0xFFC00418         /* CNT0 Maximum Count Register */
> +#define CNT_MIN                     0xFFC0041C         /* CNT0 Minimum Count Register */
> +
> +#define RSI_CLK_CONTROL             0xFFC00604         /* RSI0 Clock Control Register */
> +#define RSI_ARGUMENT                0xFFC00608         /* RSI0 Argument Register */
> +#define RSI_COMMAND                 0xFFC0060C         /* RSI0 Command Register */
> +#define RSI_RESP_CMD                0xFFC00610         /* RSI0 Response Command Register */
> +#define RSI_RESPONSE0               0xFFC00614         /* RSI0 Response 0 Register */
> +#define RSI_RESPONSE1               0xFFC00618         /* RSI0 Response 1 Register */
> +#define RSI_RESPONSE2               0xFFC0061C         /* RSI0 Response 2 Register */
> +#define RSI_RESPONSE3               0xFFC00620         /* RSI0 Response 3 Register */
> +#define RSI_DATA_TIMER              0xFFC00624         /* RSI0 Data Timer Register */
> +#define RSI_DATA_LGTH               0xFFC00628         /* RSI0 Data Length Register */
> +#define RSI_DATA_CONTROL            0xFFC0062C         /* RSI0 Data Control Register */
> +#define RSI_DATA_CNT                0xFFC00630         /* RSI0 Data Count Register */
> +#define RSI_STATUS                  0xFFC00634         /* RSI0 Status Register */
> +#define RSI_STATUSCL                0xFFC00638         /* RSI0 Status Clear Register */
> +#define RSI_IMSK0                   0xFFC0063C         /* RSI0 Interrupt 0 Mask Register */
> +#define RSI_IMSK1                   0xFFC00640         /* RSI0 Interrupt 1 Mask Register */
> +#define RSI_FIFO_CNT                0xFFC00648         /* RSI0 FIFO Counter Register */
...

I think I mentioned before that device registers have to be described
using C structs in U-Boot, and proper I/O accessors must be used to
access these.

In any case, please trim to the really needed definitions.

> --- /dev/null
> +++ b/arch/blackfin/include/asm/mach-bf609/anomaly.h
> @@ -0,0 +1,103 @@
> +/*
> + * DO NOT EDIT THIS FILE
> + * This file is under version control at
> + *   svn://sources.blackfin.uclinux.org/toolchain/trunk/proc-defs/header-frags/
> + * and can be replaced with that version at any time
> + * DO NOT EDIT THIS FILE

This makes no sense to me.

> + * Copyright 2004-2012 Analog Devices Inc.
> + * Licensed under the ADI BSD license.
> + *   https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
> + */

I'm not sure if this has been discussed before - is this really GPL
compatible?



Best regards,

Wolfgang Denk

-- 
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