From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Date: Wed, 6 Mar 2013 15:31:35 +0100 Subject: [U-Boot] [PATCH v2] mxs: spl_mem_init: Align DDR2 init with FSL bootlets source In-Reply-To: References: <1362092359-16113-1-git-send-email-festevam@gmail.com> Message-ID: <201303061531.35196.marex@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Dear Otavio Salvador, > On Thu, Feb 28, 2013 at 7:59 PM, Fabio Estevam wrote: > > From: Fabio Estevam > > > > Currently the following kernel hang happens when loading a 2.6.35 kernel > > from Freeescale on a mx28evk board: > > > > RPC: Registered tcp transport module. > > RPC: Registered tcp NFSv4.1 backchannel transport module. > > Bus freq driver module loaded > > IMX usb wakeup probe > > usb h1 wakeup device is registered > > mxs_cpu_init: cpufreq init finished > > ... > > > > Loading the same kernel using the bootlets from the > > imx-bootlets-src-10.12.01 package, the hang does not occur. > > > > Comparing the DDR2 initialization from the bootlets code against the > > U-boot one, we can notice some mismatches, and after applying the same > > initialization into U-boot the 2.6.35 kernel can boot normally. > > > > Also tested with 'mtest' command, which runs succesfully. > > > > Signed-off-by: Fabio Estevam > > Acked-by: Otavio Salvador Otavio, did you review the changes done in this patch ? Best regards, Marek Vasut