[U-Boot] [PATCH 21/21] powerpc/b4860qds: Slave module for boot from SRIO and PCIE

[Wolfgang Denk <wd@denx.de>]

Dear York Sun,

In message <1363973052-25918-19-git-send-email-yorksun@freescale.com> you wrote:
> From: Liu Gang <Gang.Liu@freescale.com>
> 
> When boot from PCIE or SRIO, slave's core should be in holdoff after
> powered on for some specific requirements. Master will release the
> slave's core at the right time by PCIE or SRIO interface.
> 
> Slave's ucode and ENV can be stored in master's memory space, then slave
> can fetch them through PCIE or SRIO interface.
...

CHECK: Alignment should match open parenthesis
#180: FILE: board/freescale/b4860qds/tlb.c:61:
+       SET_TLB_ENTRY(1, CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR,
+                       CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS,

CHECK: Alignment should match open parenthesis
#196: FILE: board/freescale/b4860qds/tlb.c:155:
+       SET_TLB_ENTRY(1, CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR,
+               CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS,


Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
In my experience the best way to get something done  is to give it to
someone who is busy.               - Terry Pratchett, _Going_Postal_