From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Date: Fri, 19 Apr 2013 13:44:57 +0200 Subject: [U-Boot] [PATCH 6/6] arm: mx5: Add support for DENX M53EVK In-Reply-To: <1945491820.1870872.1366363324581.JavaMail.root@advansee.com> References: <1366344655-8535-1-git-send-email-marex@denx.de> <1366344655-8535-6-git-send-email-marex@denx.de> <1945491820.1870872.1366363324581.JavaMail.root@advansee.com> Message-ID: <201304191344.58170.marex@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Dear Beno?t Th?baudeau, [...] > > +static void setup_iomux_nand(void) > > +{ > > + mxc_request_iomux(MX53_PIN_NANDF_WE_B, IOMUX_CONFIG_ALT0); > > + mxc_request_iomux(MX53_PIN_NANDF_RE_B, IOMUX_CONFIG_ALT0); > > + mxc_request_iomux(MX53_PIN_NANDF_CLE, IOMUX_CONFIG_ALT0); > > + mxc_request_iomux(MX53_PIN_NANDF_ALE, IOMUX_CONFIG_ALT0); > > + mxc_request_iomux(MX53_PIN_NANDF_WP_B, IOMUX_CONFIG_ALT0); > > + mxc_request_iomux(MX53_PIN_NANDF_RB0, IOMUX_CONFIG_ALT0); > > + mxc_request_iomux(MX53_PIN_NANDF_CS0, IOMUX_CONFIG_ALT0); > > + mxc_request_iomux(MX53_PIN_ATA_DATA0, IOMUX_CONFIG_ALT3); > > + mxc_request_iomux(MX53_PIN_ATA_DATA1, IOMUX_CONFIG_ALT3); > > + mxc_request_iomux(MX53_PIN_ATA_DATA2, IOMUX_CONFIG_ALT3); > > + mxc_request_iomux(MX53_PIN_ATA_DATA3, IOMUX_CONFIG_ALT3); > > + mxc_request_iomux(MX53_PIN_ATA_DATA4, IOMUX_CONFIG_ALT3); > > + mxc_request_iomux(MX53_PIN_ATA_DATA5, IOMUX_CONFIG_ALT3); > > + mxc_request_iomux(MX53_PIN_ATA_DATA6, IOMUX_CONFIG_ALT3); > > + mxc_request_iomux(MX53_PIN_ATA_DATA7, IOMUX_CONFIG_ALT3); > > + > > + mxc_iomux_set_pad(MX53_PIN_NANDF_WE_B, PAD_CTL_DRV_HIGH); > > + mxc_iomux_set_pad(MX53_PIN_NANDF_RE_B, PAD_CTL_DRV_HIGH); > > + mxc_iomux_set_pad(MX53_PIN_NANDF_CLE, PAD_CTL_DRV_HIGH); > > + mxc_iomux_set_pad(MX53_PIN_NANDF_ALE, PAD_CTL_DRV_HIGH); > > + mxc_iomux_set_pad(MX53_PIN_NANDF_WP_B, PAD_CTL_PUE_PULL | > > + PAD_CTL_100K_PU | PAD_CTL_PKE_ENABLE); > > + mxc_iomux_set_pad(MX53_PIN_NANDF_RB0, PAD_CTL_PUE_PULL | > > + PAD_CTL_100K_PU | PAD_CTL_PKE_ENABLE); > > + mxc_iomux_set_pad(MX53_PIN_NANDF_CS0, PAD_CTL_DRV_HIGH); > > + mxc_iomux_set_pad(MX53_PIN_ATA_DATA0, PAD_CTL_DRV_HIGH | > > + PAD_CTL_100K_PU | PAD_CTL_PKE_ENABLE); > > + mxc_iomux_set_pad(MX53_PIN_ATA_DATA1, PAD_CTL_DRV_HIGH | > > + PAD_CTL_100K_PU | PAD_CTL_PKE_ENABLE); > > + mxc_iomux_set_pad(MX53_PIN_ATA_DATA2, PAD_CTL_DRV_HIGH | > > + PAD_CTL_100K_PU | PAD_CTL_PKE_ENABLE); > > + mxc_iomux_set_pad(MX53_PIN_ATA_DATA3, PAD_CTL_DRV_HIGH | > > + PAD_CTL_100K_PU | PAD_CTL_PKE_ENABLE); > > + mxc_iomux_set_pad(MX53_PIN_ATA_DATA4, PAD_CTL_DRV_HIGH | > > + PAD_CTL_100K_PU | PAD_CTL_PKE_ENABLE); > > + mxc_iomux_set_pad(MX53_PIN_ATA_DATA5, PAD_CTL_DRV_HIGH | > > + PAD_CTL_100K_PU | PAD_CTL_PKE_ENABLE); > > + mxc_iomux_set_pad(MX53_PIN_ATA_DATA6, PAD_CTL_DRV_HIGH | > > + PAD_CTL_100K_PU | PAD_CTL_PKE_ENABLE); > > + mxc_iomux_set_pad(MX53_PIN_ATA_DATA7, PAD_CTL_DRV_HIGH | > > + PAD_CTL_100K_PU | PAD_CTL_PKE_ENABLE); > > +} > > Like for 5/6, why is this function needed? When booting from NAND Where did you get the information the board can only boot from NAND? Did I mistakenly present it somewhere like that please? Anyway, no, it can also boot from SD and USB at least. > the boot > ROM sets the NAND pads appropriately itself (see 7.5.2.4), so unless it > reverts those changes to the IOMUX reset values afterwards, there is no > need to set the NAND IOMUX again. It's not as if the board were using NAND > after having been booted from another source (like mx53ard does). I want to use NAND when booted from other sources, yes. > Or perhaps you are planning to add more boot sources later, in which case > there are configs missing for M4IF and WEIM (see mx53ard's > setup_iomux_nand()). Yes, but even without this configuration, the NAND works perfectly well when booted from SD. Am I missing something here? [...]