From mboxrd@z Thu Jan  1 00:00:00 1970
From: Marek Vasut <marex@denx.de>
Date: Sun, 21 Apr 2013 21:12:31 +0200
Subject: [U-Boot] [PATCH V2 6/6] arm: mx5: Add support for DENX M53EVK
In-Reply-To: <1727321625.5052.1366564584792.JavaMail.root@advansee.com>
References: <1366559547-9063-1-git-send-email-marex@denx.de>
	<1366559547-9063-6-git-send-email-marex@denx.de>
	<1727321625.5052.1366564584792.JavaMail.root@advansee.com>
Message-ID: <201304212112.31672.marex@denx.de>
List-Id: <u-boot.lists.denx.de>
MIME-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
To: u-boot@lists.denx.de

Dear Beno?t Th?baudeau,

> Dear Marek Vasut,
> 
> On Sunday, April 21, 2013 5:52:27 PM, Marek Vasut wrote:
> > Add basic support for the DENX M53EVK board. Currently supported is:
> > MMC (incl. booting)
> 
>              ^
> Can you clarify this, please?

Use u-boot.imx for SD booting as usual.

> spl_boot_device() points only to NAND, so
> you're clearly talking about hardware MMC boot, and not about hardware
> NAND boot followed by SPL payload fetched from MMC. But MMC boot does not
> need SPL here, in which case you will have to generate a simple
> u-boot.imx, or you will rather want to use u-boot-with-spl.imx for SD
> (NAND header dropped to leave room for MBR). And in the latter case, why
> have spl_boot_device() point to NAND for MMC boot?

No, regular u-boot.imx will be used for SD boot.

> > NAND (incl. booting)
> > Ethernet, I2C, USB, SATA, RTC.
> > 
> > Signed-off-by: Marek Vasut <marex@denx.de>
> > Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
> > Cc: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
> > Cc: Fabio Estevam <fabio.estevam@freescale.com>
> > Cc: Scott Wood <scottwood@freescale.com>
> > Cc: Stefano Babic <sbabic@denx.de>
> > Cc: Tom Rini <trini@ti.com>
> > Cc: Wolfgang Denk <wd@denx.de>
> > ---

[...]

> > +static void m53_set_nand(void)
> > +{
> > +	u32 i;
> > +
> > +	#define M4IF_GENP_WEIM_MM		0x00000001
> > +	#define WEIM_GCR2_MUX16_BYP_GRANT	0x00001000
> > +
> > +	/* NAND flash is muxed on ATA pins */
> > +	setbits_le32(M4IF_BASE_ADDR + 0xc, M4IF_GENP_WEIM_MM);
> 
> This should be clrbits_le32().

Why?

> > +
> > +	/* Wait for Grant/Ack sequence (see EIM_CSnGCR2:MUX16_BYP_GRANT) */
> > +	for (i = 0x4; i < 0x94; i += 0x18)
> > +		clrbits_le32(WEIM_BASE_ADDR + i, WEIM_GCR2_MUX16_BYP_GRANT);
> > +
> > +	mxc_set_clock(0, 33, MXC_NFC_CLK);
> > +	enable_nfc_clk(1);
> > +}

[...]