From mboxrd@z Thu Jan  1 00:00:00 1970
From: Marek Vasut <marex@denx.de>
Date: Fri, 3 May 2013 04:37:03 +0200
Subject: [U-Boot] [PATCH v3 2/7] mx23evk: Fix DDR pin iomux settings
In-Reply-To: <CAOMZO5AhWGHd=+jQDBSYyS-KAWXKNMAj0h2TdmU4ZwPEey8KEA@mail.gmail.com>
References: <1367534661-13502-1-git-send-email-festevam@gmail.com>
	<201305030424.51755.marex@denx.de>
	<CAOMZO5AhWGHd=+jQDBSYyS-KAWXKNMAj0h2TdmU4ZwPEey8KEA@mail.gmail.com>
Message-ID: <201305030437.03324.marex@denx.de>
List-Id: <u-boot.lists.denx.de>
MIME-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
To: u-boot@lists.denx.de

Dear Fabio Estevam,

> On Thu, May 2, 2013 at 11:24 PM, Marek Vasut <marex@denx.de> wrote:
> >>  #define      MUX_CONFIG_SSP1 (MXS_PAD_3V3 | MXS_PAD_8MA |
> >>  MXS_PAD_PULLUP)
> >> 
> >> -#define      MUX_CONFIG_EMI  (MXS_PAD_3V3 | MXS_PAD_16MA |
> >> MXS_PAD_PULLUP) +#define      MUX_CONFIG_EMI  (MXS_PAD_3V3 |
> >> MXS_PAD_12MA | MXS_PAD_PULLUP)
> > 
> > btw. if 3V3 setting doesn't exist, why do we have it here? We should just
> > can it then.
> 
> It exists and it is 0.
> 
> We need to have MXS_PAD_3V3 here, so that the pin voltage bit can be
> cleared.

Uh, why is it even set ? Does the bootrom screw up with it? But then it's cool, 
just fix those few remaining ramblings of mine and stick my Acks on it.

Best regards,
Marek Vasut