[U-Boot] [PATCH 1/3] mx23: Operate DDR voltage supply at 2.5V

[Marek Vasut <marex@denx.de>]

Dear Fabio Estevam,

> From: Fabio Estevam <fabio.estevam@freescale.com>
> 
> After the recent fixes in the mx23 DDR setup, it is safe to operate DDR
> voltage at the recommended 2.5V voltage level again.
> 
> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

Is this a tripple revert ?

Stefano, you can apply this before applying the patches I complained weren't 
applied a few hours ago, it'll prevent merge conflict. Esp. this [PATCH] arm: 
mx23: Fix VDDMEM misconfiguration

> ---
>  arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c |    4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
> b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c index 41fb803..4ed197b 100644
> --- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
> +++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
> @@ -247,7 +247,7 @@ static void mx23_mem_setup_vddmem(void)
>  	struct mxs_power_regs *power_regs =
>  		(struct mxs_power_regs *)MXS_POWER_BASE;
> 
> -	writel((0x12 << POWER_VDDMEMCTRL_TRG_OFFSET) |
> +	writel((0x10 << POWER_VDDMEMCTRL_TRG_OFFSET) |
>  		POWER_VDDMEMCTRL_ENABLE_ILIMIT |
>  		POWER_VDDMEMCTRL_ENABLE_LINREG |
>  		POWER_VDDMEMCTRL_PULLDOWN_ACTIVE,
> @@ -255,7 +255,7 @@ static void mx23_mem_setup_vddmem(void)
> 
>  	early_delay(10000);
> 
> -	writel((0x12 << POWER_VDDMEMCTRL_TRG_OFFSET) |
> +	writel((0x10 << POWER_VDDMEMCTRL_TRG_OFFSET) |
>  		POWER_VDDMEMCTRL_ENABLE_LINREG,
>  		&power_regs->hw_power_vddmemctrl);
>  }

Best regards,
Marek Vasut