[U-Boot] [PATCH v03 1/2] OMAP3+: introduce generic ABB support

[Nishanth Menon <nm@ti.com>]

On 10:39-20130523, Andrii Tseglytskyi wrote:
> On 05/22/2013 11:56 PM, Nishanth Menon wrote:
> >Hi Andrii,
> >We are almost there.. minor comments follow:
> >On 11:42-20130521, Andrii Tseglytskyi wrote:
> >[...]
> >>diff --git a/arch/arm/cpu/armv7/omap5/abb.c b/arch/arm/cpu/armv7/omap5/abb.c
> >>new file mode 100644
> >>index 0000000..92470be
> >>--- /dev/null
> >>+++ b/arch/arm/cpu/armv7/omap5/abb.c
> >>@@ -0,0 +1,67 @@
> >I might introduce this as part of patch #2... but no strong feelings
> >about it.
> >[...]
> >>+s8 abb_setup_ldovbb(u32 fuse, u32 ldovbb)
> >>+{
> >>+	u32 vset;
> >>+
> >>+	/*
> >>+	 * ABB parameters must be properly fused
> >>+	 * otherwise ABB should be disabled
> >>+	 */
> >>+	vset = readl(fuse);
> >>+	if (!(vset & OMAP5_ABB_FUSE_ENABLE_MASK))
> >>+		return -1;
> >>+
> >>+	/* prepare VSET value for LDOVBB mux register */
> >>+	vset &= OMAP5_ABB_FUSE_VSET_MASK;
> >>+	vset >>= ffs(OMAP5_ABB_FUSE_VSET_MASK) - 1;
> >>+	vset <<= ffs(OMAP5_ABB_LDOVBBMPU_VSET_OUT_MASK) - 1;
> >>+	vset |= OMAP5_ABB_LDOVBBMPU_MUX_CTRL_MASK;
> >>+
> >>+	/* setup LDOVBB using fused value */
> >>+	clrsetbits_le32(ldovbb,  OMAP5_ABB_LDOVBBMPU_VSET_OUT_MASK, vset);
> >OMAP5_ABB_LDOVBBMPU_MUX_CTRL_MASK wont get set :(
> 
> Sorry didn't get... I have
> 
> vset |= *OMAP5_ABB_LDOVBBMPU_MUX_CTRL_MASK*;  <-- set here
> clrsetbits_le32(ldovbb,  OMAP5_ABB_LDOVBBMPU_VSET_OUT_MASK, vset);
define clrsetbits(type, addr, clear, set) \
       out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
Arrgh.. I missed this :(. I had confused this with *rmw (read modify
write) in Linux which would do set &= mask;

My Bad. the patch is doing the right thing.

In short,
Acked-by: Nishanth Menon <nm@ti.com>

-- 
Regards,
Nishanth Menon