* [U-Boot] [PATCH 0/2] pxa: fix memory coherency problem after relocation
@ 2013-06-21 16:12 Mike Dunn
2013-06-21 16:12 ` [U-Boot] [PATCH 1/2] pxa: use -mcpu=xscale compiler option Mike Dunn
2013-06-21 16:12 ` [U-Boot] [PATCH 2/2] pxa: fix memory coherency problem after relocation Mike Dunn
0 siblings, 2 replies; 6+ messages in thread
From: Mike Dunn @ 2013-06-21 16:12 UTC (permalink / raw)
To: u-boot
These patches fix a memory coherency problem that sometimes occurs on xscale
after code relocation. The first patch changes the options passed to the
compiler so that the __XSCALE__ macro is defined. This is used in the second
patch to limit the change to xscale cores, where the necessary cache operations
are performed before jumping to the relocated code.
Whether other cores need a similiar operation after code relocation remains an
open question.
Thanks Albert.
Mike Dunn (2):
pxa: use -mcpu=xscale compiler option
pxa: fix memory coherency problem after relocation
arch/arm/cpu/pxa/config.mk | 2 +-
arch/arm/lib/relocate.S | 9 +++++++++
2 files changed, 10 insertions(+), 1 deletions(-)
--
1.7.8.6
^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH 1/2] pxa: use -mcpu=xscale compiler option
2013-06-21 16:12 [U-Boot] [PATCH 0/2] pxa: fix memory coherency problem after relocation Mike Dunn
@ 2013-06-21 16:12 ` Mike Dunn
2013-06-22 2:29 ` Marek Vasut
2013-06-21 16:12 ` [U-Boot] [PATCH 2/2] pxa: fix memory coherency problem after relocation Mike Dunn
1 sibling, 1 reply; 6+ messages in thread
From: Mike Dunn @ 2013-06-21 16:12 UTC (permalink / raw)
To: u-boot
Pass '-mcpu=xscale' to the compiler instead of march and mtune. This will cause
gcc to define the __XSCALE__ macro.
Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
---
arch/arm/cpu/pxa/config.mk | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/pxa/config.mk b/arch/arm/cpu/pxa/config.mk
index 0bbe295..ea55859 100644
--- a/arch/arm/cpu/pxa/config.mk
+++ b/arch/arm/cpu/pxa/config.mk
@@ -24,7 +24,7 @@
PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float
-PLATFORM_CPPFLAGS += -march=armv5te -mtune=xscale
+PLATFORM_CPPFLAGS += -mcpu=xscale
# =========================================================================
#
# Supply options according to compiler version
--
1.7.8.6
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH 2/2] pxa: fix memory coherency problem after relocation
2013-06-21 16:12 [U-Boot] [PATCH 0/2] pxa: fix memory coherency problem after relocation Mike Dunn
2013-06-21 16:12 ` [U-Boot] [PATCH 1/2] pxa: use -mcpu=xscale compiler option Mike Dunn
@ 2013-06-21 16:12 ` Mike Dunn
2013-06-22 2:29 ` Marek Vasut
1 sibling, 1 reply; 6+ messages in thread
From: Mike Dunn @ 2013-06-21 16:12 UTC (permalink / raw)
To: u-boot
On the xscale, the icache must be invalidated and the write buffers drained
after writing code over the data bus, even if the caches are disabled. Tested
on the pxa270.
Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
---
arch/arm/lib/relocate.S | 9 +++++++++
1 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/arch/arm/lib/relocate.S b/arch/arm/lib/relocate.S
index 4446da9..eedf314 100644
--- a/arch/arm/lib/relocate.S
+++ b/arch/arm/lib/relocate.S
@@ -92,6 +92,15 @@ fixnext:
relocate_done:
+#ifdef __XSCALE__
+ /*
+ * On xscale, icache must be invalidated and write buffers drained,
+ * even with cache disabled - 4.2.7 of xscale core developer's manual
+ */
+ mcr p15, 0, r0, c7, c7, 0 /* invalidate icache */
+ mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
+#endif
+
/* ARMv4- don't know bx lr but the assembler fails to see that */
#ifdef __ARM_ARCH_4__
--
1.7.8.6
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH 1/2] pxa: use -mcpu=xscale compiler option
2013-06-21 16:12 ` [U-Boot] [PATCH 1/2] pxa: use -mcpu=xscale compiler option Mike Dunn
@ 2013-06-22 2:29 ` Marek Vasut
0 siblings, 0 replies; 6+ messages in thread
From: Marek Vasut @ 2013-06-22 2:29 UTC (permalink / raw)
To: u-boot
Dear Mike Dunn,
> Pass '-mcpu=xscale' to the compiler instead of march and mtune. This will
> cause gcc to define the __XSCALE__ macro.
>
> Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
> ---
> arch/arm/cpu/pxa/config.mk | 2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/cpu/pxa/config.mk b/arch/arm/cpu/pxa/config.mk
> index 0bbe295..ea55859 100644
> --- a/arch/arm/cpu/pxa/config.mk
> +++ b/arch/arm/cpu/pxa/config.mk
> @@ -24,7 +24,7 @@
>
> PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float
>
> -PLATFORM_CPPFLAGS += -march=armv5te -mtune=xscale
> +PLATFORM_CPPFLAGS += -mcpu=xscale
> #
> =========================================================================
> #
> # Supply options according to compiler version
Acked-by: Marek Vasut <marex@denx.de>
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH 2/2] pxa: fix memory coherency problem after relocation
2013-06-21 16:12 ` [U-Boot] [PATCH 2/2] pxa: fix memory coherency problem after relocation Mike Dunn
@ 2013-06-22 2:29 ` Marek Vasut
2013-06-22 5:23 ` Albert ARIBAUD
0 siblings, 1 reply; 6+ messages in thread
From: Marek Vasut @ 2013-06-22 2:29 UTC (permalink / raw)
To: u-boot
Dear Mike Dunn,
> On the xscale, the icache must be invalidated and the write buffers drained
> after writing code over the data bus, even if the caches are disabled.
> Tested on the pxa270.
>
> Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
> ---
> arch/arm/lib/relocate.S | 9 +++++++++
> 1 files changed, 9 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/lib/relocate.S b/arch/arm/lib/relocate.S
> index 4446da9..eedf314 100644
> --- a/arch/arm/lib/relocate.S
> +++ b/arch/arm/lib/relocate.S
> @@ -92,6 +92,15 @@ fixnext:
>
> relocate_done:
>
> +#ifdef __XSCALE__
> + /*
> + * On xscale, icache must be invalidated and write buffers drained,
> + * even with cache disabled - 4.2.7 of xscale core developer's manual
> + */
> + mcr p15, 0, r0, c7, c7, 0 /* invalidate icache */
> + mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
> +#endif
> +
> /* ARMv4- don't know bx lr but the assembler fails to see that */
>
> #ifdef __ARM_ARCH_4__
Acked-by: Marek Vasut <marex@denx.de>
Albert, do you want me to pick these or will you?
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH 2/2] pxa: fix memory coherency problem after relocation
2013-06-22 2:29 ` Marek Vasut
@ 2013-06-22 5:23 ` Albert ARIBAUD
0 siblings, 0 replies; 6+ messages in thread
From: Albert ARIBAUD @ 2013-06-22 5:23 UTC (permalink / raw)
To: u-boot
Hi Marek,
On Sat, 22 Jun 2013 04:29:56 +0200, Marek Vasut <marex@denx.de> wrote:
> Albert, do you want me to pick these or will you?
Pick them and PR me.
> Best regards,
> Marek Vasut
Amicalement,
--
Albert.
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2013-06-22 5:23 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
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2013-06-21 16:12 [U-Boot] [PATCH 0/2] pxa: fix memory coherency problem after relocation Mike Dunn
2013-06-21 16:12 ` [U-Boot] [PATCH 1/2] pxa: use -mcpu=xscale compiler option Mike Dunn
2013-06-22 2:29 ` Marek Vasut
2013-06-21 16:12 ` [U-Boot] [PATCH 2/2] pxa: fix memory coherency problem after relocation Mike Dunn
2013-06-22 2:29 ` Marek Vasut
2013-06-22 5:23 ` Albert ARIBAUD
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