From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tom Rini Date: Tue, 2 Jul 2013 16:06:48 -0400 Subject: [U-Boot] am33xx: fix the ddr_cmdtctrl structure In-Reply-To: <1371477567-8418-1-git-send-email-ilya@compulab.co.il> References: <1371477567-8418-1-git-send-email-ilya@compulab.co.il> Message-ID: <20130702200648.GK16630@bill-the-cat> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Mon, Jun 17, 2013 at 04:59:27PM +0300, Ilya Ledvich wrote: > Fix the wrong mapping between the DDR I/O control registers on AM33XX > SoCs and the software representation in the SPL code. > The most recent public TRM defines the following DDR I/O control registers > offsets: > * ddr_cmd0_ioctrl : offset 0x44E11404 > * ddr_cmd1_ioctrl : offset 0x44E11408 > * ddr_cmd2_ioctrl : offset 0x44E1140C > * ddr_data0_ioctrl: offset 0x44E11440 > * ddr_data1_ioctrl: offset 0x44E11444 > > While the struct ddr_cmdtctrl has also some reserved bits in the beginning. > The struct is mapped to the address 0x44E11404. As a result "cm0ioctl" points > to the ddr_cmd1_ioctrl register, "cm1ioctl" to the ddr_cmd2_ioctrl and etc. > Registers ddr_cmd0_ioctrl and ddr_data0_ioctrl are never configured because > of this mapping mismatch. > > Signed-off-by: Ilya Ledvich > Reviewed-by: Peter Korsgaard Applied to u-boot-ti/master, thanks! -- Tom -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 836 bytes Desc: Digital signature URL: