From mboxrd@z Thu Jan 1 00:00:00 1970 From: Albert ARIBAUD Date: Mon, 29 Jul 2013 16:09:21 +0200 Subject: [U-Boot] [PATCH 1/9] arm926ej-s: Invalidate instruction cache in flush_cache In-Reply-To: References: <1300391223-11879-1-git-send-email-mspang@csclub.uwaterloo.ca> <1300391223-11879-2-git-send-email-mspang@csclub.uwaterloo.ca> <20130729091921.35c4067b@lilith> Message-ID: <20130729160921.06b22cb2@lilith> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Michael, On Mon, 29 Jul 2013 08:57:53 -0400, Michael Spang wrote: > Albert, > > That's not a correct characterization of the bug. > > The incoherent cache lines are from before the relocation stage. If > U-Boot is relocating from RAM, and later copies the OS there without > invalidating those lines, then that's a bug in U-Boot. Thanks for this pointing out this scenario, which is correct, although it was not raised in the original bug description. I begs however the question whether anything from re-relocation can survive in the icache from between the moment the relocation starts and the moment the OS is given transfer to. IOW, was this issue actually met? Anyway I stand by my statement that even if there is an issue to fix, this patch fixes it in the wrong place. > Michael Amicalement, -- Albert.