[U-Boot] [PATCH 0/7] arm, am33xx, video: add video support for am33xx based boards

[U-Boot] [PATCH 0/7] arm, am33xx, video: add video support for am33xx based boards

[Heiko Schocher]

This patchset prepare video support for am33xx based boards. This
driver is used on the siemens boards rut, dxr2 and pxm2, posted
without video support here:

http://patchwork.ozlabs.org/patch/263211/

Heiko Schocher (7):
  arm, am335x: add some missing registers and defines for lcd and epwm
    support
  video, da8xx: move da8xx-fb.h to drivers/video
  arm, am33xx: add clk_get prototype
  video, da8xx-fb: changes for am335x usage
  video, da8xx-fb: show fb addr in bdinfo
  tools, bmp_logo: fix index from uint16_t to int to allow bigger logos
  video: add an option to skip cfb console init

 arch/arm/include/asm/arch-am33xx/cpu.h             |  35 ++-
 arch/arm/include/asm/arch-am33xx/hardware.h        |   1 +
 arch/arm/include/asm/arch-am33xx/hardware_am33xx.h |   7 +
 board/davinci/ea20/ea20.c                          |  28 +-
 drivers/video/cfb_console.c                        |  18 ++
 drivers/video/da8xx-fb.c                           | 338 +++++++++++++++++----
 .../asm/arch-davinci => drivers/video}/da8xx-fb.h  |   7 +-
 tools/bmp_logo.c                                   |   2 +-
 8 Dateien ge?ndert, 373 Zeilen hinzugef?gt(+), 63 Zeilen entfernt(-)
 rename {arch/arm/include/asm/arch-davinci => drivers/video}/da8xx-fb.h (94%)

Cc: Stefano Babic <sbabic@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Tom Rini <trini@ti.com>
-- 
1.7.11.7

[U-Boot] [PATCH 1/7] arm, am335x: add some missing registers and defines for lcd and epwm support

[Heiko Schocher]

- add missing register defines in struct cm_perpl
  epwmss0clkctrl
  epwmss2clkctrl
  lcdcclkstctrl
- add missing register defines in struct cm_dpll
  clklcdcpixelclk
- add struct pwmss_regs
- add struct pwmss_ecap_regs
- add LCD Controller base LCD_CNTL_BASE
- add PWM0 controller base PWMSS0_BASE

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
---
 arch/arm/include/asm/arch-am33xx/cpu.h             | 35 +++++++++++++++++++++-
 arch/arm/include/asm/arch-am33xx/hardware_am33xx.h |  7 +++++
 2 Dateien ge?ndert, 41 Zeilen hinzugef?gt(+), 1 Zeile entfernt(-)

diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h b/arch/arm/include/asm/arch-am33xx/cpu.h
index ce24080..daaf13c 100644
--- a/arch/arm/include/asm/arch-am33xx/cpu.h
+++ b/arch/arm/include/asm/arch-am33xx/cpu.h
@@ -219,7 +219,8 @@ struct cm_perpll {
 	unsigned int dcan1clkctrl;	/* offset 0xC4 */
 	unsigned int resv6[2];
 	unsigned int emiffwclkctrl;	/* offset 0xD0 */
-	unsigned int resv7[2];
+	unsigned int epwmss0clkctrl;	/* offset 0xD4 */
+	unsigned int epwmss2clkctrl;	/* offset 0xD8 */
 	unsigned int l3instrclkctrl;	/* offset 0xDC */
 	unsigned int l3clkctrl;		/* Offset 0xE0 */
 	unsigned int resv8[4];
@@ -230,12 +231,15 @@ struct cm_perpll {
 	unsigned int l4hsclkctrl;	/* offset 0x120 */
 	unsigned int resv10[8];
 	unsigned int cpswclkstctrl;	/* offset 0x144 */
+	unsigned int lcdcclkstctrl;	/* offset 0x148 */
 };
 
 /* Encapsulating Display pll registers */
 struct cm_dpll {
 	unsigned int resv1[2];
 	unsigned int clktimer2clk;	/* offset 0x08 */
+	unsigned int resv2[10];
+	unsigned int clklcdcpixelclk;	/* offset 0x34 */
 };
 
 /* Control Module RTC registers */
@@ -377,6 +381,35 @@ struct ctrl_dev {
 #define RGMII_INT_DELAY		(RGMII1_IDMODE | RGMII2_IDMODE)
 #define RMII_CHIPCKL_ENABLE     (RMII1_IO_CLK_EN | RMII2_IO_CLK_EN)
 
+/* PWMSS */
+struct pwmss_regs {
+	unsigned int idver;
+	unsigned int sysconfig;
+	unsigned int clkconfig;
+	unsigned int clkstatus;
+};
+#define ECAP_CLK_EN		BIT(0)
+#define ECAP_CLK_STOP_REQ	BIT(1)
+
+struct pwmss_ecap_regs {
+	unsigned int tsctr;
+	unsigned int ctrphs;
+	unsigned int cap1;
+	unsigned int cap2;
+	unsigned int cap3;
+	unsigned int cap4;
+	unsigned int reserved[4];
+	unsigned short ecctl1;
+	unsigned short ecctl2;
+};
+
+/* Capture Control register 2 */
+#define ECTRL2_SYNCOSEL_MASK	(0x03 << 6)
+#define ECTRL2_MDSL_ECAP	BIT(9)
+#define ECTRL2_CTRSTP_FREERUN	BIT(4)
+#define ECTRL2_PLSL_LOW		BIT(10)
+#define ECTRL2_SYNC_EN		BIT(5)
+
 #endif /* __ASSEMBLY__ */
 #endif /* __KERNEL_STRICT_NAMES */
 
diff --git a/arch/arm/include/asm/arch-am33xx/hardware_am33xx.h b/arch/arm/include/asm/arch-am33xx/hardware_am33xx.h
index 432f0c7..293ede2 100644
--- a/arch/arm/include/asm/arch-am33xx/hardware_am33xx.h
+++ b/arch/arm/include/asm/arch-am33xx/hardware_am33xx.h
@@ -43,4 +43,11 @@
 /* RTC base address */
 #define RTC_BASE			0x44E3E000
 
+/* LCD Controller */
+#define	LCD_CNTL_BASE			0x4830E000
+
+/* PWMSS */
+#define PWMSS0_BASE			0x48300000
+#define AM33XX_ECAP0_BASE		0x48300100
+
 #endif /* __AM33XX_HARDWARE_AM33XX_H */
-- 
1.7.11.7

[U-Boot] [PATCH 1/7] arm, am335x: add some missing registers and defines for lcd and epwm support

[Tom Rini]

On Sat, Aug 03, 2013 at 07:22:47AM +0200, Heiko Schocher wrote:

[snip]
> +struct pwmss_ecap_regs {
> +	unsigned int tsctr;
> +	unsigned int ctrphs;
> +	unsigned int cap1;
> +	unsigned int cap2;
> +	unsigned int cap3;
> +	unsigned int cap4;
> +	unsigned int reserved[4];

We use 'resv' in the rest of the am33xx headers, please do 'resv1[4]'
instead for consistency.

> diff --git a/arch/arm/include/asm/arch-am33xx/hardware_am33xx.h b/arch/arm/include/asm/arch-am33xx/hardware_am33xx.h
> index 432f0c7..293ede2 100644
> --- a/arch/arm/include/asm/arch-am33xx/hardware_am33xx.h
> +++ b/arch/arm/include/asm/arch-am33xx/hardware_am33xx.h
> @@ -43,4 +43,11 @@
>  /* RTC base address */
>  #define RTC_BASE			0x44E3E000
>  
> +/* LCD Controller */
> +#define	LCD_CNTL_BASE			0x4830E000

#define<space> not <tab>. Thanks.

-- 
Tom
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[U-Boot] [PATCH 2/7] video, da8xx: move da8xx-fb.h to drivers/video

[Heiko Schocher]

the da8xx-fb driver works also on am335x boards. So move
the da8xx-fb.h file from arch/arm/include/asm/arch-davinci
to drivers/video, so this driver can used from am335x
based boards. Also add WVGA panel_type.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Tom Rini <trini@ti.com>
---
 board/davinci/ea20/ea20.c                                       | 2 +-
 drivers/video/da8xx-fb.c                                        | 2 +-
 {arch/arm/include/asm/arch-davinci => drivers/video}/da8xx-fb.h | 3 ++-
 3 Dateien ge?ndert, 4 Zeilen hinzugef?gt(+), 3 Zeilen entfernt(-)
 rename {arch/arm/include/asm/arch-davinci => drivers/video}/da8xx-fb.h (99%)

diff --git a/board/davinci/ea20/ea20.c b/board/davinci/ea20/ea20.c
index c786997..89ee079 100644
--- a/board/davinci/ea20/ea20.c
+++ b/board/davinci/ea20/ea20.c
@@ -24,7 +24,7 @@
 #include <asm/io.h>
 #include <asm/arch/davinci_misc.h>
 #include <asm/gpio.h>
-#include <asm/arch/da8xx-fb.h>
+#include "../../../drivers/video/da8xx-fb.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index 373991d..dd7ce36 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -24,7 +24,7 @@
 #include <asm/arch/hardware.h>
 
 #include "videomodes.h"
-#include <asm/arch/da8xx-fb.h>
+#include "da8xx-fb.h"
 
 #define DRIVER_NAME "da8xx_lcdc"
 
diff --git a/arch/arm/include/asm/arch-davinci/da8xx-fb.h b/drivers/video/da8xx-fb.h
similarity index 99%
rename from arch/arm/include/asm/arch-davinci/da8xx-fb.h
rename to drivers/video/da8xx-fb.h
index c115034..f48fdfd 100644
--- a/arch/arm/include/asm/arch-davinci/da8xx-fb.h
+++ b/drivers/video/da8xx-fb.h
@@ -17,7 +17,8 @@
 #define DA8XX_FB_H
 
 enum panel_type {
-	QVGA = 0
+	QVGA = 0,
+	WVGA
 };
 
 enum panel_shade {
-- 
1.7.11.7

[U-Boot] [PATCH 2/7] video, da8xx: move da8xx-fb.h to drivers/video

[Tom Rini]

On Sat, Aug 03, 2013 at 07:22:48AM +0200, Heiko Schocher wrote:

> the da8xx-fb driver works also on am335x boards. So move
> the da8xx-fb.h file from arch/arm/include/asm/arch-davinci
> to drivers/video, so this driver can used from am335x
> based boards. Also add WVGA panel_type.
> 
> Signed-off-by: Heiko Schocher <hs@denx.de>
> Cc: Stefano Babic <sbabic@denx.de>
> Cc: Anatolij Gustschin <agust@denx.de>
> Cc: Tom Rini <trini@ti.com>

Acked-by: Tom Rini <trini@ti.com>

-- 
Tom
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[U-Boot] [PATCH 2/7] video, da8xx: move da8xx-fb.h to drivers/video

[Anatolij Gustschin]

On Sat,  3 Aug 2013 07:22:48 +0200
Heiko Schocher <hs@denx.de> wrote:

> the da8xx-fb driver works also on am335x boards. So move
> the da8xx-fb.h file from arch/arm/include/asm/arch-davinci
> to drivers/video, so this driver can used from am335x
> based boards. Also add WVGA panel_type.
> 
> Signed-off-by: Heiko Schocher <hs@denx.de>
> Cc: Stefano Babic <sbabic@denx.de>
> Cc: Anatolij Gustschin <agust@denx.de>
> Cc: Tom Rini <trini@ti.com>
> ---
>  board/davinci/ea20/ea20.c                                       | 2 +-
>  drivers/video/da8xx-fb.c                                        | 2 +-
>  {arch/arm/include/asm/arch-davinci => drivers/video}/da8xx-fb.h | 3 ++-
>  3 Dateien ge?ndert, 4 Zeilen hinzugef?gt(+), 3 Zeilen entfernt(-)
>  rename {arch/arm/include/asm/arch-davinci => drivers/video}/da8xx-fb.h (99%)

Applied to u-boot-video/master, thanks!

Anatolij

[U-Boot] [PATCH 3/7] arm, am33xx: add clk_get prototype

[Heiko Schocher]

the clk_get() function is needed for the da8xx-fb video driver,
which is used on the am3xx based siemens boards.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
---
 arch/arm/include/asm/arch-am33xx/hardware.h | 1 +
 1 Datei ge?ndert, 1 Zeile hinzugef?gt(+)

diff --git a/arch/arm/include/asm/arch-am33xx/hardware.h b/arch/arm/include/asm/arch-am33xx/hardware.h
index 02f5f8a..2dfcc2e 100644
--- a/arch/arm/include/asm/arch-am33xx/hardware.h
+++ b/arch/arm/include/asm/arch-am33xx/hardware.h
@@ -78,4 +78,5 @@
 #define USB0_OTG_BASE			0x47401000
 #define USB1_OTG_BASE			0x47401800
 
+int clk_get(int clk);
 #endif /* __AM33XX_HARDWARE_H */
-- 
1.7.11.7

[U-Boot] [PATCH 3/7] arm, am33xx: add clk_get prototype

[Tom Rini]

On Sat, Aug 03, 2013 at 07:22:49AM +0200, Heiko Schocher wrote:

> the clk_get() function is needed for the da8xx-fb video driver,
> which is used on the am3xx based siemens boards.
> 
> Signed-off-by: Heiko Schocher <hs@denx.de>
> Cc: Tom Rini <trini@ti.com>

Acked-by: Tom Rini <trini@ti.com>

-- 
Tom
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[U-Boot] [PATCH 3/7] arm, am33xx: add clk_get prototype

[Anatolij Gustschin]

On Sat,  3 Aug 2013 07:22:49 +0200
Heiko Schocher <hs@denx.de> wrote:

> the clk_get() function is needed for the da8xx-fb video driver,
> which is used on the am3xx based siemens boards.
> 
> Signed-off-by: Heiko Schocher <hs@denx.de>
> Cc: Tom Rini <trini@ti.com>
> ---
>  arch/arm/include/asm/arch-am33xx/hardware.h | 1 +
>  1 Datei ge?ndert, 1 Zeile hinzugef?gt(+)

Applied to u-boot-video/master, thanks!

Anatolij

[U-Boot] [PATCH 4/7] video, da8xx-fb: changes for am335x usage

[Heiko Schocher]

to use this driver also on am335x based boards, the following
changes are made:

- struct lcd_ctrl_config lcd_cfg is now configurable
  through board code

- controller base is configurable through define
  DA8XX_LCD_CNTL_BASE. To be compatible with older
  da8xx based boards: If this define is missing, the
  DAVINCI_LCD_CNTL_BASE is used

- Determine LCD IP Version, and make the driver
  working on lcd revision register values:
  Version 1:
  0x4C100102
  Version 2:
  0x4F200800
  0x4F201000

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Tom Rini <trini@ti.com>
---
 board/davinci/ea20/ea20.c |  26 +++-
 drivers/video/da8xx-fb.c  | 335 ++++++++++++++++++++++++++++++++++++++--------
 drivers/video/da8xx-fb.h  |   4 +-
 3 Dateien ge?ndert, 307 Zeilen hinzugef?gt(+), 58 Zeilen entfernt(-)

diff --git a/board/davinci/ea20/ea20.c b/board/davinci/ea20/ea20.c
index 89ee079..c4444c7 100644
--- a/board/davinci/ea20/ea20.c
+++ b/board/davinci/ea20/ea20.c
@@ -43,6 +43,30 @@ static const struct da8xx_panel lcd_panel = {
 	.invert_pxl_clk = 0,
 };
 
+static const struct display_panel disp_panel = {
+	QVGA,
+	16,
+	16,
+	COLOR_ACTIVE,
+};
+
+static const struct lcd_ctrl_config lcd_cfg = {
+	&disp_panel,
+	.ac_bias		= 255,
+	.ac_bias_intrpt		= 0,
+	.dma_burst_sz		= 16,
+	.bpp			= 16,
+	.fdd			= 255,
+	.tft_alt_mode		= 0,
+	.stn_565_mode		= 0,
+	.mono_8bit_mode		= 0,
+	.invert_line_clock	= 1,
+	.invert_frm_clock	= 1,
+	.sync_edge		= 0,
+	.sync_ctrl		= 1,
+	.raster_order		= 0,
+};
+
 /* SPI0 pin muxer settings */
 static const struct pinmux_config spi1_pins[] = {
 	{ pinmux(5), 1, 1 },
@@ -259,7 +283,7 @@ int board_init(void)
 	/* address of boot parameters */
 	gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
 
-	da8xx_video_init(&lcd_panel, 16);
+	da8xx_video_init(&lcd_panel, &lcd_cfg, 16);
 
 	return 0;
 }
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index dd7ce36..b0bde2d 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -26,8 +26,15 @@
 #include "videomodes.h"
 #include "da8xx-fb.h"
 
+#if !defined(DA8XX_LCD_CNTL_BASE)
+#define DA8XX_LCD_CNTL_BASE	DAVINCI_LCD_CNTL_BASE
+#endif
+
 #define DRIVER_NAME "da8xx_lcdc"
 
+#define LCD_VERSION_1	1
+#define LCD_VERSION_2	2
+
 /* LCD Status Register */
 #define LCD_END_OF_FRAME1		(1 << 9)
 #define LCD_END_OF_FRAME0		(1 << 8)
@@ -42,9 +49,14 @@
 #define LCD_DMA_BURST_4			0x2
 #define LCD_DMA_BURST_8			0x3
 #define LCD_DMA_BURST_16		0x4
-#define LCD_END_OF_FRAME_INT_ENA	(1 << 2)
+#define LCD_V1_END_OF_FRAME_INT_ENA	(1 << 2)
+#define LCD_V2_END_OF_FRAME0_INT_ENA	(1 << 8)
+#define LCD_V2_END_OF_FRAME1_INT_ENA	(1 << 9)
 #define LCD_DUAL_FRAME_BUFFER_ENABLE	(1 << 0)
 
+#define LCD_V2_TFT_24BPP_MODE		(1 << 25)
+#define LCD_V2_TFT_24BPP_UNPACK		(1 << 26)
+
 /* LCD Control Register */
 #define LCD_CLK_DIVISOR(x)		((x) << 8)
 #define LCD_RASTER_MODE			0x01
@@ -58,12 +70,20 @@
 #define LCD_MONO_8BIT_MODE		(1 << 9)
 #define LCD_RASTER_ORDER		(1 << 8)
 #define LCD_TFT_MODE			(1 << 7)
-#define LCD_UNDERFLOW_INT_ENA		(1 << 6)
-#define LCD_PL_ENABLE			(1 << 4)
+#define LCD_V1_UNDERFLOW_INT_ENA	(1 << 6)
+#define LCD_V2_UNDERFLOW_INT_ENA	(1 << 5)
+#define LCD_V1_PL_INT_ENA		(1 << 4)
+#define LCD_V2_PL_INT_ENA		(1 << 6)
 #define LCD_MONOCHROME_MODE		(1 << 1)
 #define LCD_RASTER_ENABLE		(1 << 0)
 #define LCD_TFT_ALT_ENABLE		(1 << 23)
 #define LCD_STN_565_ENABLE		(1 << 24)
+#define LCD_V2_DMA_CLK_EN		(1 << 2)
+#define LCD_V2_LIDD_CLK_EN		(1 << 1)
+#define LCD_V2_CORE_CLK_EN		(1 << 0)
+#define LCD_V2_LPP_B10			26
+#define LCD_V2_TFT_24BPP_MODE		(1 << 25)
+#define LCD_V2_TFT_24BPP_UNPACK		(1 << 26)
 
 /* LCD Raster Timing 2 Register */
 #define LCD_AC_BIAS_TRANSITIONS_PER_INT(x)	((x) << 16)
@@ -74,6 +94,8 @@
 #define LCD_INVERT_LINE_CLOCK			(1 << 21)
 #define LCD_INVERT_FRAME_CLOCK			(1 << 20)
 
+/* Clock registers available only on Version 2 */
+#define  LCD_CLK_MAIN_RESET			(1 << 3)
 /* LCD Block */
 struct da8xx_lcd_regs {
 	u32	revid;
@@ -97,6 +119,15 @@ struct da8xx_lcd_regs {
 	u32	dma_frm_buf_ceiling_addr_0;
 	u32	dma_frm_buf_base_addr_1;
 	u32	dma_frm_buf_ceiling_addr_1;
+	u32	resv1;
+	u32	raw_stat;
+	u32	masked_stat;
+	u32	int_ena_set;
+	u32	int_ena_clr;
+	u32	end_of_int_ind;
+	/* Clock registers available only on Version 2 */
+	u32	clk_ena;
+	u32	clk_reset;
 };
 
 #define LCD_NUM_BUFFERS	1
@@ -107,6 +138,8 @@ struct da8xx_lcd_regs {
 #define RIGHT_MARGIN	64
 #define UPPER_MARGIN	32
 #define LOWER_MARGIN	32
+#define WAIT_FOR_FRAME_DONE	true
+#define NO_WAIT_FOR_FRAME_DONE	false
 
 #define calc_fbsize() (panel.plnSizeX * panel.plnSizeY * panel.gdfBytesPP)
 
@@ -119,6 +152,8 @@ static GraphicDevice gpanel;
 static const struct da8xx_panel *lcd_panel;
 static struct fb_info *da8xx_fb_info;
 static int bits_x_pixel;
+static unsigned int lcd_revision;
+const struct lcd_ctrl_config *da8xx_lcd_cfg;
 
 static inline unsigned int lcdc_read(u32 *addr)
 {
@@ -179,35 +214,24 @@ static struct fb_fix_screeninfo da8xx_fb_fix = {
 	.accel = FB_ACCEL_NONE
 };
 
-static const struct display_panel disp_panel = {
-	QVGA,
-	16,
-	16,
-	COLOR_ACTIVE,
-};
-
-static const struct lcd_ctrl_config lcd_cfg = {
-	&disp_panel,
-	.ac_bias		= 255,
-	.ac_bias_intrpt		= 0,
-	.dma_burst_sz		= 16,
-	.bpp			= 16,
-	.fdd			= 255,
-	.tft_alt_mode		= 0,
-	.stn_565_mode		= 0,
-	.mono_8bit_mode		= 0,
-	.invert_line_clock	= 1,
-	.invert_frm_clock	= 1,
-	.sync_edge		= 0,
-	.sync_ctrl		= 1,
-	.raster_order		= 0,
-};
-
 /* Enable the Raster Engine of the LCD Controller */
 static inline void lcd_enable_raster(void)
 {
 	u32 reg;
 
+	/* Put LCDC in reset for several cycles */
+	if (lcd_revision == LCD_VERSION_2)
+		lcdc_write(LCD_CLK_MAIN_RESET,
+			   &da8xx_fb_reg_base->clk_reset);
+
+	udelay(1000);
+	/* Bring LCDC out of reset */
+	if (lcd_revision == LCD_VERSION_2)
+		lcdc_write(0,
+			   &da8xx_fb_reg_base->clk_reset);
+
+	udelay(1000);
+
 	reg = lcdc_read(&da8xx_fb_reg_base->raster_ctrl);
 	if (!(reg & LCD_RASTER_ENABLE))
 		lcdc_write(reg | LCD_RASTER_ENABLE,
@@ -215,14 +239,40 @@ static inline void lcd_enable_raster(void)
 }
 
 /* Disable the Raster Engine of the LCD Controller */
-static inline void lcd_disable_raster(void)
+static inline void lcd_disable_raster(bool wait_for_frame_done)
 {
 	u32 reg;
+	u32 loop_cnt = 0;
+	u32 stat;
+	u32 i = 0;
+
+	if (wait_for_frame_done)
+		loop_cnt = 5000;
 
 	reg = lcdc_read(&da8xx_fb_reg_base->raster_ctrl);
 	if (reg & LCD_RASTER_ENABLE)
 		lcdc_write(reg & ~LCD_RASTER_ENABLE,
 			&da8xx_fb_reg_base->raster_ctrl);
+
+	/* Wait for the current frame to complete */
+	do {
+		if (lcd_revision == LCD_VERSION_1)
+			stat = lcdc_read(&da8xx_fb_reg_base->stat);
+		else
+			stat = lcdc_read(&da8xx_fb_reg_base->raw_stat);
+
+		mdelay(1);
+	} while (!(stat & 0x01) && (i++ < loop_cnt));
+
+	if (lcd_revision == LCD_VERSION_1)
+		lcdc_write(stat, &da8xx_fb_reg_base->stat);
+	else
+		lcdc_write(stat, &da8xx_fb_reg_base->raw_stat);
+
+	if ((loop_cnt != 0) && (i >= loop_cnt)) {
+		printf("LCD Controller timed out\n");
+		return;
+	}
 }
 
 static void lcd_blit(int load_mode, struct da8xx_fb_par *par)
@@ -231,6 +281,7 @@ static void lcd_blit(int load_mode, struct da8xx_fb_par *par)
 	u32 end;
 	u32 reg_ras;
 	u32 reg_dma;
+	u32 reg_int;
 
 	/* init reg to clear PLM (loading mode) fields */
 	reg_ras = lcdc_read(&da8xx_fb_reg_base->raster_ctrl);
@@ -243,7 +294,15 @@ static void lcd_blit(int load_mode, struct da8xx_fb_par *par)
 		end      = par->dma_end;
 
 		reg_ras |= LCD_PALETTE_LOAD_MODE(DATA_ONLY);
-		reg_dma |= LCD_END_OF_FRAME_INT_ENA;
+		if (lcd_revision == LCD_VERSION_1) {
+			reg_dma |= LCD_V1_END_OF_FRAME_INT_ENA;
+		} else {
+			reg_int = lcdc_read(&da8xx_fb_reg_base->int_ena_set) |
+				LCD_V2_END_OF_FRAME0_INT_ENA |
+				LCD_V2_END_OF_FRAME1_INT_ENA |
+				LCD_V2_UNDERFLOW_INT_ENA | LCD_SYNC_LOST;
+			lcdc_write(reg_int, &da8xx_fb_reg_base->int_ena_set);
+		}
 
 #if (LCD_NUM_BUFFERS == 2)
 		reg_dma |= LCD_DUAL_FRAME_BUFFER_ENABLE;
@@ -264,7 +323,13 @@ static void lcd_blit(int load_mode, struct da8xx_fb_par *par)
 		end      = start + par->palette_sz - 1;
 
 		reg_ras |= LCD_PALETTE_LOAD_MODE(PALETTE_ONLY);
-		reg_ras |= LCD_PL_ENABLE;
+		if (lcd_revision == LCD_VERSION_1) {
+			reg_ras |= LCD_V1_PL_INT_ENA;
+		} else {
+			reg_int = lcdc_read(&da8xx_fb_reg_base->int_ena_set) |
+				LCD_V2_PL_INT_ENA;
+			lcdc_write(reg_int, &da8xx_fb_reg_base->int_ena_set);
+		}
 
 		lcdc_write(start, &da8xx_fb_reg_base->dma_frm_buf_base_addr_0);
 		lcdc_write(end, &da8xx_fb_reg_base->dma_frm_buf_ceiling_addr_0);
@@ -348,6 +413,7 @@ static void lcd_cfg_vertical_sync(int back_porch, int pulse_width,
 static int lcd_cfg_display(const struct lcd_ctrl_config *cfg)
 {
 	u32 reg;
+	u32 reg_int;
 
 	reg = lcdc_read(&da8xx_fb_reg_base->raster_ctrl) & ~(LCD_TFT_MODE |
 						LCD_MONO_8BIT_MODE |
@@ -375,7 +441,13 @@ static int lcd_cfg_display(const struct lcd_ctrl_config *cfg)
 	}
 
 	/* enable additional interrupts here */
-	reg |= LCD_UNDERFLOW_INT_ENA;
+	if (lcd_revision == LCD_VERSION_1) {
+		reg |= LCD_V1_UNDERFLOW_INT_ENA;
+	} else {
+		reg_int = lcdc_read(&da8xx_fb_reg_base->int_ena_set) |
+			LCD_V2_UNDERFLOW_INT_ENA;
+		lcdc_write(reg_int, &da8xx_fb_reg_base->int_ena_set);
+	}
 
 	lcdc_write(reg, &da8xx_fb_reg_base->raster_ctrl);
 
@@ -413,22 +485,53 @@ static int lcd_cfg_frame_buffer(struct da8xx_fb_par *par, u32 width, u32 height,
 
 	/* Set the Panel Width */
 	/* Pixels per line = (PPL + 1)*16 */
-	/*0x3F in bits 4..9 gives max horisontal resolution = 1024 pixels*/
-	width &= 0x3f0;
+	if (lcd_revision == LCD_VERSION_1) {
+		/*
+		 * 0x3F in bits 4..9 gives max horisontal resolution = 1024
+		 * pixels
+		 */
+		width &= 0x3f0;
+	} else {
+		/*
+		 * 0x7F in bits 4..10 gives max horizontal resolution = 2048
+		 * pixels.
+		 */
+		width &= 0x7f0;
+	}
 	reg = lcdc_read(&da8xx_fb_reg_base->raster_timing_0);
 	reg &= 0xfffffc00;
-	reg |= ((width >> 4) - 1) << 4;
+	if (lcd_revision == LCD_VERSION_1) {
+		reg |= ((width >> 4) - 1) << 4;
+	} else {
+		width = (width >> 4) - 1;
+		reg |= ((width & 0x3f) << 4) | ((width & 0x40) >> 3);
+	}
 	lcdc_write(reg, &da8xx_fb_reg_base->raster_timing_0);
 
 	/* Set the Panel Height */
+	/* Set bits 9:0 of Lines Per Pixel */
 	reg = lcdc_read(&da8xx_fb_reg_base->raster_timing_1);
 	reg = ((height - 1) & 0x3ff) | (reg & 0xfffffc00);
 	lcdc_write(reg, &da8xx_fb_reg_base->raster_timing_1);
 
+	/* Set bit 10 of Lines Per Pixel */
+	if (lcd_revision == LCD_VERSION_2) {
+		reg = lcdc_read(&da8xx_fb_reg_base->raster_timing_2);
+		reg |= ((height - 1) & 0x400) << 16;
+		lcdc_write(reg, &da8xx_fb_reg_base->raster_timing_2);
+	}
+
 	/* Set the Raster Order of the Frame Buffer */
 	reg = lcdc_read(&da8xx_fb_reg_base->raster_ctrl) & ~(1 << 8);
 	if (raster_order)
 		reg |= LCD_RASTER_ORDER;
+
+	if (bpp == 24)
+		reg |= (LCD_TFT_MODE | LCD_V2_TFT_24BPP_MODE);
+	else if (bpp == 32)
+		reg |= (LCD_TFT_MODE | LCD_V2_TFT_24BPP_MODE
+				| LCD_V2_TFT_24BPP_UNPACK);
+
 	lcdc_write(reg, &da8xx_fb_reg_base->raster_ctrl);
 
 	switch (bpp) {
@@ -436,6 +539,8 @@ static int lcd_cfg_frame_buffer(struct da8xx_fb_par *par, u32 width, u32 height,
 	case 2:
 	case 4:
 	case 16:
+	case 24:
+	case 32:
 		par->palette_sz = 16 * 2;
 		break;
 
@@ -494,6 +599,23 @@ static int fb_setcolreg(unsigned regno, unsigned red, unsigned green,
 			update_hw = 1;
 			palette[0] = 0x4000;
 		}
+	} else if (((info->var.bits_per_pixel == 32) && regno < 32) ||
+		   ((info->var.bits_per_pixel == 24) && regno < 24)) {
+		red >>= (24 - info->var.red.length);
+		red <<= info->var.red.offset;
+
+		green >>= (24 - info->var.green.length);
+		green <<= info->var.green.offset;
+
+		blue >>= (24 - info->var.blue.length);
+		blue <<= info->var.blue.offset;
+
+		par->pseudo_palette[regno] = red | green | blue;
+
+		if (palette[0] != 0x4000) {
+			update_hw = 1;
+			palette[0] = 0x4000;
+		}
 	}
 
 	/* Update the palette in the h/w as needed. */
@@ -506,11 +628,18 @@ static int fb_setcolreg(unsigned regno, unsigned red, unsigned green,
 static void lcd_reset(struct da8xx_fb_par *par)
 {
 	/* Disable the Raster if previously Enabled */
-	lcd_disable_raster();
+	lcd_disable_raster(NO_WAIT_FOR_FRAME_DONE);
 
 	/* DMA has to be disabled */
 	lcdc_write(0, &da8xx_fb_reg_base->dma_ctrl);
 	lcdc_write(0, &da8xx_fb_reg_base->raster_ctrl);
+
+	if (lcd_revision == LCD_VERSION_2) {
+		lcdc_write(0, &da8xx_fb_reg_base->int_ena_set);
+		/* Write 1 to reset */
+		lcdc_write(LCD_CLK_MAIN_RESET, &da8xx_fb_reg_base->clk_reset);
+		lcdc_write(0, &da8xx_fb_reg_base->clk_reset);
+	}
 }
 
 static void lcd_calc_clk_divider(struct da8xx_fb_par *par)
@@ -521,12 +650,17 @@ static void lcd_calc_clk_divider(struct da8xx_fb_par *par)
 	lcd_clk = clk_get(2);
 
 	div = lcd_clk / par->pxl_clk;
-	debug("LCD Clock: 0x%x Divider: 0x%x PixClk: 0x%x\n",
-		lcd_clk, div, par->pxl_clk);
+	debug("LCD Clock: %d Divider: %d PixClk: %d\n",
+	      lcd_clk, div, par->pxl_clk);
 
 	/* Configure the LCD clock divisor. */
 	lcdc_write(LCD_CLK_DIVISOR(div) |
 			(LCD_RASTER_MODE & 0x1), &da8xx_fb_reg_base->ctrl);
+
+	if (lcd_revision == LCD_VERSION_2)
+		lcdc_write(LCD_V2_DMA_CLK_EN | LCD_V2_LIDD_CLK_EN |
+				LCD_V2_CORE_CLK_EN,
+				&da8xx_fb_reg_base->clk_ena);
 }
 
 static int lcd_init(struct da8xx_fb_par *par, const struct lcd_ctrl_config *cfg,
@@ -566,7 +700,8 @@ static int lcd_init(struct da8xx_fb_par *par, const struct lcd_ctrl_config *cfg,
 	if (ret < 0)
 		return ret;
 
-	if (QVGA != cfg->p_disp_panel->panel_type)
+	if ((QVGA != cfg->p_disp_panel->panel_type) &&
+	    (WVGA != cfg->p_disp_panel->panel_type))
 		return -EINVAL;
 
 	if (cfg->bpp <= cfg->p_disp_panel->max_bpp &&
@@ -602,7 +737,7 @@ static void lcdc_dma_start(void)
 		&da8xx_fb_reg_base->dma_frm_buf_ceiling_addr_1);
 }
 
-static u32 lcdc_irq_handler(void)
+static u32 lcdc_irq_handler_rev01(void)
 {
 	struct da8xx_fb_par *par = da8xx_fb_info->par;
 	u32 stat = lcdc_read(&da8xx_fb_reg_base->stat);
@@ -610,7 +745,7 @@ static u32 lcdc_irq_handler(void)
 
 	if ((stat & LCD_SYNC_LOST) && (stat & LCD_FIFO_UNDERFLOW)) {
 		debug("LCD_SYNC_LOST\n");
-		lcd_disable_raster();
+		lcd_disable_raster(NO_WAIT_FOR_FRAME_DONE);
 		lcdc_write(stat, &da8xx_fb_reg_base->stat);
 		lcd_enable_raster();
 		return LCD_SYNC_LOST;
@@ -622,13 +757,13 @@ static u32 lcdc_irq_handler(void)
 		 * interrupt via the following write to the status register. If
 		 * this is done after then one gets multiple PL done interrupts.
 		 */
-		lcd_disable_raster();
+		lcd_disable_raster(NO_WAIT_FOR_FRAME_DONE);
 
 		lcdc_write(stat, &da8xx_fb_reg_base->stat);
 
 		/* Disable PL completion inerrupt */
 		reg_ras  = lcdc_read(&da8xx_fb_reg_base->raster_ctrl);
-		reg_ras &= ~LCD_PL_ENABLE;
+		reg_ras &= ~LCD_V1_PL_INT_ENA;
 		lcdc_write(reg_ras, &da8xx_fb_reg_base->raster_ctrl);
 
 		/* Setup and start data loading mode */
@@ -650,6 +785,66 @@ static u32 lcdc_irq_handler(void)
 	return stat;
 }
 
+static u32 lcdc_irq_handler_rev02(void)
+{
+	struct da8xx_fb_par *par = da8xx_fb_info->par;
+	u32 stat = lcdc_read(&da8xx_fb_reg_base->masked_stat);
+	u32 reg_int;
+
+	if ((stat & LCD_SYNC_LOST) && (stat & LCD_FIFO_UNDERFLOW)) {
+		debug("LCD_SYNC_LOST\n");
+		lcd_disable_raster(NO_WAIT_FOR_FRAME_DONE);
+		lcdc_write(stat, &da8xx_fb_reg_base->masked_stat);
+		lcd_enable_raster();
+		lcdc_write(0, &da8xx_fb_reg_base->end_of_int_ind);
+		return LCD_SYNC_LOST;
+	} else if (stat & LCD_PL_LOAD_DONE) {
+		debug("LCD_PL_LOAD_DONE\n");
+		/*
+		 * Must disable raster before changing state of any control bit.
+		 * And also must be disabled before clearing the PL loading
+		 * interrupt via the following write to the status register. If
+		 * this is done after then one gets multiple PL done interrupts.
+		 */
+		lcd_disable_raster(NO_WAIT_FOR_FRAME_DONE);
+
+		lcdc_write(stat, &da8xx_fb_reg_base->masked_stat);
+
+		/* Disable PL completion inerrupt */
+		reg_int  = lcdc_read(&da8xx_fb_reg_base->int_ena_clr) |
+			(LCD_V2_PL_INT_ENA);
+		lcdc_write(reg_int, &da8xx_fb_reg_base->int_ena_clr);
+
+		/* Setup and start data loading mode */
+		lcd_blit(LOAD_DATA, par);
+		lcdc_write(0, &da8xx_fb_reg_base->end_of_int_ind);
+		return LCD_PL_LOAD_DONE;
+	} else {
+		lcdc_write(stat, &da8xx_fb_reg_base->masked_stat);
+
+		if (stat & LCD_END_OF_FRAME0)
+			debug("LCD_END_OF_FRAME0\n");
+
+		lcdc_write(par->dma_start,
+			   &da8xx_fb_reg_base->dma_frm_buf_base_addr_0);
+		lcdc_write(par->dma_end,
+			   &da8xx_fb_reg_base->dma_frm_buf_ceiling_addr_0);
+		par->vsync_flag = 1;
+		lcdc_write(0, &da8xx_fb_reg_base->end_of_int_ind);
+		return LCD_END_OF_FRAME0;
+	}
+	lcdc_write(0, &da8xx_fb_reg_base->end_of_int_ind);
+	return stat;
+}
+
+static u32 lcdc_irq_handler(void)
+{
+	if (lcd_revision == LCD_VERSION_1)
+		return lcdc_irq_handler_rev01();
+	else
+		return lcdc_irq_handler_rev02();
+}
+
 static u32 wait_for_event(u32 event)
 {
 	u32 timeout = 50000;
@@ -673,6 +868,7 @@ void *video_hw_init(void)
 {
 	struct da8xx_fb_par *par;
 	u32 size;
+	u32 rev;
 	char *p;
 
 	if (!lcd_panel) {
@@ -685,6 +881,10 @@ void *video_hw_init(void)
 	gpanel.plnSizeY = lcd_panel->height;
 
 	switch (bits_x_pixel) {
+	case 32:
+		gpanel.gdfBytesPP = 4;
+		gpanel.gdfIndex = GDF_32BIT_X888RGB;
+		break;
 	case 24:
 		gpanel.gdfBytesPP = 4;
 		gpanel.gdfIndex = GDF_32BIT_X888RGB;
@@ -699,12 +899,29 @@ void *video_hw_init(void)
 		break;
 	}
 
-	da8xx_fb_reg_base = (struct da8xx_lcd_regs *)DAVINCI_LCD_CNTL_BASE;
+	da8xx_fb_reg_base = (struct da8xx_lcd_regs *)DA8XX_LCD_CNTL_BASE;
+
+	/* Determine LCD IP Version */
+	rev = lcdc_read(&da8xx_fb_reg_base->revid);
+	switch (rev) {
+	case 0x4C100102:
+		lcd_revision = LCD_VERSION_1;
+		break;
+	case 0x4F200800:
+	case 0x4F201000:
+		lcd_revision = LCD_VERSION_2;
+		break;
+	default:
+		printf("Unknown PID Reg value 0x%x, defaulting to LCD revision 1\n",
+		       rev);
+		lcd_revision = LCD_VERSION_1;
+		break;
+	}
 
-	debug("Resolution: %dx%d %x\n",
-		gpanel.winSizeX,
-		gpanel.winSizeY,
-		lcd_cfg.bpp);
+	debug("rev: 0x%x Resolution: %dx%d %d\n", rev,
+	      gpanel.winSizeX,
+	      gpanel.winSizeY,
+	      da8xx_lcd_cfg->bpp);
 
 	size = sizeof(struct fb_info) + sizeof(struct da8xx_fb_par);
 	da8xx_fb_info = malloc(size);
@@ -722,13 +939,14 @@ void *video_hw_init(void)
 	par = da8xx_fb_info->par;
 	par->pxl_clk = lcd_panel->pxl_clk;
 
-	if (lcd_init(par, &lcd_cfg, lcd_panel) < 0) {
+	if (lcd_init(par, da8xx_lcd_cfg, lcd_panel) < 0) {
 		printf("lcd_init failed\n");
 		goto err_release_fb;
 	}
 
 	/* allocate frame buffer */
-	par->vram_size = lcd_panel->width * lcd_panel->height * lcd_cfg.bpp;
+	par->vram_size = lcd_panel->width * lcd_panel->height *
+			da8xx_lcd_cfg->bpp;
 	par->vram_size = par->vram_size * LCD_NUM_BUFFERS / 8;
 
 	par->vram_virt = malloc(par->vram_size);
@@ -746,7 +964,7 @@ void *video_hw_init(void)
 	da8xx_fb_info->screen_base = (char *) par->vram_virt;
 	da8xx_fb_fix.smem_start	= gpanel.frameAdrs;
 	da8xx_fb_fix.smem_len = par->vram_size;
-	da8xx_fb_fix.line_length = (lcd_panel->width * lcd_cfg.bpp) / 8;
+	da8xx_fb_fix.line_length = (lcd_panel->width * da8xx_lcd_cfg->bpp) / 8;
 
 	par->dma_start = par->vram_phys;
 	par->dma_end   = par->dma_start + lcd_panel->height *
@@ -762,7 +980,7 @@ void *video_hw_init(void)
 	par->p_palette_base = (unsigned int)par->v_palette_base;
 
 	/* Initialize par */
-	da8xx_fb_info->var.bits_per_pixel = lcd_cfg.bpp;
+	da8xx_fb_info->var.bits_per_pixel = da8xx_lcd_cfg->bpp;
 
 	da8xx_fb_var.xres = lcd_panel->width;
 	da8xx_fb_var.xres_virtual = lcd_panel->width;
@@ -771,8 +989,8 @@ void *video_hw_init(void)
 	da8xx_fb_var.yres_virtual = lcd_panel->height * LCD_NUM_BUFFERS;
 
 	da8xx_fb_var.grayscale =
-	    lcd_cfg.p_disp_panel->panel_shade == MONOCHROME ? 1 : 0;
-	da8xx_fb_var.bits_per_pixel = lcd_cfg.bpp;
+	    da8xx_lcd_cfg->p_disp_panel->panel_shade == MONOCHROME ? 1 : 0;
+	da8xx_fb_var.bits_per_pixel = da8xx_lcd_cfg->bpp;
 
 	da8xx_fb_var.hsync_len = lcd_panel->hsw;
 	da8xx_fb_var.vsync_len = lcd_panel->vsw;
@@ -787,8 +1005,11 @@ void *video_hw_init(void)
 
 	/* Clear interrupt */
 	memset((void *)par->vram_virt, 0, par->vram_size);
-	lcd_disable_raster();
-	lcdc_write(0xFFFF, &da8xx_fb_reg_base->stat);
+	lcd_disable_raster(NO_WAIT_FOR_FRAME_DONE);
+	if (lcd_revision == LCD_VERSION_1)
+		lcdc_write(0xFFFF, &da8xx_fb_reg_base->stat);
+	else
+		lcdc_write(0xFFFF, &da8xx_fb_reg_base->masked_stat);
 	debug("Palette at 0x%x size %d\n", par->p_palette_base,
 		par->palette_sz);
 	lcdc_dma_start();
@@ -823,8 +1044,10 @@ void video_set_lut(unsigned int index,	/* color number */
 	return;
 }
 
-void da8xx_video_init(const struct da8xx_panel *panel, int bits_pixel)
+void da8xx_video_init(const struct da8xx_panel *panel,
+		      const struct lcd_ctrl_config *lcd_cfg, int bits_pixel)
 {
 	lcd_panel = panel;
+	da8xx_lcd_cfg = lcd_cfg;
 	bits_x_pixel = bits_pixel;
 }
diff --git a/drivers/video/da8xx-fb.h b/drivers/video/da8xx-fb.h
index f48fdfd..6447a40 100644
--- a/drivers/video/da8xx-fb.h
+++ b/drivers/video/da8xx-fb.h
@@ -109,6 +109,8 @@ struct lcd_sync_arg {
 	int pulse_width;
 };
 
-void da8xx_video_init(const struct da8xx_panel *panel, int bits_pixel);
+void da8xx_video_init(const struct da8xx_panel *panel,
+		      const struct lcd_ctrl_config *lcd_cfg,
+		      int bits_pixel);
 
 #endif  /* ifndef DA8XX_FB_H */
-- 
1.7.11.7

[U-Boot] [PATCH 4/7] video, da8xx-fb: changes for am335x usage

[Tom Rini]

On Sat, Aug 03, 2013 at 07:22:50AM +0200, Heiko Schocher wrote:

> to use this driver also on am335x based boards, the following
> changes are made:
> 
> - struct lcd_ctrl_config lcd_cfg is now configurable
>   through board code
> 
> - controller base is configurable through define
>   DA8XX_LCD_CNTL_BASE. To be compatible with older
>   da8xx based boards: If this define is missing, the
>   DAVINCI_LCD_CNTL_BASE is used
> 
> - Determine LCD IP Version, and make the driver
>   working on lcd revision register values:
>   Version 1:
>   0x4C100102
>   Version 2:
>   0x4F200800
>   0x4F201000
> 
> Signed-off-by: Heiko Schocher <hs@denx.de>
> Cc: Stefano Babic <sbabic@denx.de>
> Cc: Anatolij Gustschin <agust@denx.de>
> Cc: Tom Rini <trini@ti.com>

Acked-by: Tom Rini <trini@ti.com>

-- 
Tom
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[U-Boot] [PATCH 4/7] video, da8xx-fb: changes for am335x usage

[Anatolij Gustschin]

On Sat,  3 Aug 2013 07:22:50 +0200
Heiko Schocher <hs@denx.de> wrote:

> to use this driver also on am335x based boards, the following
> changes are made:
> 
> - struct lcd_ctrl_config lcd_cfg is now configurable
>   through board code
> 
> - controller base is configurable through define
>   DA8XX_LCD_CNTL_BASE. To be compatible with older
>   da8xx based boards: If this define is missing, the
>   DAVINCI_LCD_CNTL_BASE is used
> 
> - Determine LCD IP Version, and make the driver
>   working on lcd revision register values:
>   Version 1:
>   0x4C100102
>   Version 2:
>   0x4F200800
>   0x4F201000
> 
> Signed-off-by: Heiko Schocher <hs@denx.de>
> Cc: Stefano Babic <sbabic@denx.de>
> Cc: Anatolij Gustschin <agust@denx.de>
> Cc: Tom Rini <trini@ti.com>
> ---
>  board/davinci/ea20/ea20.c |  26 +++-
>  drivers/video/da8xx-fb.c  | 335 ++++++++++++++++++++++++++++++++++++++--------
>  drivers/video/da8xx-fb.h  |   4 +-
>  3 Dateien ge?ndert, 307 Zeilen hinzugef?gt(+), 58 Zeilen entfernt(-)

Applied to u-boot-video/master, thanks!

Anatolij

[U-Boot] [PATCH 5/7] video, da8xx-fb: show fb addr in bdinfo

[Heiko Schocher]

without this patch the bdinfo command shows:
U-Boot# bd
arch_number = 0x000010DC
[...]
sp start    = 0x8EF32F20
FB base     = 0x00000000

with this patch it shows the address where the framebuffer
for this video driver start:

arch_number = 0x000010DC
[...]
sp start    = 0x8EF32F20
FB base     = 0x8EF3C788

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Tom Rini <trini@ti.com>
---
 drivers/video/da8xx-fb.c | 1 +
 1 Datei ge?ndert, 1 Zeile hinzugef?gt(+)

diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index b0bde2d..3a5f325 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -959,6 +959,7 @@ void *video_hw_init(void)
 		printf("GLCD: malloc for frame buffer failed\n");
 		goto err_release_fb;
 	}
+	gd->fb_base = (int)par->vram_virt;
 
 	gpanel.frameAdrs = (unsigned int)par->vram_virt;
 	da8xx_fb_info->screen_base = (char *) par->vram_virt;
-- 
1.7.11.7

[U-Boot] [PATCH 5/7] video, da8xx-fb: show fb addr in bdinfo

[Tom Rini]

On Sat, Aug 03, 2013 at 07:22:51AM +0200, Heiko Schocher wrote:

> without this patch the bdinfo command shows:
> U-Boot# bd
> arch_number = 0x000010DC
> [...]
> sp start    = 0x8EF32F20
> FB base     = 0x00000000
> 
> with this patch it shows the address where the framebuffer
> for this video driver start:
> 
> arch_number = 0x000010DC
> [...]
> sp start    = 0x8EF32F20
> FB base     = 0x8EF3C788
> 
> Signed-off-by: Heiko Schocher <hs@denx.de>
> Cc: Anatolij Gustschin <agust@denx.de>
> Cc: Tom Rini <trini@ti.com>

Acked-by: Tom Rini <trini@ti.com>

-- 
Tom
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[U-Boot] [PATCH 5/7] video, da8xx-fb: show fb addr in bdinfo

[Anatolij Gustschin]

On Sat,  3 Aug 2013 07:22:51 +0200
Heiko Schocher <hs@denx.de> wrote:

> without this patch the bdinfo command shows:
> U-Boot# bd
> arch_number = 0x000010DC
> [...]
> sp start    = 0x8EF32F20
> FB base     = 0x00000000
> 
> with this patch it shows the address where the framebuffer
> for this video driver start:
> 
> arch_number = 0x000010DC
> [...]
> sp start    = 0x8EF32F20
> FB base     = 0x8EF3C788
> 
> Signed-off-by: Heiko Schocher <hs@denx.de>
> Cc: Anatolij Gustschin <agust@denx.de>
> Cc: Tom Rini <trini@ti.com>
> ---
>  drivers/video/da8xx-fb.c | 1 +
>  1 Datei ge?ndert, 1 Zeile hinzugef?gt(+)

Applied to u-boot-video/master, thanks!

Anatolij

[U-Boot] [PATCH 6/7] tools, bmp_logo: fix index from uint16_t to int to allow bigger logos

[Heiko Schocher]

when generating the bmp_logo_bitmap, the index is casted
as an uint16_t. So bigger logos as 65535 bytes are converted wrong
Fix this.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
---
 tools/bmp_logo.c | 2 +-
 1 Datei ge?ndert, 1 Zeile hinzugef?gt(+), 1 Zeile entfernt(-)

diff --git a/tools/bmp_logo.c b/tools/bmp_logo.c
index b2ad3d5..2247adc 100644
--- a/tools/bmp_logo.c
+++ b/tools/bmp_logo.c
@@ -179,7 +179,7 @@ int main (int argc, char *argv[])
 	printf("unsigned char bmp_logo_bitmap[] = {\n");
 	for (i=(b->height-1)*b->width; i>=0; i-=b->width) {
 		for (x = 0; x < b->width; x++) {
-			b->data[(uint16_t) i + x] = (uint8_t) fgetc (fp) \
+			b->data[i + x] = (uint8_t) fgetc(fp)
 						+ DEFAULT_CMAP_SIZE;
 		}
 	}
-- 
1.7.11.7

[U-Boot] [PATCH 6/7] tools, bmp_logo: fix index from uint16_t to int to allow bigger logos

[Anatolij Gustschin]

On Sat,  3 Aug 2013 07:22:52 +0200
Heiko Schocher <hs@denx.de> wrote:

> when generating the bmp_logo_bitmap, the index is casted
> as an uint16_t. So bigger logos as 65535 bytes are converted wrong
> Fix this.
> 
> Signed-off-by: Heiko Schocher <hs@denx.de>
> Cc: Anatolij Gustschin <agust@denx.de>
> ---
>  tools/bmp_logo.c | 2 +-
>  1 Datei ge?ndert, 1 Zeile hinzugef?gt(+), 1 Zeile entfernt(-)

Applied to u-boot-video/master, thanks!

Anatolij

[U-Boot] [PATCH 7/7] video: add an option to skip cfb console init

[Heiko Schocher]

This patch add an option to skip cfb console init for boards
who want to show a logo, but not use the cfb console. This is
needed for the siemens boards, which have a bmp bootlogo, but
do not need the cfb console.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
---
 drivers/video/cfb_console.c | 18 ++++++++++++++++++
 1 Datei ge?ndert, 18 Zeilen hinzugef?gt(+)

diff --git a/drivers/video/cfb_console.c b/drivers/video/cfb_console.c
index 96ef8f9..822ed28 100644
--- a/drivers/video/cfb_console.c
+++ b/drivers/video/cfb_console.c
@@ -431,6 +431,19 @@ static const int video_font_draw_table32[16][4] = {
 	{0x00ffffff, 0x00ffffff, 0x00ffffff, 0x00ffffff}
 };
 
+/*
+ * Implement a weak default function for boards that optionally
+ * need to skip the cfb initialization.
+ */
+int __board_cfb_skip(void)
+{
+	/* As default, don't skip cfb init */
+	return 0;
+}
+
+int board_cfb_skip(void)
+	__attribute__ ((weak, alias("__board_cfb_skip")));
+
 static void video_drawchars(int xx, int yy, unsigned char *s, int count)
 {
 	u8 *cdat, *dest, *dest0;
@@ -1996,6 +2009,8 @@ static void *video_logo(void)
 		return video_fb_address + video_logo_height * VIDEO_LINE_LEN;
 	}
 #endif
+	if (board_cfb_skip())
+		return 0;
 
 	sprintf(info, " %s", version_string);
 
@@ -2205,6 +2220,9 @@ int drv_video_init(void)
 	/* Init video chip - returns with framebuffer cleared */
 	skip_dev_init = (video_init() == -1);
 
+	if (board_cfb_skip())
+		return 0;
+
 #if !defined(CONFIG_VGA_AS_SINGLE_DEVICE)
 	debug("KBD: Keyboard init ...\n");
 	skip_dev_init |= (VIDEO_KBD_INIT_FCT == -1);
-- 
1.7.11.7

[U-Boot] [PATCH 7/7] video: add an option to skip cfb console init

[Tom Rini]

On Sat, Aug 03, 2013 at 07:22:53AM +0200, Heiko Schocher wrote:

> This patch add an option to skip cfb console init for boards
> who want to show a logo, but not use the cfb console. This is
> needed for the siemens boards, which have a bmp bootlogo, but
> do not need the cfb console.
> 
> Signed-off-by: Heiko Schocher <hs@denx.de>
> Cc: Anatolij Gustschin <agust@denx.de>
> ---
>  drivers/video/cfb_console.c | 18 ++++++++++++++++++
>  1 Datei ge??ndert, 18 Zeilen hinzugef??gt(+)
> 
> diff --git a/drivers/video/cfb_console.c b/drivers/video/cfb_console.c
> index 96ef8f9..822ed28 100644
> --- a/drivers/video/cfb_console.c
> +++ b/drivers/video/cfb_console.c
> @@ -431,6 +431,19 @@ static const int video_font_draw_table32[16][4] = {
>  	{0x00ffffff, 0x00ffffff, 0x00ffffff, 0x00ffffff}
>  };
>  
> +/*
> + * Implement a weak default function for boards that optionally
> + * need to skip the cfb initialization.
> + */
> +int __board_cfb_skip(void)
> +{
> +	/* As default, don't skip cfb init */
> +	return 0;
> +}
> +
> +int board_cfb_skip(void)
> +	__attribute__ ((weak, alias("__board_cfb_skip")));

Add <linux/compiler.h> and use '__weak int board_cfb_skip(void)'.

-- 
Tom
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[U-Boot] [PATCH 7/7] video: add an option to skip cfb console init

[Anatolij Gustschin]

On Sat,  3 Aug 2013 07:22:53 +0200
Heiko Schocher <hs@denx.de> wrote:

> This patch add an option to skip cfb console init for boards
> who want to show a logo, but not use the cfb console. This is
> needed for the siemens boards, which have a bmp bootlogo, but
> do not need the cfb console.
> 
> Signed-off-by: Heiko Schocher <hs@denx.de>
> Cc: Anatolij Gustschin <agust@denx.de>
> ---
>  drivers/video/cfb_console.c | 18 ++++++++++++++++++
>  1 Datei ge?ndert, 18 Zeilen hinzugef?gt(+)

Applied to u-boot-video/master after changing to use __weak, thanks!

Anatolij