[U-Boot] [PATCH v2 02/10] arm: vf610: clean-up anadig register struct

Marcel Ziswiler
2013-09-30T11:26:07Z

From: Marcel Ziswiler <marcel.ziswiler@toradex.com>

Rename all the reserved fields using a memory offset based scheme.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
---
arch/arm/include/asm/arch-vf610/crm_regs.h | 54 ++++++++++++++--------------
1 file changed, 27 insertions(+), 27 deletions(-)

diff --git a/arch/arm/include/asm/arch-vf610/crm_regs.h b/arch/arm/include/asm/arch-vf610/crm_regs.h
index 57a0242..2d7a32d 100644
--- a/arch/arm/include/asm/arch-vf610/crm_regs.h
+++ b/arch/arm/include/asm/arch-vf610/crm_regs.h
@@ -55,59 +55,59 @@ struct ccm_reg {

/* Analog components control digital interface (ANADIG) */
struct anadig_reg {
- u32 resvA[4];
+ u32 reserved_0x000[4];
u32 pll3_ctrl;
- u32 resv0[3];
+ u32 reserved_0x014[3];
u32 pll7_ctrl;
- u32 resv1[3];
+ u32 reserved_0x024[3];
u32 pll2_ctrl;
- u32 resv2[3];
+ u32 reserved_0x034[3];
u32 pll2_ss;
- u32 resv3[3];
+ u32 reserved_0x044[3];
u32 pll2_num;
- u32 resv4[3];
+ u32 reserved_0x054[3];
u32 pll2_denom;
- u32 resv5[3];
+ u32 reserved_0x064[3];
u32 pll4_ctrl;
- u32 resv6[3];
+ u32 reserved_0x074[3];
u32 pll4_num;
- u32 resv7[3];
+ u32 reserved_0x084[3];
u32 pll4_denom;
- u32 resvB[3];
+ u32 reserved_0x094[3];
u32 pll6_ctrl;
- u32 resv8[3];
+ u32 reserved_0x0A4[3];
u32 pll6_num;
- u32 resv9[3];
+ u32 reserved_0x0B4[3];
u32 pll6_denom;
- u32 resv10[7];
+ u32 reserved_0x0C4[7];
u32 pll5_ctrl;
- u32 resv11[3];
+ u32 reserved_0x0E4[3];
u32 pll3_pfd;
- u32 resv12[3];
+ u32 reserved_0x0F4[3];
u32 pll2_pfd;
- u32 resv13[3];
+ u32 reserved_0x104[3];
u32 reg_1p1;
- u32 resv14[3];
+ u32 reserved_0x114[3];
u32 reg_3p0;
- u32 resv15[3];
+ u32 reserved_0x124[3];
u32 reg_2p5;
- u32 resv16[7];
+ u32 reserved_0x134[7];
u32 ana_misc0;
- u32 resv17[3];
+ u32 reserved_0x154[3];
u32 ana_misc1;
- u32 resv18[63];
+ u32 reserved_0x164[63];
u32 anadig_digprog;
- u32 resv19[3];
+ u32 reserved_0x264[3];
u32 pll1_ctrl;
- u32 resv20[3];
+ u32 reserved_0x274[3];
u32 pll1_ss;
- u32 resv21[3];
+ u32 reserved_0x284[3];
u32 pll1_num;
- u32 resv22[3];
+ u32 reserved_0x294[3];
u32 pll1_denom;
- u32 resv23[3];
+ u32 reserved_0x2A4[3];
u32 pll1_pdf;
- u32 resv24[3];
+ u32 reserved_0x2B4[3];
u32 pll_lock;
};
#endif
--
1.7.9.5