[U-Boot] Question re HYP mode and IRQ/FIQ stack setting

Christoffer Dall
2013-11-13T15:16:06Z

On 12 November 2013 22:22, Albert ARIBAUD <albert.u.boot@aribaud.net> wrote:
> Hi Christoffer,
>
> On Tue, 12 Nov 2013 14:34:00 -0800, Christoffer Dall
> <christoffer.dall@linaro.org> wrote:
>
>> On 12 November 2013 13:29, Albert ARIBAUD <albert.u.boot@aribaud.net> wrote:
>> > Hi Christoffer,
>> >
>> > On Tue, 12 Nov 2013 09:09:23 -0800, Christoffer Dall
>> > <christoffer.dall@linaro.org> wrote:
>> >
>> >> I suspect that if you are in Hyp mode, you should not worry about
>> >> FIQ/IRQ mode, but just make sure to configure Hyp mode properly to
>> >> handle interrupts. (it's a separate entry in the exception vector and
>> >> you probably need to look at the HSR register whn you've taken an
>> >> interrupt). So, as Andre suggests below, it depends on your use case.
>> >
>> > Ok, so les me try to sum that up from my perspective (IRQ and FIQ
>> > stacks in U-Boot):
>> >
>> > Some ARM U-Boot targets run in SVC32 mode, and some in HYP mode.
>> >
>> > For targets which run in SVC32 mode: aborts execute in abort mode, IRQs
>> > in IRQ mode, FIQs in FIQ mode, etc., each mode having its own stack.
>>
>> correct
>>
>> >
>> > For targets which run in HYP mode: aborts, FIQ and IRQs all run in HYP
>> > mode, using always the same stack.
>>
>> correct.
>>
>> >
>> > In both types of targers: prefetch and data aborts, FIQs and IRQs
>> > execute through the usual vectors; in SVC32 mode, because there's no
>> > other way; in HYP mode, because exceptions occurring while in HYP
>> > mode use the normal vector, not the HYP vector.
>> >
>> > Correct?
>> >
>>
>> no, this sounds fishy. Look at the ARM ARMv7 (DDI 0406C.b) page
>> B1-1166. Table B1-3 will tell you what you need to know.
>>
>> Hyp mode has its own vectors, pointed to by the HVBAR control register.
>>
>> I strongly suggest you familiarize yourself with these parts of the
>> ARM ARM before writing code to that effect.
>
> To clarify my meaning: I wasn't speaking about the exceptions base
> address, but about the exception vector offset. IOW, I did not mean to
> say that in HYP mode, aborts, FIQs, IRQs etc use the SVC32 table of
> vectors rather than the HYP table. I meant to say that e.g. an IRQ will
> fire at offset 0x18, whether it fires while from SVC32 into IRQ mode,
> or from HYP mode into HYP mode. This seemed consistent with figure B1-8
> on page B1-1179 of DDI 0406C.b, respectively first and sixth "exit box"
> on the right.
>
> Is this clearer and more correct?
>

yes, now I understand. It's correct.

>> > If so, then U-Boot stack requirements for SVC32 and HYP mode are
>> > as follows: in SVC32, we need separate IRQ and FIQ stacks, and the main
>> > (SVC32) stack does not have to accommodate for interrupt handler
>> > context storage. In HYP mode, the only stack is the HYP one and
>> > exception handlers will use it too, so it has to accommodate for
>> > their context storage.
>> >
>> That is correct, your Hyp mode stack should always be valid (have a
>> page or so, like the kernel) and then you can always push things on
>> there, even when taking an exception.
>
> Thanks Christoffer! This should allow me to refactor interrupt stack
> settings as I intended.
>
>> -Christoffer
>
> Amicalement,
> --
> Albert.