From: Alban Bedel <alban.bedel@avionic-design.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] arm: tegra: Fix the CPU complex reset masks
Date: Mon, 25 Nov 2013 11:54:24 +0100 [thread overview]
Message-ID: <20131125115424.47113ae3@avionic-0020> (raw)
In-Reply-To: <528E6C5F.1020506@wwwdotorg.org>
On Thu, 21 Nov 2013 13:26:07 -0700
Stephen Warren <swarren@wwwdotorg.org> wrote:
> On 11/20/2013 09:42 AM, Alban Bedel wrote:
> > The CPU complex reset masks are not matching with the datasheet for
> > the CLK_RST_CONTROLLER_RST_CPU_CMPLX_SET/CLR_0 registers. For both T20
> > and T30 the register consist of groups of 4 bits, with one bit for
> > each CPU core. On T20 the 2 high bits of each group are always stubbed
> > as there is only 2 cores.
>
> This looks correct to me. Given this problem, it's surprising that
> reset_A9_cpu() was operating correctly, and that secondary CPUs were
> coming out of reset OK later. What testing has this had (which SoCs and
> boards)?
I only tested it on T30 using our Tamonten NG board.
Alban
next prev parent reply other threads:[~2013-11-25 10:54 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-11-20 16:42 [U-Boot] [PATCH] arm: tegra: Fix the CPU complex reset masks Alban Bedel
2013-11-21 20:26 ` Stephen Warren
2013-11-25 10:54 ` Alban Bedel [this message]
2013-11-25 23:12 ` Stephen Warren
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