From mboxrd@z Thu Jan  1 00:00:00 1970
From: Marek Vasut <marex@denx.de>
Date: Fri, 7 Feb 2014 14:48:16 +0100
Subject: [U-Boot] [PATCH 2/2] usb: ehci: fully align interrupt QHs/QTDs
In-Reply-To: <52F481A6.8060400@wwwdotorg.org>
References: <1391717586-5086-1-git-send-email-swarren@wwwdotorg.org>
	<201402070353.42180.marex@denx.de> <52F481A6.8060400@wwwdotorg.org>
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On Friday, February 07, 2014 at 07:48:06 AM, Stephen Warren wrote:
> On 02/06/2014 07:53 PM, Marek Vasut wrote:
> > On Thursday, February 06, 2014 at 09:13:06 PM, Stephen Warren wrote:
> >> From: Stephen Warren <swarren@nvidia.com>
> >> 
> >> These data structures are passed to cache-flushing routines, and hence
> >> must be conform to both the USB the cache-flusing alignment
> >> requirements. That means aligning to USB_DMA_MINALIGN. This is
> >> important on systems where cache lines are >32 bytes.
> >> 
> >> Signed-off-by: Stephen Warren <swarren@nvidia.com>
> > 
> > Acked-by: Marek Vasut <marex@denx.de>
> 
> Oh, I assumed you would be applying this?

Yes I would , but the previous patch still needs some discussion.

Best regards,
Marek Vasut