From mboxrd@z Thu Jan  1 00:00:00 1970
From: Marek Vasut <marex@denx.de>
Date: Sat, 8 Feb 2014 15:01:37 +0100
Subject: [U-Boot] [PATCH 2/2] usb: ehci: fully align interrupt QHs/QTDs
In-Reply-To: <52F508BB.3020105@wwwdotorg.org>
References: <1391717586-5086-1-git-send-email-swarren@wwwdotorg.org>
	<201402071448.16413.marex@denx.de> <52F508BB.3020105@wwwdotorg.org>
Message-ID: <201402081501.37988.marex@denx.de>
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On Friday, February 07, 2014 at 05:24:27 PM, Stephen Warren wrote:
> On 02/07/2014 06:48 AM, Marek Vasut wrote:
> > On Friday, February 07, 2014 at 07:48:06 AM, Stephen Warren wrote:
> >> On 02/06/2014 07:53 PM, Marek Vasut wrote:
> >>> On Thursday, February 06, 2014 at 09:13:06 PM, Stephen Warren wrote:
> >>>> From: Stephen Warren <swarren@nvidia.com>
> >>>> 
> >>>> These data structures are passed to cache-flushing routines, and hence
> >>>> must be conform to both the USB the cache-flusing alignment
> >>>> requirements. That means aligning to USB_DMA_MINALIGN. This is
> >>>> important on systems where cache lines are >32 bytes.
> >>>> 
> >>>> Signed-off-by: Stephen Warren <swarren@nvidia.com>
> >>> 
> >>> Acked-by: Marek Vasut <marex@denx.de>
> >> 
> >> Oh, I assumed you would be applying this?
> > 
> > Yes I would , but the previous patch still needs some discussion.
> 
> Oh OK. The patches don't depend on each-other in any way, so you can go
> ahead and apply this now if you want. I should have actually sent them
> separately rather than as a series.

Yeah, applied V2 of 1 and 2/2 now.

Best regards,
Marek Vasut