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From: Albert ARIBAUD <albert.u.boot@aribaud.net>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] ENGR00299356 ARM:imx6 Fix USDHC driver bug in PIO mode
Date: Wed, 19 Feb 2014 13:56:05 +0100	[thread overview]
Message-ID: <20140219135605.51529a15@lilith> (raw)
In-Reply-To: <1392806011-18821-1-git-send-email-B37916@freescale.com>

Hi Ye.Li,

On Wed, 19 Feb 2014 18:33:31 +0800, Ye.Li <B37916@freescale.com> wrote:

> When configure the USDHC driver to PIO mode by defining
> "CONFIG_SYS_FSL_ESDHC_USE_PIO", the SD/MMC read and write will fail.
> 
> Two bugs in the driver to cause the issue:
> 1. The read buffer was invalidated after reading from DATAPORT register,
> which should be only applied to DMA mode. The valid data in cache was
> overwritten by physical memory.
> 2. The watermarks are not set in PIO mode, will cause according state not
> be set.

What does the ENGR00299356 part of the subject line mean?

Also, in subject line: rewrite "arm:imx6 " as "arm: imx56: "

> Signed-off-by: Ye.Li <B37916@freescale.com>
> ---
>  drivers/mmc/fsl_esdhc.c |   23 +++++++++--------------
>  1 files changed, 9 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
> index b5f6d62..bd0399a 100644
> --- a/drivers/mmc/fsl_esdhc.c
> +++ b/drivers/mmc/fsl_esdhc.c
> @@ -190,7 +190,7 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data)
>  	int timeout;
>  	struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
>  	struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base;
> -#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO
> +
>  	uint wml_value;
>  
>  	wml_value = data->blocksize/4;
> @@ -200,12 +200,15 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data)
>  			wml_value = WML_RD_WML_MAX_VAL;
>  
>  		esdhc_clrsetbits32(&regs->wml, WML_RD_WML_MASK, wml_value);
> +#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO
>  		esdhc_write32(&regs->dsaddr, (u32)data->dest);
> +#endif
>  	} else {
> +#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO
>  		flush_dcache_range((ulong)data->src,
>  				   (ulong)data->src+data->blocks
>  					 *data->blocksize);
> -
> +#endif
>  		if (wml_value > WML_WR_WML_MAX)
>  			wml_value = WML_WR_WML_MAX_VAL;
>  		if ((esdhc_read32(&regs->prsstat) & PRSSTAT_WPSPL) == 0) {
> @@ -215,19 +218,10 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data)
>  
>  		esdhc_clrsetbits32(&regs->wml, WML_WR_WML_MASK,
>  					wml_value << 16);
> +#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO
>  		esdhc_write32(&regs->dsaddr, (u32)data->src);
> +#endif
>  	}
> -#else	/* CONFIG_SYS_FSL_ESDHC_USE_PIO */
> -	if (!(data->flags & MMC_DATA_READ)) {
> -		if ((esdhc_read32(&regs->prsstat) & PRSSTAT_WPSPL) == 0) {
> -			printf("\nThe SD card is locked. "
> -				"Can not write to a locked card.\n\n");
> -			return TIMEOUT;
> -		}
> -		esdhc_write32(&regs->dsaddr, (u32)data->src);
> -	} else
> -		esdhc_write32(&regs->dsaddr, (u32)data->dest);
> -#endif	/* CONFIG_SYS_FSL_ESDHC_USE_PIO */
>  
>  	esdhc_write32(&regs->blkattr, data->blocks << 16 | data->blocksize);
>  
> @@ -410,9 +404,10 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
>  			if (irqstat & DATA_ERR)
>  				return COMM_ERR;
>  		} while ((irqstat & DATA_COMPLETE) != DATA_COMPLETE);
> -#endif
> +
>  		if (data->flags & MMC_DATA_READ)
>  			check_and_invalidate_dcache_range(cmd, data);
> +#endif
>  	}
>  
>  	esdhc_write32(&regs->irqstat, -1);


Amicalement,
-- 
Albert.

  reply	other threads:[~2014-02-19 12:56 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-02-19 10:33 [U-Boot] [PATCH] ENGR00299356 ARM:imx6 Fix USDHC driver bug in PIO mode Ye.Li
2014-02-19 12:56 ` Albert ARIBAUD [this message]
2014-02-19 13:41 ` Stefano Babic
2014-02-20  9:38   ` Ye Li
2014-02-19 22:46 ` Wolfgang Denk

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