From mboxrd@z Thu Jan 1 00:00:00 1970 From: Albert ARIBAUD Date: Wed, 19 Feb 2014 13:56:05 +0100 Subject: [U-Boot] [PATCH] ENGR00299356 ARM:imx6 Fix USDHC driver bug in PIO mode In-Reply-To: <1392806011-18821-1-git-send-email-B37916@freescale.com> References: <1392806011-18821-1-git-send-email-B37916@freescale.com> Message-ID: <20140219135605.51529a15@lilith> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Ye.Li, On Wed, 19 Feb 2014 18:33:31 +0800, Ye.Li wrote: > When configure the USDHC driver to PIO mode by defining > "CONFIG_SYS_FSL_ESDHC_USE_PIO", the SD/MMC read and write will fail. > > Two bugs in the driver to cause the issue: > 1. The read buffer was invalidated after reading from DATAPORT register, > which should be only applied to DMA mode. The valid data in cache was > overwritten by physical memory. > 2. The watermarks are not set in PIO mode, will cause according state not > be set. What does the ENGR00299356 part of the subject line mean? Also, in subject line: rewrite "arm:imx6 " as "arm: imx56: " > Signed-off-by: Ye.Li > --- > drivers/mmc/fsl_esdhc.c | 23 +++++++++-------------- > 1 files changed, 9 insertions(+), 14 deletions(-) > > diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c > index b5f6d62..bd0399a 100644 > --- a/drivers/mmc/fsl_esdhc.c > +++ b/drivers/mmc/fsl_esdhc.c > @@ -190,7 +190,7 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data) > int timeout; > struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; > struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base; > -#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO > + > uint wml_value; > > wml_value = data->blocksize/4; > @@ -200,12 +200,15 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data) > wml_value = WML_RD_WML_MAX_VAL; > > esdhc_clrsetbits32(®s->wml, WML_RD_WML_MASK, wml_value); > +#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO > esdhc_write32(®s->dsaddr, (u32)data->dest); > +#endif > } else { > +#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO > flush_dcache_range((ulong)data->src, > (ulong)data->src+data->blocks > *data->blocksize); > - > +#endif > if (wml_value > WML_WR_WML_MAX) > wml_value = WML_WR_WML_MAX_VAL; > if ((esdhc_read32(®s->prsstat) & PRSSTAT_WPSPL) == 0) { > @@ -215,19 +218,10 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data) > > esdhc_clrsetbits32(®s->wml, WML_WR_WML_MASK, > wml_value << 16); > +#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO > esdhc_write32(®s->dsaddr, (u32)data->src); > +#endif > } > -#else /* CONFIG_SYS_FSL_ESDHC_USE_PIO */ > - if (!(data->flags & MMC_DATA_READ)) { > - if ((esdhc_read32(®s->prsstat) & PRSSTAT_WPSPL) == 0) { > - printf("\nThe SD card is locked. " > - "Can not write to a locked card.\n\n"); > - return TIMEOUT; > - } > - esdhc_write32(®s->dsaddr, (u32)data->src); > - } else > - esdhc_write32(®s->dsaddr, (u32)data->dest); > -#endif /* CONFIG_SYS_FSL_ESDHC_USE_PIO */ > > esdhc_write32(®s->blkattr, data->blocks << 16 | data->blocksize); > > @@ -410,9 +404,10 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) > if (irqstat & DATA_ERR) > return COMM_ERR; > } while ((irqstat & DATA_COMPLETE) != DATA_COMPLETE); > -#endif > + > if (data->flags & MMC_DATA_READ) > check_and_invalidate_dcache_range(cmd, data); > +#endif > } > > esdhc_write32(®s->irqstat, -1); Amicalement, -- Albert.