[U-Boot] iMX6 IPU display interface definition

[U-Boot] iMX6 IPU display interface definition

[Andreas Geisreiter]

Hi,

we are working at the moment with i.MX6DL. I tried to setup new display support (RGB interface) in Bootloader U-Boot. There is a structure available, where I can define all the display timings:
	.mode	= {
		.name           = "wvga-rgb",
		.refresh        = 57,
		.xres           = 800,
		.yres           = 480,
		.pixclock       = 33260,
		.left_margin    = 42,
		.right_margin   = 86,
		.upper_margin   = 10,
		.lower_margin   = 33,
		.hsync_len      = 128,
		.vsync_len      = 2,
		.sync           = 0,
		.vmode          = FB_VMODE_NONINTERLACED

But there I miss the edge definition of the pixel clock and data enable. I also searched in the user manual about the i.MX6 IPU register where I can set the active high or low information but I can't find it.
So can anybody tell me in which registers I can set the following information's:
V-Sync: Active high or low
H-Sync: Active high or low
Pixel Clock: Data is driven on falling or rising edge
Output enable: Active high or low
Data lines: inverted or not

If anybody can tell me how I can do this in U-Boot it would also help. H-Sync and V-Sync activity I can control with the defines FB_SYNC_HOR_HIGH_ACT and FB_SYNC_VERT_HIGH_ACT but the other controls (pixel clock rising or falling edge, data enable active high or low, Data lines inverted or not) I'm missing.

Best regards,

Andreas Geisreiter
Product Manager DHCOM

DH electronics GmbH | Am Anger 8 | 83346 Bergen | Germany
HRB Traunstein 9602 | Ust Id Nr.: DE174205805
Gesch?ftsf?hrung | Dipl.-Ing.(FH) Stefan Daxenberger | Dipl.-Ing.(FH) Helmut Henschke

[U-Boot] iMX6 IPU display interface definition

[Eric Nelson]

Hi Andreas,

On 03/20/2014 01:41 AM, Andreas Geisreiter wrote:
> Hi,
>
> we are working at the moment with i.MX6DL. I tried to setup new
> display support (RGB interface) in Bootloader U-Boot. There is a
> structure available, where I can define all the display timings:
> 	.mode	= {
> 		.name           = "wvga-rgb",
> 		.refresh        = 57,
> 		.xres           = 800,
> 		.yres           = 480,
> 		.pixclock       = 33260,
> 		.left_margin    = 42,
> 		.right_margin   = 86,
> 		.upper_margin   = 10,
> 		.lower_margin   = 33,
> 		.hsync_len      = 128,
> 		.vsync_len      = 2,
> 		.sync           = 0,
> 		.vmode          = FB_VMODE_NONINTERLACED
>
> But there I miss the edge definition of the pixel clock and data
> enable.
 >

The sync field is used to describe these characteristics,
and some of the flags are listed in drivers/video/mxcfb.h (FB_SYNC*)
and others in drivers/video/videomodes.h (FB_SYNC_VERT_HIGH_ACT).

Regards,


Eric

[U-Boot] iMX6 IPU display interface definition

[Andreas Geisreiter]

Hi Eric,

Thanks for your help. In the header files which you mentioned I found the following:

V-Sync: Active high or low = FB_SYNC_VERT_HIGH_ACT
H-Sync: Active high or low = FB_SYNC_HOR_HIGH_ACT
Output enable: Active high or low = FB_SYNC_OE_LOW_ACT
Data lines: inverted or not = FB_SYNC_DATA_INVERT
Pixel Clock: Data is driven on falling or rising edge

But now I'm missing the define for switching pixel clock between rising and falling edge. Do you know how I can switch pixel clock activity?

Best regards,
Andreas

[U-Boot] iMX6 IPU display interface definition

[Eric Bénard]

Hi Andreas,

Le Thu, 20 Mar 2014 16:13:53 +0000,
Andreas Geisreiter <ageisreiter@dh-electronics.de> a ?crit :
> Thanks for your help. In the header files which you mentioned I found the following:
> 
> V-Sync: Active high or low = FB_SYNC_VERT_HIGH_ACT
> H-Sync: Active high or low = FB_SYNC_HOR_HIGH_ACT
> Output enable: Active high or low = FB_SYNC_OE_LOW_ACT
> Data lines: inverted or not = FB_SYNC_DATA_INVERT
> Pixel Clock: Data is driven on falling or rising edge
> 
> But now I'm missing the define for switching pixel clock between rising and falling edge. Do you know how I can switch pixel clock activity?
> 
check in drivers/video/mxc_ipuv3_fb.c : 
	if (!(fbi->var.sync & FB_SYNC_CLK_LAT_FALL))
		sig_cfg.clk_pol = 1;

Eric

[U-Boot] iMX6 IPU display interface definition

[Andreas Geisreiter]

Hi Eric,

thanks for your help. 

Best regrads,
Andreas

-----Original Message-----

Hi Andreas,

Le Thu, 20 Mar 2014 16:13:53 +0000,
Andreas Geisreiter <ageisreiter@dh-electronics.de> a ?crit :
> Thanks for your help. In the header files which you mentioned I found the following:
> 
> V-Sync: Active high or low = FB_SYNC_VERT_HIGH_ACT
> H-Sync: Active high or low = FB_SYNC_HOR_HIGH_ACT Output enable: 
> Active high or low = FB_SYNC_OE_LOW_ACT Data lines: inverted or not = 
> FB_SYNC_DATA_INVERT Pixel Clock: Data is driven on falling or rising 
> edge
> 
> But now I'm missing the define for switching pixel clock between rising and falling edge. Do you know how I can switch pixel clock activity?
> 
check in drivers/video/mxc_ipuv3_fb.c : 
	if (!(fbi->var.sync & FB_SYNC_CLK_LAT_FALL))
		sig_cfg.clk_pol = 1;

Eric