From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tom Rini Date: Fri, 18 Apr 2014 17:01:59 -0400 Subject: [U-Boot] [U-Boot, 2/3] pcnet: align rx buffers for cache invalidation In-Reply-To: <1396885308-61884-3-git-send-email-paul.burton@imgtec.com> References: <1396885308-61884-3-git-send-email-paul.burton@imgtec.com> Message-ID: <20140418210159.GZ5698@bill-the-cat> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Mon, Apr 07, 2014 at 04:41:47PM +0100, Paul Burton wrote: > The RX buffers are invalidated when a packet is received, however they > were not suitably cache-line aligned. Allocate them seperately to the > pcnet_priv structure and align to ARCH_DMA_MINALIGN in order to ensure > suitable alignment for the cache invalidation, preventing anything else > being placed in the same lines & lost. > > Signed-off-by: Paul Burton Applied to u-boot/master, thanks! -- Tom -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 836 bytes Desc: Digital signature URL: