From: Tom Rini <trini@ti.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [U-Boot, 3/3] pcnet: force ordering of descriptor accesses
Date: Fri, 18 Apr 2014 17:02:05 -0400 [thread overview]
Message-ID: <20140418210205.GA5698@bill-the-cat> (raw)
In-Reply-To: <1396885308-61884-4-git-send-email-paul.burton@imgtec.com>
On Mon, Apr 07, 2014 at 04:41:48PM +0100, Paul Burton wrote:
> The ordering of accesses to the rx & tx descriptors is important, yet
> the send & recv functions accessed them via regular structure accesses.
> This leaves the compiler with the opportunity to reorder those accesses
> or to hoist them outside of loops. Prevent that from happening by using
> readl & writel to access the descriptors. As a nice bonus, this removes
> the need for the driver to care about endianness.
>
> Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Applied to u-boot/master, thanks!
--
Tom
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next prev parent reply other threads:[~2014-04-18 21:02 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-04-07 15:41 [U-Boot] [PATCH 0/3] pcnet driver fixes Paul Burton
2014-04-07 15:41 ` [U-Boot] [PATCH 1/3] pcnet: access descriptor rings & init block uncached Paul Burton
2014-04-18 21:01 ` [U-Boot] [U-Boot, " Tom Rini
2014-04-07 15:41 ` [U-Boot] [PATCH 2/3] pcnet: align rx buffers for cache invalidation Paul Burton
2014-04-18 21:01 ` [U-Boot] [U-Boot, " Tom Rini
2014-04-07 15:41 ` [U-Boot] [PATCH 3/3] pcnet: force ordering of descriptor accesses Paul Burton
2014-04-18 21:02 ` Tom Rini [this message]
2014-04-17 19:44 ` [U-Boot] [PATCH 0/3] pcnet driver fixes Daniel Schwierzeck
2014-04-22 13:46 ` Tom Rini
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