From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Date: Thu, 1 May 2014 21:28:33 +0200 Subject: [U-Boot] [PATCH v4 1/9] sunxi: add sun7i clocks and timer support. In-Reply-To: <1398969652-32736-1-git-send-email-ijc@hellion.org.uk> References: <1398969603.19277.176.camel@hastur.hellion.org.uk> <1398969652-32736-1-git-send-email-ijc@hellion.org.uk> Message-ID: <201405012128.34098.marex@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Thursday, May 01, 2014 at 08:40:44 PM, Ian Campbell wrote: > This patch adds the basic clocks and timer support for the Allwinner A20 > (sun7i) processor. This code will not been compiled until the build is > hooked up in a later patch. It has been split out to keep the patches > manageable. > > Some of the code here is common to multiple sunxi subarchtectures, hence > files are named sun4i which is the earliest similar variant. > > Signed-off-by: Alexandru Gagniuc > Signed-off-by: Chen-Yu Tsai > Signed-off-by: Emilio L?pez > Signed-off-by: Hans de Goede > Signed-off-by: Henrik Nordstrom > Signed-off-by: Jens Kuske > Signed-off-by: Luke Leighton > Signed-off-by: Oliver Schinagl > Signed-off-by: Ian Campbell > Cc: Stefan Roese > Cc: Tom Cubie > --- > v4: "Based on d9fe0a1e061e "sunxi: mksunxiboot: remove unnecessary casts." I have no idea what this changelog entry tells me, I will have to review this entire patch anew. [...] > +void clock_set_pll1(int hz) > +{ > + int i = 0; > + int axi, ahb, apb0; > + struct sunxi_ccm_reg * const ccm = > + (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; > + > + /* Find target frequency */ > + while (pll1_para[i].freq < hz) > + i++; You can just do a for (...) cycle here, instead of the unbounded while cycle. Also, I think hz will always be positive, thus int hz -> unsigned int hz . [...] Best regards, Marek Vasut