* [U-Boot] [PATCH 1/6] AHCI: Increase link timeout to 200ms
2014-06-05 17:59 [U-Boot] [PATCH v2 0/6] sunxi: GPIO, AHCI and Cubieboard 2 support Ian Campbell
@ 2014-06-05 18:00 ` Ian Campbell
2014-06-05 18:00 ` [U-Boot] [PATCH 2/6] board_r: run scsi init() on ARM too Ian Campbell
` (4 subsequent siblings)
5 siblings, 0 replies; 20+ messages in thread
From: Ian Campbell @ 2014-06-05 18:00 UTC (permalink / raw)
To: u-boot
In 73545f75b66d "ahci: wait longer for link" I increased the
timeout to 40ms based on the observed behaviour of a WD disk on a
Cubietruck. Since then Karsten Merker and myself have both
observed timeouts with HGST disks (Karsten on Cubietruck, me on
Cubieboard2). Increasing the timeout to ~175ms fixes this, so go
to 200ms for a bit of headroom.
Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Cc: Karsten Merker <merker@debian.org>
---
drivers/block/ahci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c
index c8f6573..4df8046 100644
--- a/drivers/block/ahci.c
+++ b/drivers/block/ahci.c
@@ -41,7 +41,7 @@ u16 *ataid[AHCI_MAX_PORTS];
#define WAIT_MS_SPINUP 20000
#define WAIT_MS_DATAIO 5000
#define WAIT_MS_FLUSH 5000
-#define WAIT_MS_LINKUP 40
+#define WAIT_MS_LINKUP 200
static inline u32 ahci_port_base(u32 base, u32 port)
{
--
1.9.0
^ permalink raw reply related [flat|nested] 20+ messages in thread* [U-Boot] [PATCH 2/6] board_r: run scsi init() on ARM too
2014-06-05 17:59 [U-Boot] [PATCH v2 0/6] sunxi: GPIO, AHCI and Cubieboard 2 support Ian Campbell
2014-06-05 18:00 ` [U-Boot] [PATCH 1/6] AHCI: Increase link timeout to 200ms Ian Campbell
@ 2014-06-05 18:00 ` Ian Campbell
2014-06-05 18:00 ` [U-Boot] [PATCH 3/6] sunxi: add Cubieboard2 support Ian Campbell
` (3 subsequent siblings)
5 siblings, 0 replies; 20+ messages in thread
From: Ian Campbell @ 2014-06-05 18:00 UTC (permalink / raw)
To: u-boot
This has been disabled for ARM in initr_scsi since that function was
introduced. However it works fine for me on Cubieboard and Cubietruck (with the
upcoming AHCI glue patch).
I also tested on two random ARM platforms which seem to define CONFIG_CMD_SCSI:
- highbank worked fine (on midway hardware)
- omap5_uevm built OK and I confirmed using objdump that things were as
expected (i.e. the default weak scsi_init nop was used).
While there remove the mismatched comment from the #endif (omitting the comment
seems to be the prevailing style in this file) and add a missing return to
initr_doc which I happened to spot while editing.
Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
---
common/board_r.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/common/board_r.c b/common/board_r.c
index 602a239..427ee67 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -588,21 +588,19 @@ static int initr_status_led(void)
#if defined(CONFIG_CMD_SCSI)
static int initr_scsi(void)
{
- /* Not supported properly on ARM yet */
-#ifndef CONFIG_ARM
puts("SCSI: ");
scsi_init();
-#endif
return 0;
}
-#endif /* CONFIG_CMD_NET */
+#endif
#if defined(CONFIG_CMD_DOC)
static int initr_doc(void)
{
puts("DOC: ");
doc_init();
+ return 0
}
#endif
--
1.9.0
^ permalink raw reply related [flat|nested] 20+ messages in thread* [U-Boot] [PATCH 3/6] sunxi: add Cubieboard2 support
2014-06-05 17:59 [U-Boot] [PATCH v2 0/6] sunxi: GPIO, AHCI and Cubieboard 2 support Ian Campbell
2014-06-05 18:00 ` [U-Boot] [PATCH 1/6] AHCI: Increase link timeout to 200ms Ian Campbell
2014-06-05 18:00 ` [U-Boot] [PATCH 2/6] board_r: run scsi init() on ARM too Ian Campbell
@ 2014-06-05 18:00 ` Ian Campbell
2014-07-24 3:12 ` Siarhei Siamashka
2014-06-05 18:00 ` [U-Boot] [PATCH 4/6] sunxi: add gpio driver Ian Campbell
` (2 subsequent siblings)
5 siblings, 1 reply; 20+ messages in thread
From: Ian Campbell @ 2014-06-05 18:00 UTC (permalink / raw)
To: u-boot
This is a sun7i (A20) based followup to the sun4i (A10)
Cubieboard. It has GMAC using MII mode.
Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Acked-by: Hans de Goede <hdegoede@redhat.com>
---
board/sunxi/Makefile | 1 +
board/sunxi/dram_cubieboard2.c | 31 +++++++++++++++++++++++++++++++
boards.cfg | 2 ++
3 files changed, 34 insertions(+)
create mode 100644 board/sunxi/dram_cubieboard2.c
diff --git a/board/sunxi/Makefile b/board/sunxi/Makefile
index 7083632..62acb8f 100644
--- a/board/sunxi/Makefile
+++ b/board/sunxi/Makefile
@@ -12,5 +12,6 @@ obj-y += board.o
obj-$(CONFIG_SUNXI_GMAC) += gmac.o
obj-$(CONFIG_A13_OLINUXINOM) += dram_a13_oli_micro.o
obj-$(CONFIG_CUBIEBOARD) += dram_cubieboard.o
+obj-$(CONFIG_CUBIEBOARD2) += dram_cubieboard2.o
obj-$(CONFIG_CUBIETRUCK) += dram_cubietruck.o
obj-$(CONFIG_R7DONGLE) += dram_r7dongle.o
diff --git a/board/sunxi/dram_cubieboard2.c b/board/sunxi/dram_cubieboard2.c
new file mode 100644
index 0000000..9e75367
--- /dev/null
+++ b/board/sunxi/dram_cubieboard2.c
@@ -0,0 +1,31 @@
+/* this file is generated, don't edit it yourself */
+
+#include <common.h>
+#include <asm/arch/dram.h>
+
+static struct dram_para dram_para = {
+ .clock = 480,
+ .type = 3,
+ .rank_num = 1,
+ .density = 4096,
+ .io_width = 16,
+ .bus_width = 32,
+ .cas = 9,
+ .zq = 0x7f,
+ .odt_en = 0,
+ .size = 1024,
+ .tpr0 = 0x42d899b7,
+ .tpr1 = 0xa090,
+ .tpr2 = 0x22a00,
+ .tpr3 = 0x0,
+ .tpr4 = 0x1,
+ .tpr5 = 0x0,
+ .emr1 = 0x4,
+ .emr2 = 0x10,
+ .emr3 = 0x0,
+};
+
+unsigned long sunxi_dram_init(void)
+{
+ return dramc_init(&dram_para);
+}
diff --git a/boards.cfg b/boards.cfg
index 18a8400..ddb105e 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -383,6 +383,8 @@ Active arm armv7 s5pc1xx samsung smdkc100
Active arm armv7 socfpga altera socfpga socfpga_cyclone5 - -
Active arm armv7 sunxi - sunxi A13-OLinuXinoM sun5i:A13_OLINUXINOM,SPL,CONS_INDEX=2 Hans de Goede <hdegoede@redhat.com>
Active arm armv7 sunxi - sunxi Cubieboard sun4i:CUBIEBOARD,SPL,AXP209_POWER,SUNXI_EMAC Hans de Goede <hdegoede@redhat.com>
+Active arm armv7 sunxi - sunxi Cubieboard2 sun7i:CUBIEBOARD2,SPL,SUNXI_GMAC Ian Campbell <ijc@hellion.org.uk>:Hans de Goede <hdegoede@redhat.com>
+Active arm armv7 sunxi - sunxi Cubieboard2_FEL sun7i:CUBIEBOARD2,SPL_FEL,SUNXI_GMAC Ian Campbell <ijc@hellion.org.uk>:Hans de Goede <hdegoede@redhat.com>
Active arm armv7 sunxi - sunxi Cubietruck sun7i:CUBIETRUCK,SPL,AXP209_POWER,SUNXI_GMAC,RGMII Ian Campbell <ijc@hellion.org.uk>:Hans de Goede <hdegoede@redhat.com>
Active arm armv7 sunxi - sunxi Cubietruck_FEL sun7i:CUBIETRUCK,SPL_FEL,AXP209_POWER,SUNXI_GMAC,RGMII Ian Campbell <ijc@hellion.org.uk>:Hans de Goede <hdegoede@redhat.com>
Active arm armv7 sunxi - sunxi r7-tv-dongle sun5i:R7DONGLE,SPL,AXP152_POWER Hans de Goede <hdegoede@redhat.com>
--
1.9.0
^ permalink raw reply related [flat|nested] 20+ messages in thread* [U-Boot] [PATCH 3/6] sunxi: add Cubieboard2 support
2014-06-05 18:00 ` [U-Boot] [PATCH 3/6] sunxi: add Cubieboard2 support Ian Campbell
@ 2014-07-24 3:12 ` Siarhei Siamashka
2014-07-24 3:18 ` Chen-Yu Tsai
2014-07-24 6:45 ` Ian Campbell
0 siblings, 2 replies; 20+ messages in thread
From: Siarhei Siamashka @ 2014-07-24 3:12 UTC (permalink / raw)
To: u-boot
On Thu, 5 Jun 2014 19:00:14 +0100
Ian Campbell <ijc@hellion.org.uk> wrote:
> This is a sun7i (A20) based followup to the sun4i (A10)
> Cubieboard. It has GMAC using MII mode.
>
> Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
> Acked-by: Hans de Goede <hdegoede@redhat.com>
This board is using exactly the same PCB as the Cubieboard1. And only
the SoC is different (Allwinner A20 instead of the pin-compatible
Allwinner A10).
Before piling up more board configurations, we might want to consider
supporting both Cubieboard1 and Cubieboard2 with a single u-boot binary
(and perhaps keep Cubieboard1 and Cubieboard2 as aliases in boards.cfg).
The Allwinner SoCs have support for runtime identification of the SoC
type (sun4i/sun5i/sun7i) via the VER_REG (Version Register) located at
the address 0x01C00024 as explained in the Allwinner A20 user manual.
This requires replacing all the CONFIG_SUN4I/CONFIG_SUN5I/CONFIG_SUN7I
ifdefs in the u-boot code with a runtime SoC type checks, but there
are not too many places affected (mostly just the DRAM code).
Here is a quick and dirty example (not a patch submission yet), which
allows to boot the Cubieboard2 hardware using the existing Cubieboard1
config:
https://github.com/ssvb/u-boot-sunxi-dram/commit/3153905e0221
If the u-boot code is further extended to define a variable with the
relevant dtb file name in the u-boot environment (depending on the
runtime detected SoC type and selecting from "sun4i-a10-cubieboard.dtb"
and "sun7i-a20-cubieboard2.dtb"), then we can have the same SD card
with the whole pre-installed Linux system usable on both Cubieboard1
and Cubieboard2 hardware by just swapping the card.
Also the Cubieboards are not alone. Sharing the same PCB happens for
the LIME boards from Olimex too:
https://www.olimex.com/Products/OLinuXino/A10/A10-OLinuXino-LIME
https://www.olimex.com/Products/OLinuXino/A20/A20-OLinuXino-LIME
> Active arm armv7 sunxi - sunxi Cubieboard sun4i:CUBIEBOARD,SPL,AXP209_POWER,SUNXI_EMAC Hans de Goede <hdegoede@redhat.com>
> +Active arm armv7 sunxi - sunxi Cubieboard2 sun7i:CUBIEBOARD2,SPL,SUNXI_GMAC Ian Campbell <ijc@hellion.org.uk>:Hans de Goede <hdegoede@redhat.com>
> +Active arm armv7 sunxi - sunxi Cubieboard2_FEL sun7i:CUBIEBOARD2,SPL_FEL,SUNXI_GMAC Ian Campbell <ijc@hellion.org.uk>:Hans de Goede <hdegoede@redhat.com>
The newly added Cubieboard2 from your patch appears to be missing the
important AXP209_POWER option. So the patch is not good enough to be
pushed anywhere in its current form.
--
Best regards,
Siarhei Siamashka
^ permalink raw reply [flat|nested] 20+ messages in thread* [U-Boot] [PATCH 3/6] sunxi: add Cubieboard2 support
2014-07-24 3:12 ` Siarhei Siamashka
@ 2014-07-24 3:18 ` Chen-Yu Tsai
2014-07-24 12:47 ` Siarhei Siamashka
2014-07-24 6:45 ` Ian Campbell
1 sibling, 1 reply; 20+ messages in thread
From: Chen-Yu Tsai @ 2014-07-24 3:18 UTC (permalink / raw)
To: u-boot
On Thu, Jul 24, 2014 at 11:12 AM, Siarhei Siamashka
<siarhei.siamashka@gmail.com> wrote:
> On Thu, 5 Jun 2014 19:00:14 +0100
> Ian Campbell <ijc@hellion.org.uk> wrote:
>
>> This is a sun7i (A20) based followup to the sun4i (A10)
>> Cubieboard. It has GMAC using MII mode.
>>
>> Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
>> Acked-by: Hans de Goede <hdegoede@redhat.com>
>
> This board is using exactly the same PCB as the Cubieboard1. And only
> the SoC is different (Allwinner A20 instead of the pin-compatible
> Allwinner A10).
>
> Before piling up more board configurations, we might want to consider
> supporting both Cubieboard1 and Cubieboard2 with a single u-boot binary
> (and perhaps keep Cubieboard1 and Cubieboard2 as aliases in boards.cfg).
> The Allwinner SoCs have support for runtime identification of the SoC
> type (sun4i/sun5i/sun7i) via the VER_REG (Version Register) located at
> the address 0x01C00024 as explained in the Allwinner A20 user manual.
> This requires replacing all the CONFIG_SUN4I/CONFIG_SUN5I/CONFIG_SUN7I
> ifdefs in the u-boot code with a runtime SoC type checks, but there
> are not too many places affected (mostly just the DRAM code).
A20 will need PSCI for SMP and virtualization support.
(I know the related code isn't in there yet.)
Won't this be slightly hard to do if you mix them together?
Just a though.
Cheers
ChenYu
> Here is a quick and dirty example (not a patch submission yet), which
> allows to boot the Cubieboard2 hardware using the existing Cubieboard1
> config:
> https://github.com/ssvb/u-boot-sunxi-dram/commit/3153905e0221
>
> If the u-boot code is further extended to define a variable with the
> relevant dtb file name in the u-boot environment (depending on the
> runtime detected SoC type and selecting from "sun4i-a10-cubieboard.dtb"
> and "sun7i-a20-cubieboard2.dtb"), then we can have the same SD card
> with the whole pre-installed Linux system usable on both Cubieboard1
> and Cubieboard2 hardware by just swapping the card.
>
> Also the Cubieboards are not alone. Sharing the same PCB happens for
> the LIME boards from Olimex too:
> https://www.olimex.com/Products/OLinuXino/A10/A10-OLinuXino-LIME
> https://www.olimex.com/Products/OLinuXino/A20/A20-OLinuXino-LIME
>
>> Active arm armv7 sunxi - sunxi Cubieboard sun4i:CUBIEBOARD,SPL,AXP209_POWER,SUNXI_EMAC Hans de Goede <hdegoede@redhat.com>
>> +Active arm armv7 sunxi - sunxi Cubieboard2 sun7i:CUBIEBOARD2,SPL,SUNXI_GMAC Ian Campbell <ijc@hellion.org.uk>:Hans de Goede <hdegoede@redhat.com>
>> +Active arm armv7 sunxi - sunxi Cubieboard2_FEL sun7i:CUBIEBOARD2,SPL_FEL,SUNXI_GMAC Ian Campbell <ijc@hellion.org.uk>:Hans de Goede <hdegoede@redhat.com>
>
> The newly added Cubieboard2 from your patch appears to be missing the
> important AXP209_POWER option. So the patch is not good enough to be
> pushed anywhere in its current form.
^ permalink raw reply [flat|nested] 20+ messages in thread
* [U-Boot] [PATCH 3/6] sunxi: add Cubieboard2 support
2014-07-24 3:18 ` Chen-Yu Tsai
@ 2014-07-24 12:47 ` Siarhei Siamashka
2014-07-24 15:00 ` Tom Rini
0 siblings, 1 reply; 20+ messages in thread
From: Siarhei Siamashka @ 2014-07-24 12:47 UTC (permalink / raw)
To: u-boot
On Thu, 24 Jul 2014 11:18:15 +0800
Chen-Yu Tsai <wens@csie.org> wrote:
> On Thu, Jul 24, 2014 at 11:12 AM, Siarhei Siamashka
> <siarhei.siamashka@gmail.com> wrote:
> > On Thu, 5 Jun 2014 19:00:14 +0100
> > Ian Campbell <ijc@hellion.org.uk> wrote:
> >
> >> This is a sun7i (A20) based followup to the sun4i (A10)
> >> Cubieboard. It has GMAC using MII mode.
> >>
> >> Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
> >> Acked-by: Hans de Goede <hdegoede@redhat.com>
> >
> > This board is using exactly the same PCB as the Cubieboard1. And only
> > the SoC is different (Allwinner A20 instead of the pin-compatible
> > Allwinner A10).
> >
> > Before piling up more board configurations, we might want to consider
> > supporting both Cubieboard1 and Cubieboard2 with a single u-boot binary
> > (and perhaps keep Cubieboard1 and Cubieboard2 as aliases in boards.cfg).
> > The Allwinner SoCs have support for runtime identification of the SoC
> > type (sun4i/sun5i/sun7i) via the VER_REG (Version Register) located at
> > the address 0x01C00024 as explained in the Allwinner A20 user manual.
> > This requires replacing all the CONFIG_SUN4I/CONFIG_SUN5I/CONFIG_SUN7I
> > ifdefs in the u-boot code with a runtime SoC type checks, but there
> > are not too many places affected (mostly just the DRAM code).
>
> A20 will need PSCI for SMP and virtualization support.
> (I know the related code isn't in there yet.)
> Won't this be slightly hard to do if you mix them together?
Thanks, that's a good point. Do you expect any special challenges other
than just having to handle runtime SoC detection in more places and
deal with larger final binaries on the hardware, which does not need
PSCI itself?
--
Best regards,
Siarhei Siamashka
^ permalink raw reply [flat|nested] 20+ messages in thread
* [U-Boot] [PATCH 3/6] sunxi: add Cubieboard2 support
2014-07-24 12:47 ` Siarhei Siamashka
@ 2014-07-24 15:00 ` Tom Rini
2014-07-24 21:40 ` Siarhei Siamashka
0 siblings, 1 reply; 20+ messages in thread
From: Tom Rini @ 2014-07-24 15:00 UTC (permalink / raw)
To: u-boot
On Thu, Jul 24, 2014 at 03:47:53PM +0300, Siarhei Siamashka wrote:
> On Thu, 24 Jul 2014 11:18:15 +0800
> Chen-Yu Tsai <wens@csie.org> wrote:
>
> > On Thu, Jul 24, 2014 at 11:12 AM, Siarhei Siamashka
> > <siarhei.siamashka@gmail.com> wrote:
> > > On Thu, 5 Jun 2014 19:00:14 +0100
> > > Ian Campbell <ijc@hellion.org.uk> wrote:
> > >
> > >> This is a sun7i (A20) based followup to the sun4i (A10)
> > >> Cubieboard. It has GMAC using MII mode.
> > >>
> > >> Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
> > >> Acked-by: Hans de Goede <hdegoede@redhat.com>
> > >
> > > This board is using exactly the same PCB as the Cubieboard1. And only
> > > the SoC is different (Allwinner A20 instead of the pin-compatible
> > > Allwinner A10).
> > >
> > > Before piling up more board configurations, we might want to consider
> > > supporting both Cubieboard1 and Cubieboard2 with a single u-boot binary
> > > (and perhaps keep Cubieboard1 and Cubieboard2 as aliases in boards.cfg).
> > > The Allwinner SoCs have support for runtime identification of the SoC
> > > type (sun4i/sun5i/sun7i) via the VER_REG (Version Register) located at
> > > the address 0x01C00024 as explained in the Allwinner A20 user manual.
> > > This requires replacing all the CONFIG_SUN4I/CONFIG_SUN5I/CONFIG_SUN7I
> > > ifdefs in the u-boot code with a runtime SoC type checks, but there
> > > are not too many places affected (mostly just the DRAM code).
> >
> > A20 will need PSCI for SMP and virtualization support.
> > (I know the related code isn't in there yet.)
> > Won't this be slightly hard to do if you mix them together?
>
> Thanks, that's a good point. Do you expect any special challenges other
> than just having to handle runtime SoC detection in more places and
> deal with larger final binaries on the hardware, which does not need
> PSCI itself?
We have similar issues to deal with on most TI SoCs as well. We want to
share code as much as possible to avoid duplication, etc. As for
run-time sharing, that's where it gets trickier. You're going to have
some sort of size constraint on your binary so just how close are you to
hitting it today on the smaller of the parts that you would run this on?
In some cases, for the first part of the problem, we may want to do "if
(is_sun4i()) { ... }" code that boils down to a compile-time check
anyhow. I expect Simon to possibly chime in here as he's done some work
in the past on this concept, for all CONFIG options (but I'm not sold on
the idea for use everywhere, just yet anyhow).
--
Tom
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^ permalink raw reply [flat|nested] 20+ messages in thread* [U-Boot] [PATCH 3/6] sunxi: add Cubieboard2 support
2014-07-24 15:00 ` Tom Rini
@ 2014-07-24 21:40 ` Siarhei Siamashka
2014-07-25 13:39 ` Tom Rini
0 siblings, 1 reply; 20+ messages in thread
From: Siarhei Siamashka @ 2014-07-24 21:40 UTC (permalink / raw)
To: u-boot
On Thu, 24 Jul 2014 11:00:31 -0400
Tom Rini <trini@ti.com> wrote:
> On Thu, Jul 24, 2014 at 03:47:53PM +0300, Siarhei Siamashka wrote:
> > On Thu, 24 Jul 2014 11:18:15 +0800
> > Chen-Yu Tsai <wens@csie.org> wrote:
> >
> > > On Thu, Jul 24, 2014 at 11:12 AM, Siarhei Siamashka
> > > <siarhei.siamashka@gmail.com> wrote:
> > > > On Thu, 5 Jun 2014 19:00:14 +0100
> > > > Ian Campbell <ijc@hellion.org.uk> wrote:
> > > >
> > > >> This is a sun7i (A20) based followup to the sun4i (A10)
> > > >> Cubieboard. It has GMAC using MII mode.
> > > >>
> > > >> Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
> > > >> Acked-by: Hans de Goede <hdegoede@redhat.com>
> > > >
> > > > This board is using exactly the same PCB as the Cubieboard1. And only
> > > > the SoC is different (Allwinner A20 instead of the pin-compatible
> > > > Allwinner A10).
> > > >
> > > > Before piling up more board configurations, we might want to consider
> > > > supporting both Cubieboard1 and Cubieboard2 with a single u-boot binary
> > > > (and perhaps keep Cubieboard1 and Cubieboard2 as aliases in boards.cfg).
> > > > The Allwinner SoCs have support for runtime identification of the SoC
> > > > type (sun4i/sun5i/sun7i) via the VER_REG (Version Register) located at
> > > > the address 0x01C00024 as explained in the Allwinner A20 user manual.
> > > > This requires replacing all the CONFIG_SUN4I/CONFIG_SUN5I/CONFIG_SUN7I
> > > > ifdefs in the u-boot code with a runtime SoC type checks, but there
> > > > are not too many places affected (mostly just the DRAM code).
> > >
> > > A20 will need PSCI for SMP and virtualization support.
> > > (I know the related code isn't in there yet.)
> > > Won't this be slightly hard to do if you mix them together?
> >
> > Thanks, that's a good point. Do you expect any special challenges other
> > than just having to handle runtime SoC detection in more places and
> > deal with larger final binaries on the hardware, which does not need
> > PSCI itself?
>
> We have similar issues to deal with on most TI SoCs as well. We want to
> share code as much as possible to avoid duplication, etc. As for
> run-time sharing, that's where it gets trickier. You're going to have
> some sort of size constraint on your binary so just how close are you to
> hitting it today on the smaller of the parts that you would run this on?
As far as I know, the most SRAM space constrained case on Allwinner
hardware used to be the FEL boot mode, where we only had roughly ~15K
for the SPL (code, data, stack). This can be improved though:
http://lists.denx.de/pipermail/u-boot/2014-July/183985.html
But I need to verify the SRAM size constraints again and come up with
the detailed numbers. And also have a closer look at how this all
interacts with the PSCI support.
> In some cases, for the first part of the problem, we may want to do "if
> (is_sun4i()) { ... }" code that boils down to a compile-time check
> anyhow.
Right, if the 'is_sun4i()' is a macro (should it be lower or upper
case?), which expands to a compile time constant 0 or 1 in some
configurations instead of the runtime checks, then the compiler is
normally able to remove the unreachable parts of code and save space.
This is a more flexible approach than using ifdefs.
> I expect Simon to possibly chime in here as he's done some work
> in the past on this concept, for all CONFIG options (but I'm not sold on
> the idea for use everywhere, just yet anyhow).
--
Best regards,
Siarhei Siamashka
^ permalink raw reply [flat|nested] 20+ messages in thread* [U-Boot] [PATCH 3/6] sunxi: add Cubieboard2 support
2014-07-24 21:40 ` Siarhei Siamashka
@ 2014-07-25 13:39 ` Tom Rini
0 siblings, 0 replies; 20+ messages in thread
From: Tom Rini @ 2014-07-25 13:39 UTC (permalink / raw)
To: u-boot
On Fri, Jul 25, 2014 at 12:40:04AM +0300, Siarhei Siamashka wrote:
> On Thu, 24 Jul 2014 11:00:31 -0400
> Tom Rini <trini@ti.com> wrote:
>
> > On Thu, Jul 24, 2014 at 03:47:53PM +0300, Siarhei Siamashka wrote:
> > > On Thu, 24 Jul 2014 11:18:15 +0800
> > > Chen-Yu Tsai <wens@csie.org> wrote:
> > >
> > > > On Thu, Jul 24, 2014 at 11:12 AM, Siarhei Siamashka
> > > > <siarhei.siamashka@gmail.com> wrote:
> > > > > On Thu, 5 Jun 2014 19:00:14 +0100
> > > > > Ian Campbell <ijc@hellion.org.uk> wrote:
> > > > >
> > > > >> This is a sun7i (A20) based followup to the sun4i (A10)
> > > > >> Cubieboard. It has GMAC using MII mode.
> > > > >>
> > > > >> Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
> > > > >> Acked-by: Hans de Goede <hdegoede@redhat.com>
> > > > >
> > > > > This board is using exactly the same PCB as the Cubieboard1. And only
> > > > > the SoC is different (Allwinner A20 instead of the pin-compatible
> > > > > Allwinner A10).
> > > > >
> > > > > Before piling up more board configurations, we might want to consider
> > > > > supporting both Cubieboard1 and Cubieboard2 with a single u-boot binary
> > > > > (and perhaps keep Cubieboard1 and Cubieboard2 as aliases in boards.cfg).
> > > > > The Allwinner SoCs have support for runtime identification of the SoC
> > > > > type (sun4i/sun5i/sun7i) via the VER_REG (Version Register) located at
> > > > > the address 0x01C00024 as explained in the Allwinner A20 user manual.
> > > > > This requires replacing all the CONFIG_SUN4I/CONFIG_SUN5I/CONFIG_SUN7I
> > > > > ifdefs in the u-boot code with a runtime SoC type checks, but there
> > > > > are not too many places affected (mostly just the DRAM code).
> > > >
> > > > A20 will need PSCI for SMP and virtualization support.
> > > > (I know the related code isn't in there yet.)
> > > > Won't this be slightly hard to do if you mix them together?
> > >
> > > Thanks, that's a good point. Do you expect any special challenges other
> > > than just having to handle runtime SoC detection in more places and
> > > deal with larger final binaries on the hardware, which does not need
> > > PSCI itself?
> >
> > We have similar issues to deal with on most TI SoCs as well. We want to
> > share code as much as possible to avoid duplication, etc. As for
> > run-time sharing, that's where it gets trickier. You're going to have
> > some sort of size constraint on your binary so just how close are you to
> > hitting it today on the smaller of the parts that you would run this on?
>
> As far as I know, the most SRAM space constrained case on Allwinner
> hardware used to be the FEL boot mode, where we only had roughly ~15K
> for the SPL (code, data, stack). This can be improved though:
>
> http://lists.denx.de/pipermail/u-boot/2014-July/183985.html
>
> But I need to verify the SRAM size constraints again and come up with
> the detailed numbers. And also have a closer look at how this all
> interacts with the PSCI support.
Yeah, it's important to get the worst-case numbers just right. OMAP4 is
ours and that's pretty tight :(
> > In some cases, for the first part of the problem, we may want to do "if
> > (is_sun4i()) { ... }" code that boils down to a compile-time check
> > anyhow.
>
> Right, if the 'is_sun4i()' is a macro (should it be lower or upper
> case?), which expands to a compile time constant 0 or 1 in some
> configurations instead of the runtime checks, then the compiler is
> normally able to remove the unreachable parts of code and save space.
> This is a more flexible approach than using ifdefs.
I use board_is_foo() in the TI SoC cases where we have one config that
supports many boards of the same SoC family (ie am335x_evm supports
beaglebone black/white, GP EVM, EVM SK and IDK EVM, and various revs of
the boards too as needed). So board_is_sun4i(), etc sounds fine with
me. The only tricky part of compile-time consolidation is making sure
you don't get bit by https://gcc.gnu.org/bugzilla/show_bug.cgi?id=54303
--
Tom
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^ permalink raw reply [flat|nested] 20+ messages in thread
* [U-Boot] [PATCH 3/6] sunxi: add Cubieboard2 support
2014-07-24 3:12 ` Siarhei Siamashka
2014-07-24 3:18 ` Chen-Yu Tsai
@ 2014-07-24 6:45 ` Ian Campbell
2014-07-24 21:12 ` Siarhei Siamashka
1 sibling, 1 reply; 20+ messages in thread
From: Ian Campbell @ 2014-07-24 6:45 UTC (permalink / raw)
To: u-boot
On Thu, 2014-07-24 at 06:12 +0300, Siarhei Siamashka wrote:
> On Thu, 5 Jun 2014 19:00:14 +0100
> Ian Campbell <ijc@hellion.org.uk> wrote:
>
> > This is a sun7i (A20) based followup to the sun4i (A10)
> > Cubieboard. It has GMAC using MII mode.
> >
> > Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
> > Acked-by: Hans de Goede <hdegoede@redhat.com>
>
> This board is using exactly the same PCB as the Cubieboard1. And only
> the SoC is different (Allwinner A20 instead of the pin-compatible
> Allwinner A10).
>
> Before piling up more board configurations, we might want to consider
> supporting both Cubieboard1 and Cubieboard2 with a single u-boot binary
> (and perhaps keep Cubieboard1 and Cubieboard2 as aliases in boards.cfg).
> The Allwinner SoCs have support for runtime identification of the SoC
> type (sun4i/sun5i/sun7i) via the VER_REG (Version Register) located at
> the address 0x01C00024 as explained in the Allwinner A20 user manual.
> This requires replacing all the CONFIG_SUN4I/CONFIG_SUN5I/CONFIG_SUN7I
> ifdefs in the u-boot code with a runtime SoC type checks, but there
> are not too many places affected (mostly just the DRAM code).
This all sounds nice but is very certainly a future piece of work not
related to this patch submission.
> The newly added Cubieboard2 from your patch appears to be missing the
> important AXP209_POWER option. So the patch is not good enough to be
> pushed anywhere in its current form.
It works for me regardless and always has. The AXP209 config is trivial
to add now that Hans has added the relevant code.
Ian.
^ permalink raw reply [flat|nested] 20+ messages in thread
* [U-Boot] [PATCH 3/6] sunxi: add Cubieboard2 support
2014-07-24 6:45 ` Ian Campbell
@ 2014-07-24 21:12 ` Siarhei Siamashka
2014-07-25 6:52 ` Ian Campbell
0 siblings, 1 reply; 20+ messages in thread
From: Siarhei Siamashka @ 2014-07-24 21:12 UTC (permalink / raw)
To: u-boot
On Thu, 24 Jul 2014 07:45:44 +0100
Ian Campbell <ijc@hellion.org.uk> wrote:
> On Thu, 2014-07-24 at 06:12 +0300, Siarhei Siamashka wrote:
> > On Thu, 5 Jun 2014 19:00:14 +0100
> > Ian Campbell <ijc@hellion.org.uk> wrote:
> >
> > > This is a sun7i (A20) based followup to the sun4i (A10)
> > > Cubieboard. It has GMAC using MII mode.
> > >
> > > Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
> > > Acked-by: Hans de Goede <hdegoede@redhat.com>
> >
> > This board is using exactly the same PCB as the Cubieboard1. And only
> > the SoC is different (Allwinner A20 instead of the pin-compatible
> > Allwinner A10).
> >
> > Before piling up more board configurations, we might want to consider
> > supporting both Cubieboard1 and Cubieboard2 with a single u-boot binary
> > (and perhaps keep Cubieboard1 and Cubieboard2 as aliases in boards.cfg).
> > The Allwinner SoCs have support for runtime identification of the SoC
> > type (sun4i/sun5i/sun7i) via the VER_REG (Version Register) located at
> > the address 0x01C00024 as explained in the Allwinner A20 user manual.
> > This requires replacing all the CONFIG_SUN4I/CONFIG_SUN5I/CONFIG_SUN7I
> > ifdefs in the u-boot code with a runtime SoC type checks, but there
> > are not too many places affected (mostly just the DRAM code).
>
> This all sounds nice but is very certainly a future piece of work not
> related to this patch submission.
The multi-soc support (within the Allwinner A10/A13/A20 family) is the
feature, which is scheduled for this merge window. It is a present
piece of work.
Your patch is related in the sense that it is detrimental to this goal.
> > The newly added Cubieboard2 from your patch appears to be missing the
> > important AXP209_POWER option. So the patch is not good enough to be
> > pushed anywhere in its current form.
>
> It works for me regardless and always has.
This simply means that your board is not very sensitive to the use of
wrong voltages and may tolerate some abuse. You are just betting on
luck.
If you have been tracking the linux-sunxi mailing list, wrong voltages
(dcdc3 in particular) have caused some very real reliability problems
for some fraction of users. "Works for me" is not the right answer.
> The AXP209 config is trivial to add now that Hans has added the relevant code.
Yes. You can fix the problem after the fact, or you can avoid pushing
the problematic commit in the first place and do something better.
--
Best regards,
Siarhei Siamashka
^ permalink raw reply [flat|nested] 20+ messages in thread
* [U-Boot] [PATCH 3/6] sunxi: add Cubieboard2 support
2014-07-24 21:12 ` Siarhei Siamashka
@ 2014-07-25 6:52 ` Ian Campbell
2014-07-25 13:46 ` Tom Rini
2014-07-26 12:15 ` Siarhei Siamashka
0 siblings, 2 replies; 20+ messages in thread
From: Ian Campbell @ 2014-07-25 6:52 UTC (permalink / raw)
To: u-boot
On Fri, 2014-07-25 at 00:12 +0300, Siarhei Siamashka wrote:
> The multi-soc support (within the Allwinner A10/A13/A20 family) is the
> feature, which is scheduled for this merge window. It is a present
> piece of work.
I have never seen any such code, nor am I aware of any such thing being
"scheduled" for this merge window (who by?).
As far as I'm concerned this is not a goal for this merge window, if it
lands then that would be nice but I think you are either underestimating
the work involved or over estimating the size of the merge window.
> Your patch is related in the sense that it is detrimental to this goal.
No it is not. Whoever eventually wants to work on multi SoC support can
trivially build on this series.
> > > The newly added Cubieboard2 from your patch appears to be missing the
> > > important AXP209_POWER option. So the patch is not good enough to be
> > > pushed anywhere in its current form.
> >
> > It works for me regardless and always has.
>
> This simply means that your board is not very sensitive to the use of
> wrong voltages and may tolerate some abuse. You are just betting on
> luck.
The sunxi github tree had exactly the same lack of power controller
config issue and it appears to be fine for plenty of people.
Note that we have not yet merged FAST_MBUS into mainline.
> If you have been tracking the linux-sunxi mailing list, wrong voltages
> (dcdc3 in particular) have caused some very real reliability problems
> for some fraction of users. "Works for me" is not the right answer.
>
> > The AXP209 config is trivial to add now that Hans has added the relevant code.
And I have already sent a patch to do so.
> Yes. You can fix the problem after the fact, or you can avoid pushing
> the problematic commit in the first place and do something better.
We are not going to redo all of these patches from scratch as you seem
to be asking repeatedly for every trivial issue you have found in your
review of this series which I'm afraid is several weeks to late to be
useful.
Please base your work on what is currently in u-boot-sunxi#master, that
is now the baseline. Even if we *were* to redo the current stuff as you
are asking your work will still have to be based on that.
Ian.
^ permalink raw reply [flat|nested] 20+ messages in thread
* [U-Boot] [PATCH 3/6] sunxi: add Cubieboard2 support
2014-07-25 6:52 ` Ian Campbell
@ 2014-07-25 13:46 ` Tom Rini
2014-07-26 12:15 ` Siarhei Siamashka
1 sibling, 0 replies; 20+ messages in thread
From: Tom Rini @ 2014-07-25 13:46 UTC (permalink / raw)
To: u-boot
On Fri, Jul 25, 2014 at 07:52:28AM +0100, Ian Campbell wrote:
> On Fri, 2014-07-25 at 00:12 +0300, Siarhei Siamashka wrote:
> > The multi-soc support (within the Allwinner A10/A13/A20 family) is the
> > feature, which is scheduled for this merge window. It is a present
> > piece of work.
>
> I have never seen any such code, nor am I aware of any such thing being
> "scheduled" for this merge window (who by?).
>
> As far as I'm concerned this is not a goal for this merge window, if it
> lands then that would be nice but I think you are either underestimating
> the work involved or over estimating the size of the merge window.
FWIW, merge window closes 02 August 2014, and that means that v1 must be
posted by then (and stable enough after that time that the relevant
custodians feel comfortable pulling in the patches for a release that
happens 13 October). And Ian and Hans _are_ the custodians of record.
--
Tom
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^ permalink raw reply [flat|nested] 20+ messages in thread
* [U-Boot] [PATCH 3/6] sunxi: add Cubieboard2 support
2014-07-25 6:52 ` Ian Campbell
2014-07-25 13:46 ` Tom Rini
@ 2014-07-26 12:15 ` Siarhei Siamashka
1 sibling, 0 replies; 20+ messages in thread
From: Siarhei Siamashka @ 2014-07-26 12:15 UTC (permalink / raw)
To: u-boot
On Fri, 25 Jul 2014 07:52:28 +0100
Ian Campbell <ijc@hellion.org.uk> wrote:
> On Fri, 2014-07-25 at 00:12 +0300, Siarhei Siamashka wrote:
> > The multi-soc support (within the Allwinner A10/A13/A20 family) is the
> > feature, which is scheduled for this merge window. It is a present
> > piece of work.
>
> I have never seen any such code, nor am I aware of any such thing being
> "scheduled" for this merge window (who by?).
Sorry for not stating this clear enough. I'm am taking care of this
particular part of work. And this has been the plan since the start.
> As far as I'm concerned this is not a goal for this merge window,
You have not seen all the sunxi patches yet. And the merge window is
still open.
> if it lands then that would be nice but I think you are either underestimating
> the work involved or over estimating the size of the merge window.
We'll see.
> > Your patch is related in the sense that it is detrimental to this goal.
>
> No it is not. Whoever eventually wants to work on multi SoC support can
> trivially build on this series.
Right. Anyway, I have both Cubieboard1 and Cubieboard2 hardware. So the
code in u-boot is still fully testable by me, and I'm not dependent on
the cooperation from the nominal maintainers of these boards.
> > > > The newly added Cubieboard2 from your patch appears to be missing the
> > > > important AXP209_POWER option. So the patch is not good enough to be
> > > > pushed anywhere in its current form.
> > >
> > > It works for me regardless and always has.
> >
> > This simply means that your board is not very sensitive to the use of
> > wrong voltages and may tolerate some abuse. You are just betting on
> > luck.
>
> The sunxi github tree had exactly the same lack of power controller
> config issue and it appears to be fine for plenty of people.
Okay, that's totally convincing. Not.
> Note that we have not yet merged FAST_MBUS into mainline.
FAST_MBUS was just the use of 400MHz MBUS clock frequency instead
of 300MHz. It required the dcdc3 voltage increase from 1.25V to 1.3V.
Not doing so caused troubles for a *small* fraction of users. The
odds of *you* being in this group are indeed rather small.
Now we are talking about the 300MHz MBUS clock frequency in the
mainline u-boot, which is normally used with the dcdc3 voltage 1.25V.
But the default AXP209 dcdc3 voltage after reset appears to be only
1.2V (measured on the Cubietruck, where the tests pads are easily
accessible).
> > If you have been tracking the linux-sunxi mailing list, wrong voltages
> > (dcdc3 in particular) have caused some very real reliability problems
> > for some fraction of users. "Works for me" is not the right answer.
> >
> > > The AXP209 config is trivial to add now that Hans has added the relevant code.
>
> And I have already sent a patch to do so.
Thanks for addressing the problem. That was the exactly the action I
expected from you. You don't need to go full length explaining how
minor or insignificant it was. Really.
> > Yes. You can fix the problem after the fact, or you can avoid pushing
> > the problematic commit in the first place and do something better.
>
> We are not going to redo all of these patches from scratch as you seem
> to be asking repeatedly for every trivial issue you have found in your
> review of this series which I'm afraid is several weeks to late to be
> useful.
I am reviewing your patches because it is a good development practice,
and actually a part of the u-boot development process. I'm not doing
this personally for you. This is just needed to ensure code quality.
As for redoing the patches from scratch, you totally got the wrong
idea. I'm not the one to tell you what to do. I can only share my
opinion and you don't have any obligations to pay attention. It is
your responsibility as a custodian to make decisions in the best
interests of the sunxi project and do a proper job.
> Please base your work on what is currently in u-boot-sunxi#master, that
> is now the baseline.
OK. Let's go this route.
> Even if we *were* to redo the current stuff as you
> are asking your work will still have to be based on that.
I just want to mitigate risks and ensure that you don't screw up
something as an inexperienced custodian.
And was just waiting for the upstream custodians to confirm that
they are really going to accept your strange early pull request.
Now the comments from Tom seem to be reassuring.
--
Best regards,
Siarhei Siamashka
^ permalink raw reply [flat|nested] 20+ messages in thread
* [U-Boot] [PATCH 4/6] sunxi: add gpio driver
2014-06-05 17:59 [U-Boot] [PATCH v2 0/6] sunxi: GPIO, AHCI and Cubieboard 2 support Ian Campbell
` (2 preceding siblings ...)
2014-06-05 18:00 ` [U-Boot] [PATCH 3/6] sunxi: add Cubieboard2 support Ian Campbell
@ 2014-06-05 18:00 ` Ian Campbell
2014-06-08 12:19 ` Hans de Goede
2014-06-05 18:00 ` [U-Boot] [PATCH 5/6] sunxi: use setbits_le32 to enable the DMA clock Ian Campbell
2014-06-05 18:00 ` [U-Boot] [PATCH 6/6] ahci: provide sunxi SATA driver using AHCI platform framework Ian Campbell
5 siblings, 1 reply; 20+ messages in thread
From: Ian Campbell @ 2014-06-05 18:00 UTC (permalink / raw)
To: u-boot
This patch enables CONFIG_CMD_GPIO for the Allwinner (sunxi) platform as well
as providing the common gpio API (gpio_request/free, direction in/out, get/set
etc).
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Ma Haijun <mahaijuns@gmail.com>
Signed-off-by: Oliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Cc: Henrik Nordstr?m <henrik@henriknordstrom.net>
Cc: Tom Cubie <Mr.hipboi@gmail.com>
---
arch/arm/include/asm/arch-sunxi/gpio.h | 2 +
drivers/gpio/Makefile | 1 +
drivers/gpio/sunxi_gpio.c | 102 +++++++++++++++++++++++++++++++++
include/configs/sunxi-common.h | 4 ++
4 files changed, 109 insertions(+)
create mode 100644 drivers/gpio/sunxi_gpio.c
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h
index 892479c..f7f3d8c 100644
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -143,5 +143,7 @@ int sunxi_gpio_set_cfgpin(u32 pin, u32 val);
int sunxi_gpio_get_cfgpin(u32 pin);
int sunxi_gpio_set_drv(u32 pin, u32 val);
int sunxi_gpio_set_pull(u32 pin, u32 val);
+int sunxi_name_to_gpio(const char *name);
+#define name_to_gpio(name) sunxi_name_to_gpio(name)
#endif /* _SUNXI_GPIO_H */
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 4e001e1..86813b9 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -34,3 +34,4 @@ obj-$(CONFIG_XILINX_GPIO) += xilinx_gpio.o
obj-$(CONFIG_ADI_GPIO2) += adi_gpio2.o
obj-$(CONFIG_TCA642X) += tca642x.o
oby-$(CONFIG_SX151X) += sx151x.o
+obj-$(CONFIG_SUNXI_GPIO) += sunxi_gpio.o
diff --git a/drivers/gpio/sunxi_gpio.c b/drivers/gpio/sunxi_gpio.c
new file mode 100644
index 0000000..0c50a8f
--- /dev/null
+++ b/drivers/gpio/sunxi_gpio.c
@@ -0,0 +1,102 @@
+/*
+ * (C) Copyright 2012 Henrik Nordstrom <henrik@henriknordstrom.net>
+ *
+ * Based on earlier arch/arm/cpu/armv7/sunxi/gpio.c:
+ *
+ * (C) Copyright 2007-2011
+ * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
+ * Tom Cubie <tangliang@allwinnertech.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/gpio.h>
+
+static int sunxi_gpio_output(u32 pin, u32 val)
+{
+ u32 dat;
+ u32 bank = GPIO_BANK(pin);
+ u32 num = GPIO_NUM(pin);
+ struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
+
+ dat = readl(&pio->dat);
+ if (val)
+ dat |= 0x1 << num;
+ else
+ dat &= ~(0x1 << num);
+
+ writel(dat, &pio->dat);
+
+ return 0;
+}
+
+static int sunxi_gpio_input(u32 pin)
+{
+ u32 dat;
+ u32 bank = GPIO_BANK(pin);
+ u32 num = GPIO_NUM(pin);
+ struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
+
+ dat = readl(&pio->dat);
+ dat >>= num;
+
+ return dat & 0x1;
+}
+
+int gpio_request(unsigned gpio, const char *label)
+{
+ return 0;
+}
+
+int gpio_free(unsigned gpio)
+{
+ return 0;
+}
+
+int gpio_direction_input(unsigned gpio)
+{
+ sunxi_gpio_set_cfgpin(gpio, SUNXI_GPIO_INPUT);
+
+ return sunxi_gpio_input(gpio);
+}
+
+int gpio_direction_output(unsigned gpio, int value)
+{
+ sunxi_gpio_set_cfgpin(gpio, SUNXI_GPIO_OUTPUT);
+
+ return sunxi_gpio_output(gpio, value);
+}
+
+int gpio_get_value(unsigned gpio)
+{
+ return sunxi_gpio_input(gpio);
+}
+
+int gpio_set_value(unsigned gpio, int value)
+{
+ return sunxi_gpio_output(gpio, value);
+}
+
+int sunxi_name_to_gpio(const char *name)
+{
+ int group = 0;
+ int groupsize = 9 * 32;
+ long pin;
+ char *eptr;
+ if (*name == 'P' || *name == 'p')
+ name++;
+ if (*name >= 'A') {
+ group = *name - (*name > 'a' ? 'a' : 'A');
+ groupsize = 32;
+ name++;
+ }
+
+ pin = simple_strtol(name, &eptr, 10);
+ if (!*name || *eptr)
+ return -1;
+ if (pin < 0 || pin > groupsize || group >= 9)
+ return -1;
+ return group * 32 + pin;
+}
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index a9d104a..ebb9f7a 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -179,6 +179,10 @@
#define CONFIG_CONS_INDEX 1 /* UART0 */
#endif
+/* GPIO */
+#define CONFIG_SUNXI_GPIO
+#define CONFIG_CMD_GPIO
+
/* Ethernet support */
#ifdef CONFIG_SUNXI_EMAC
#define CONFIG_MII /* MII PHY management */
--
1.9.0
^ permalink raw reply related [flat|nested] 20+ messages in thread* [U-Boot] [PATCH 4/6] sunxi: add gpio driver
2014-06-05 18:00 ` [U-Boot] [PATCH 4/6] sunxi: add gpio driver Ian Campbell
@ 2014-06-08 12:19 ` Hans de Goede
0 siblings, 0 replies; 20+ messages in thread
From: Hans de Goede @ 2014-06-08 12:19 UTC (permalink / raw)
To: u-boot
Hi,
On 06/05/2014 08:00 PM, Ian Campbell wrote:
> This patch enables CONFIG_CMD_GPIO for the Allwinner (sunxi) platform as well
> as providing the common gpio API (gpio_request/free, direction in/out, get/set
> etc).
>
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
> Signed-off-by: Ma Haijun <mahaijuns@gmail.com>
> Signed-off-by: Oliver Schinagl <oliver@schinagl.nl>
> Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
> Cc: Henrik Nordstr?m <henrik@henriknordstrom.net>
> Cc: Tom Cubie <Mr.hipboi@gmail.com>
> ---
> arch/arm/include/asm/arch-sunxi/gpio.h | 2 +
> drivers/gpio/Makefile | 1 +
> drivers/gpio/sunxi_gpio.c | 102 +++++++++++++++++++++++++++++++++
> include/configs/sunxi-common.h | 4 ++
> 4 files changed, 109 insertions(+)
> create mode 100644 drivers/gpio/sunxi_gpio.c
Looks good:
Acked-by: Hans de Goede <hdegoede@redhat.com>
Regards,
Hans
>
> diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h
> index 892479c..f7f3d8c 100644
> --- a/arch/arm/include/asm/arch-sunxi/gpio.h
> +++ b/arch/arm/include/asm/arch-sunxi/gpio.h
> @@ -143,5 +143,7 @@ int sunxi_gpio_set_cfgpin(u32 pin, u32 val);
> int sunxi_gpio_get_cfgpin(u32 pin);
> int sunxi_gpio_set_drv(u32 pin, u32 val);
> int sunxi_gpio_set_pull(u32 pin, u32 val);
> +int sunxi_name_to_gpio(const char *name);
> +#define name_to_gpio(name) sunxi_name_to_gpio(name)
>
> #endif /* _SUNXI_GPIO_H */
> diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
> index 4e001e1..86813b9 100644
> --- a/drivers/gpio/Makefile
> +++ b/drivers/gpio/Makefile
> @@ -34,3 +34,4 @@ obj-$(CONFIG_XILINX_GPIO) += xilinx_gpio.o
> obj-$(CONFIG_ADI_GPIO2) += adi_gpio2.o
> obj-$(CONFIG_TCA642X) += tca642x.o
> oby-$(CONFIG_SX151X) += sx151x.o
> +obj-$(CONFIG_SUNXI_GPIO) += sunxi_gpio.o
> diff --git a/drivers/gpio/sunxi_gpio.c b/drivers/gpio/sunxi_gpio.c
> new file mode 100644
> index 0000000..0c50a8f
> --- /dev/null
> +++ b/drivers/gpio/sunxi_gpio.c
> @@ -0,0 +1,102 @@
> +/*
> + * (C) Copyright 2012 Henrik Nordstrom <henrik@henriknordstrom.net>
> + *
> + * Based on earlier arch/arm/cpu/armv7/sunxi/gpio.c:
> + *
> + * (C) Copyright 2007-2011
> + * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
> + * Tom Cubie <tangliang@allwinnertech.com>
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#include <common.h>
> +#include <asm/io.h>
> +#include <asm/gpio.h>
> +
> +static int sunxi_gpio_output(u32 pin, u32 val)
> +{
> + u32 dat;
> + u32 bank = GPIO_BANK(pin);
> + u32 num = GPIO_NUM(pin);
> + struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
> +
> + dat = readl(&pio->dat);
> + if (val)
> + dat |= 0x1 << num;
> + else
> + dat &= ~(0x1 << num);
> +
> + writel(dat, &pio->dat);
> +
> + return 0;
> +}
> +
> +static int sunxi_gpio_input(u32 pin)
> +{
> + u32 dat;
> + u32 bank = GPIO_BANK(pin);
> + u32 num = GPIO_NUM(pin);
> + struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
> +
> + dat = readl(&pio->dat);
> + dat >>= num;
> +
> + return dat & 0x1;
> +}
> +
> +int gpio_request(unsigned gpio, const char *label)
> +{
> + return 0;
> +}
> +
> +int gpio_free(unsigned gpio)
> +{
> + return 0;
> +}
> +
> +int gpio_direction_input(unsigned gpio)
> +{
> + sunxi_gpio_set_cfgpin(gpio, SUNXI_GPIO_INPUT);
> +
> + return sunxi_gpio_input(gpio);
> +}
> +
> +int gpio_direction_output(unsigned gpio, int value)
> +{
> + sunxi_gpio_set_cfgpin(gpio, SUNXI_GPIO_OUTPUT);
> +
> + return sunxi_gpio_output(gpio, value);
> +}
> +
> +int gpio_get_value(unsigned gpio)
> +{
> + return sunxi_gpio_input(gpio);
> +}
> +
> +int gpio_set_value(unsigned gpio, int value)
> +{
> + return sunxi_gpio_output(gpio, value);
> +}
> +
> +int sunxi_name_to_gpio(const char *name)
> +{
> + int group = 0;
> + int groupsize = 9 * 32;
> + long pin;
> + char *eptr;
> + if (*name == 'P' || *name == 'p')
> + name++;
> + if (*name >= 'A') {
> + group = *name - (*name > 'a' ? 'a' : 'A');
> + groupsize = 32;
> + name++;
> + }
> +
> + pin = simple_strtol(name, &eptr, 10);
> + if (!*name || *eptr)
> + return -1;
> + if (pin < 0 || pin > groupsize || group >= 9)
> + return -1;
> + return group * 32 + pin;
> +}
> diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
> index a9d104a..ebb9f7a 100644
> --- a/include/configs/sunxi-common.h
> +++ b/include/configs/sunxi-common.h
> @@ -179,6 +179,10 @@
> #define CONFIG_CONS_INDEX 1 /* UART0 */
> #endif
>
> +/* GPIO */
> +#define CONFIG_SUNXI_GPIO
> +#define CONFIG_CMD_GPIO
> +
> /* Ethernet support */
> #ifdef CONFIG_SUNXI_EMAC
> #define CONFIG_MII /* MII PHY management */
>
^ permalink raw reply [flat|nested] 20+ messages in thread
* [U-Boot] [PATCH 5/6] sunxi: use setbits_le32 to enable the DMA clock
2014-06-05 17:59 [U-Boot] [PATCH v2 0/6] sunxi: GPIO, AHCI and Cubieboard 2 support Ian Campbell
` (3 preceding siblings ...)
2014-06-05 18:00 ` [U-Boot] [PATCH 4/6] sunxi: add gpio driver Ian Campbell
@ 2014-06-05 18:00 ` Ian Campbell
2014-06-08 12:19 ` Hans de Goede
2014-06-05 18:00 ` [U-Boot] [PATCH 6/6] ahci: provide sunxi SATA driver using AHCI platform framework Ian Campbell
5 siblings, 1 reply; 20+ messages in thread
From: Ian Campbell @ 2014-06-05 18:00 UTC (permalink / raw)
To: u-boot
Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
---
v2: Split out from "ahci: provide sunxi SATA driver using AHCI
platform framework"
---
arch/arm/cpu/armv7/sunxi/clock_sun4i.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/sunxi/clock_sun4i.c b/arch/arm/cpu/armv7/sunxi/clock_sun4i.c
index 5a7da3c..b8b16cf 100644
--- a/arch/arm/cpu/armv7/sunxi/clock_sun4i.c
+++ b/arch/arm/cpu/armv7/sunxi/clock_sun4i.c
@@ -36,8 +36,7 @@ void clock_init_safe(void)
CPU_CLK_SRC_PLL1 << CPU_CLK_SRC_SHIFT,
&ccm->cpu_ahb_apb0_cfg);
#ifdef CONFIG_SUN7I
- writel(0x1 << AHB_GATE_OFFSET_DMA | readl(&ccm->ahb_gate0),
- &ccm->ahb_gate0);
+ setbits_le32(&ccm->ahb_gate0, 0x1 << AHB_GATE_OFFSET_DMA);
#endif
writel(PLL6_CFG_DEFAULT, &ccm->pll6_cfg);
}
--
1.9.0
^ permalink raw reply related [flat|nested] 20+ messages in thread* [U-Boot] [PATCH 5/6] sunxi: use setbits_le32 to enable the DMA clock
2014-06-05 18:00 ` [U-Boot] [PATCH 5/6] sunxi: use setbits_le32 to enable the DMA clock Ian Campbell
@ 2014-06-08 12:19 ` Hans de Goede
0 siblings, 0 replies; 20+ messages in thread
From: Hans de Goede @ 2014-06-08 12:19 UTC (permalink / raw)
To: u-boot
On 06/05/2014 08:00 PM, Ian Campbell wrote:
> Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
> ---
> v2: Split out from "ahci: provide sunxi SATA driver using AHCI
> platform framework"
Looks good:
Acked-by: Hans de Goede <hdegoede@redhat.com>
Regards,
Hans
> ---
> arch/arm/cpu/armv7/sunxi/clock_sun4i.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/sunxi/clock_sun4i.c b/arch/arm/cpu/armv7/sunxi/clock_sun4i.c
> index 5a7da3c..b8b16cf 100644
> --- a/arch/arm/cpu/armv7/sunxi/clock_sun4i.c
> +++ b/arch/arm/cpu/armv7/sunxi/clock_sun4i.c
> @@ -36,8 +36,7 @@ void clock_init_safe(void)
> CPU_CLK_SRC_PLL1 << CPU_CLK_SRC_SHIFT,
> &ccm->cpu_ahb_apb0_cfg);
> #ifdef CONFIG_SUN7I
> - writel(0x1 << AHB_GATE_OFFSET_DMA | readl(&ccm->ahb_gate0),
> - &ccm->ahb_gate0);
> + setbits_le32(&ccm->ahb_gate0, 0x1 << AHB_GATE_OFFSET_DMA);
> #endif
> writel(PLL6_CFG_DEFAULT, &ccm->pll6_cfg);
> }
>
^ permalink raw reply [flat|nested] 20+ messages in thread
* [U-Boot] [PATCH 6/6] ahci: provide sunxi SATA driver using AHCI platform framework
2014-06-05 17:59 [U-Boot] [PATCH v2 0/6] sunxi: GPIO, AHCI and Cubieboard 2 support Ian Campbell
` (4 preceding siblings ...)
2014-06-05 18:00 ` [U-Boot] [PATCH 5/6] sunxi: use setbits_le32 to enable the DMA clock Ian Campbell
@ 2014-06-05 18:00 ` Ian Campbell
5 siblings, 0 replies; 20+ messages in thread
From: Ian Campbell @ 2014-06-05 18:00 UTC (permalink / raw)
To: u-boot
This enables the necessary clocks, in AHB0 and in PLL6_CFG. This is done
for sun7i only since I don't have access to any other sunxi platforms
with sata included.
The PHY setup is derived from the Alwinner releases and Linux, but is mostly
undocumented.
The Allwinner AHCI controller also requires some magic (and, again,
undocumented) DMA initialisation when starting a port. This is added under a
suitable ifdef.
This option is enabled for Cubieboard, Cubieboard2 and Cubietruck based on
contents of Linux DTS files, including SATA power pin config taken from the
DTS. All build tested, but runtime tested on Cubieboard2 and Cubietruck only.
Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Acked-by: Hans de Goede <hdegoede@redhat.com>
---
arch/arm/cpu/armv7/sunxi/clock_sun4i.c | 4 ++
arch/arm/include/asm/arch-sunxi/clock_sun4i.h | 11 ++--
board/sunxi/Makefile | 1 +
board/sunxi/ahci.c | 84 +++++++++++++++++++++++++++
boards.cfg | 10 ++--
drivers/block/ahci.c | 16 +++++
include/ahci.h | 4 ++
include/configs/sunxi-common.h | 12 ++++
8 files changed, 133 insertions(+), 9 deletions(-)
create mode 100644 board/sunxi/ahci.c
diff --git a/arch/arm/cpu/armv7/sunxi/clock_sun4i.c b/arch/arm/cpu/armv7/sunxi/clock_sun4i.c
index b8b16cf..ecbdb01 100644
--- a/arch/arm/cpu/armv7/sunxi/clock_sun4i.c
+++ b/arch/arm/cpu/armv7/sunxi/clock_sun4i.c
@@ -39,6 +39,10 @@ void clock_init_safe(void)
setbits_le32(&ccm->ahb_gate0, 0x1 << AHB_GATE_OFFSET_DMA);
#endif
writel(PLL6_CFG_DEFAULT, &ccm->pll6_cfg);
+#ifdef CONFIG_SUNXI_AHCI
+ setbits_le32(&ccm->ahb_gate0, 0x1 << AHB_GATE_OFFSET_SATA);
+ setbits_le32(&ccm->pll6_cfg, 0x1 << CCM_PLL6_CTRL_SATA_EN_SHIFT);
+#endif
}
#endif
diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
index 928f3f2..2531cbd 100644
--- a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
@@ -218,10 +218,13 @@ struct sunxi_ccm_reg {
#define CCM_PLL5_CTRL_BYPASS (0x1 << 30)
#define CCM_PLL5_CTRL_EN (0x1 << 31)
-#define CCM_PLL6_CTRL_N_SHIFT 8
-#define CCM_PLL6_CTRL_N_MASK (0x1f << CCM_PLL6_CTRL_N_SHIFT)
-#define CCM_PLL6_CTRL_K_SHIFT 4
-#define CCM_PLL6_CTRL_K_MASK (0x3 << CCM_PLL6_CTRL_K_SHIFT)
+#define CCM_PLL6_CTRL_EN 31
+#define CCM_PLL6_CTRL_BYPASS_EN 30
+#define CCM_PLL6_CTRL_SATA_EN_SHIFT 14
+#define CCM_PLL6_CTRL_N_SHIFT 8
+#define CCM_PLL6_CTRL_N_MASK (0x1f << CCM_PLL6_CTRL_N_SHIFT)
+#define CCM_PLL6_CTRL_K_SHIFT 4
+#define CCM_PLL6_CTRL_K_MASK (0x3 << CCM_PLL6_CTRL_K_SHIFT)
#define CCM_GPS_CTRL_RESET (0x1 << 0)
#define CCM_GPS_CTRL_GATE (0x1 << 1)
diff --git a/board/sunxi/Makefile b/board/sunxi/Makefile
index 62acb8f..03f55cc 100644
--- a/board/sunxi/Makefile
+++ b/board/sunxi/Makefile
@@ -10,6 +10,7 @@
#
obj-y += board.o
obj-$(CONFIG_SUNXI_GMAC) += gmac.o
+obj-$(CONFIG_SUNXI_AHCI) += ahci.o
obj-$(CONFIG_A13_OLINUXINOM) += dram_a13_oli_micro.o
obj-$(CONFIG_CUBIEBOARD) += dram_cubieboard.o
obj-$(CONFIG_CUBIEBOARD2) += dram_cubieboard2.o
diff --git a/board/sunxi/ahci.c b/board/sunxi/ahci.c
new file mode 100644
index 0000000..0c262ea
--- /dev/null
+++ b/board/sunxi/ahci.c
@@ -0,0 +1,84 @@
+#include <common.h>
+#include <ahci.h>
+#include <scsi.h>
+#include <errno.h>
+#include <asm/io.h>
+#include <asm/gpio.h>
+
+#define AHCI_PHYCS0R 0x00c0
+#define AHCI_PHYCS1R 0x00c4
+#define AHCI_PHYCS2R 0x00c8
+#define AHCI_RWCR 0x00fc
+
+/* This magic PHY initialisation was taken from the Allwinner releases
+ * and Linux driver, but is completely undocumented.
+ */
+static int sunxi_ahci_phy_init(u32 base)
+{
+ u8 *reg_base = (u8 *)base;
+ u32 reg_val;
+ int timeout;
+
+ writel(0, reg_base + AHCI_RWCR);
+ mdelay(5);
+
+ setbits_le32(reg_base + AHCI_PHYCS1R, 0x1 << 19);
+ clrsetbits_le32(reg_base + AHCI_PHYCS0R,
+ (0x7 << 24),
+ (0x5 << 24) | (0x1 << 23) | (0x1 << 18));
+ clrsetbits_le32(reg_base + AHCI_PHYCS1R,
+ (0x3 << 16) | (0x1f << 8) | (0x3 << 6),
+ (0x2 << 16) | (0x6 << 8) | (0x2 << 6));
+ setbits_le32(reg_base + AHCI_PHYCS1R, (0x1 << 28) | (0x1 << 15));
+ clrbits_le32(reg_base + AHCI_PHYCS1R, (0x1 << 19));
+ clrsetbits_le32(reg_base + AHCI_PHYCS0R, (0x7 << 20), (0x3 << 20));
+ clrsetbits_le32(reg_base + AHCI_PHYCS2R, (0x1f << 5), (0x19 << 5));
+ mdelay(5);
+
+ setbits_le32(reg_base + AHCI_PHYCS0R, (0x1 << 19));
+
+ timeout = 250; /* Power up takes approx 50 us */
+ for (;;) {
+ reg_val = readl(reg_base + AHCI_PHYCS0R) & (0x7 << 28);
+ if (reg_val == (0x2 << 28))
+ break;
+ if (--timeout == 0) {
+ printf("AHCI PHY power up failed.\n");
+ return -EIO;
+ }
+ udelay(1);
+ };
+
+ setbits_le32(reg_base + AHCI_PHYCS2R, (0x1 << 24));
+
+ timeout = 100; /* Calibration takes approx 10 us */
+ for (;;) {
+ reg_val = readl(reg_base + AHCI_PHYCS2R) & (0x1 << 24);
+ if (reg_val == 0x0)
+ break;
+ if (--timeout == 0) {
+ printf("AHCI PHY calibration failed.\n");
+ return -EIO;
+ }
+ udelay(1);
+ }
+
+ mdelay(15);
+
+ writel(0x7, reg_base + AHCI_RWCR);
+
+ return 0;
+}
+
+void scsi_init(void)
+{
+ printf("SUNXI SCSI INIT\n");
+#ifdef CONFIG_SATAPWR
+ gpio_direction_output(CONFIG_SATAPWR, 1);
+#endif
+
+ if (sunxi_ahci_phy_init(SUNXI_SATA_BASE) < 0)
+ return;
+
+ ahci_init(SUNXI_SATA_BASE);
+}
diff --git a/boards.cfg b/boards.cfg
index ddb105e..a06d73f 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -382,11 +382,11 @@ Active arm armv7 s5pc1xx samsung goni
Active arm armv7 s5pc1xx samsung smdkc100 smdkc100 - Minkyu Kang <mk7.kang@samsung.com>
Active arm armv7 socfpga altera socfpga socfpga_cyclone5 - -
Active arm armv7 sunxi - sunxi A13-OLinuXinoM sun5i:A13_OLINUXINOM,SPL,CONS_INDEX=2 Hans de Goede <hdegoede@redhat.com>
-Active arm armv7 sunxi - sunxi Cubieboard sun4i:CUBIEBOARD,SPL,AXP209_POWER,SUNXI_EMAC Hans de Goede <hdegoede@redhat.com>
-Active arm armv7 sunxi - sunxi Cubieboard2 sun7i:CUBIEBOARD2,SPL,SUNXI_GMAC Ian Campbell <ijc@hellion.org.uk>:Hans de Goede <hdegoede@redhat.com>
-Active arm armv7 sunxi - sunxi Cubieboard2_FEL sun7i:CUBIEBOARD2,SPL_FEL,SUNXI_GMAC Ian Campbell <ijc@hellion.org.uk>:Hans de Goede <hdegoede@redhat.com>
-Active arm armv7 sunxi - sunxi Cubietruck sun7i:CUBIETRUCK,SPL,AXP209_POWER,SUNXI_GMAC,RGMII Ian Campbell <ijc@hellion.org.uk>:Hans de Goede <hdegoede@redhat.com>
-Active arm armv7 sunxi - sunxi Cubietruck_FEL sun7i:CUBIETRUCK,SPL_FEL,AXP209_POWER,SUNXI_GMAC,RGMII Ian Campbell <ijc@hellion.org.uk>:Hans de Goede <hdegoede@redhat.com>
+Active arm armv7 sunxi - sunxi Cubieboard sun4i:CUBIEBOARD,SPL,AXP209_POWER,SUNXI_EMAC,AHCI,SATAPWR=SUNXI_GPB(8) Hans de Goede <hdegoede@redhat.com>
+Active arm armv7 sunxi - sunxi Cubieboard2 sun7i:CUBIEBOARD2,SPL,SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPB(8) Ian Campbell <ijc@hellion.org.uk>:Hans de Goede <hdegoede@redhat.com>
+Active arm armv7 sunxi - sunxi Cubieboard2_FEL sun7i:CUBIEBOARD2,SPL_FEL,SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPB(8) Ian Campbell <ijc@hellion.org.uk>:Hans de Goede <hdegoede@redhat.com>
+Active arm armv7 sunxi - sunxi Cubietruck sun7i:CUBIETRUCK,SPL,AXP209_POWER,SUNXI_GMAC,RGMII,AHCI,SATAPWR=SUNXI_GPH(12) Ian Campbell <ijc@hellion.org.uk>:Hans de Goede <hdegoede@redhat.com>
+Active arm armv7 sunxi - sunxi Cubietruck_FEL sun7i:CUBIETRUCK,SPL_FEL,AXP209_POWER,SUNXI_GMAC,RGMII,,AHCI,SATAPWR=SUNXI_GPH(12) Ian Campbell <ijc@hellion.org.uk>:Hans de Goede <hdegoede@redhat.com>
Active arm armv7 sunxi - sunxi r7-tv-dongle sun5i:R7DONGLE,SPL,AXP152_POWER Hans de Goede <hdegoede@redhat.com>
Active arm armv7 u8500 st-ericsson snowball snowball - Mathieu Poirier <mathieu.poirier@linaro.org>
Active arm armv7 u8500 st-ericsson u8500 u8500_href - -
diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c
index 4df8046..dce99ad 100644
--- a/drivers/block/ahci.c
+++ b/drivers/block/ahci.c
@@ -129,6 +129,14 @@ int __weak ahci_link_up(struct ahci_probe_ent *probe_ent, u8 port)
return 1;
}
+#ifdef CONFIG_SUNXI_AHCI
+/* The sunxi AHCI controller requires this undocumented setup */
+static void sunxi_dma_init(volatile u8 *port_mmio)
+{
+ clrsetbits_le32(port_mmio + PORT_P0DMACR, 0x0000ff00, 0x00004400);
+}
+#endif
+
static int ahci_host_init(struct ahci_probe_ent *probe_ent)
{
#ifndef CONFIG_SCSI_AHCI_PLAT
@@ -213,6 +221,10 @@ static int ahci_host_init(struct ahci_probe_ent *probe_ent)
msleep(500);
}
+#ifdef CONFIG_SUNXI_AHCI
+ sunxi_dma_init(port_mmio);
+#endif
+
/* Add the spinup command to whatever mode bits may
* already be on in the command register.
*/
@@ -545,6 +557,10 @@ static int ahci_port_start(u8 port)
writel_with_flush(pp->rx_fis, port_mmio + PORT_FIS_ADDR);
+#ifdef CONFIG_SUNXI_AHCI
+ sunxi_dma_init(port_mmio);
+#endif
+
writel_with_flush(PORT_CMD_ICC_ACTIVE | PORT_CMD_FIS_RX |
PORT_CMD_POWER_ON | PORT_CMD_SPIN_UP |
PORT_CMD_START, port_mmio + PORT_CMD);
diff --git a/include/ahci.h b/include/ahci.h
index 90e8509..35b8a8c 100644
--- a/include/ahci.h
+++ b/include/ahci.h
@@ -58,6 +58,10 @@
#define PORT_SCR_ERR 0x30 /* SATA phy register: SError */
#define PORT_SCR_ACT 0x34 /* SATA phy register: SActive */
+#ifdef CONFIG_SUNXI_AHCI
+#define PORT_P0DMACR 0x70 /* SUNXI specific "DMA register" */
+#endif
+
/* PORT_IRQ_{STAT,MASK} bits */
#define PORT_IRQ_COLD_PRES (1 << 31) /* cold presence detect */
#define PORT_IRQ_TF_ERR (1 << 30) /* task file error */
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index ebb9f7a..34fac50 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -57,6 +57,18 @@
#define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE
#define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */
+#ifdef CONFIG_AHCI
+#define CONFIG_LIBATA
+#define CONFIG_SCSI_AHCI
+#define CONFIG_SCSI_AHCI_PLAT
+#define CONFIG_SUNXI_AHCI
+#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
+#define CONFIG_SYS_SCSI_MAX_LUN 1
+#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
+ CONFIG_SYS_SCSI_MAX_LUN)
+#define CONFIG_CMD_SCSI
+#endif
+
#define CONFIG_CMD_MEMORY
#define CONFIG_CMD_SETEXPR
--
1.9.0
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