[U-Boot] [PATCH 09/18] arm: mx6: ddr: do not write into reserved bit

Tim Harvey
2014-08-06T08:18:59Z

On Mon, Aug 4, 2014 at 5:49 AM, Nikita Kiryanov <nikita@compulab.co.il> wrote:
> Hi Tim,
>
>
> On 04/08/14 08:43, Tim Harvey wrote:
>>
>> On Sun, Aug 3, 2014 at 12:34 AM, Nikita Kiryanov <nikita@compulab.co.il>
>> wrote:
>>>
>>> Bit 16 in mapsr register is in a reserved field. Don't write to it.
>>>
>>> Cc: Stefano Babic <sbabic@denx.de>
>>> Cc: Tim Harvey <tharvey@gateworks.com>
>>> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
>>> ---
>>> arch/arm/cpu/armv7/mx6/ddr.c | 2 +-
>>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/arch/arm/cpu/armv7/mx6/ddr.c b/arch/arm/cpu/armv7/mx6/ddr.c
>>> index af91314..70ce38f 100644
>>> --- a/arch/arm/cpu/armv7/mx6/ddr.c
>>> +++ b/arch/arm/cpu/armv7/mx6/ddr.c
>>> @@ -466,7 +466,7 @@ void mx6_dram_cfg(const struct mx6_ddr_sysinfo
>>> *sysinfo,
>>> 1 << 6 | /* BOTH_CS_PD */
>>> (tcksrx & 0x7) << 3 |
>>> (tcksre & 0x7);
>>> - mmdc0->mapsr = 0x00011006; /* ADOPT power down enabled */
>>> + mmdc0->mapsr = 0x00001006; /* ADOPT power down enabled */
>>>
>>> /* Step 11: Configure ZQ calibration: one-time and periodic 1ms
>>> */
>>> val = 0xa1390003;
>>> --
>>> 1.9.1
>>>
>>
>> Nikita,
>>
>> This makes sense per the reference manual, but does not agree with the
>> i.Mx6DQSDL DDR3 Script Aid spreadsheet
>> (https://community.freescale.com/docs/DOC-94917). I'm curious if you
>> found any other explanation of this or anything else that makes you
>> feel the spreadsheet is in error (vs the RM's).
>
>
> Nothing specific, I just don't like to use undocumented features.
> It's probably benign, but still...
>
>
>> I've asked our Freescale FAE to clarify.
>
>
> Looking forward to that...
>
> Regards,
> Nikita Kiryanov

Nikita,

Freescale confirmed its an error in their spreadsheet
(https://community.freescale.com/docs/DOC-94917#comment-12921), so:

Acked-by: Tim Harvey <tharvey@gateworks.com>

Tim