[U-Boot] [PATCH V2 11/18] arm: mx6: ddr: fix cs0_end calculation

Nikita Kiryanov
2014-08-10T17:12:53Z

Current way of calculation CS0_END field for MMDCx_MDASP register
is problematic because in most cases the user is forced to define
cs_density in an unnatural way: as value - 2, instead of value.

This breaks the abstraction provided by struct mx6_ddr_sysinfo
because the user is forced to be aware of the way the calculation
is performed.

Refactor the calculation.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
---
Changes in V2:
- No changes

arch/arm/cpu/armv7/mx6/ddr.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/arch/arm/cpu/armv7/mx6/ddr.c b/arch/arm/cpu/armv7/mx6/ddr.c
index c0fb749..d3891dc 100644
--- a/arch/arm/cpu/armv7/mx6/ddr.c
+++ b/arch/arm/cpu/armv7/mx6/ddr.c
@@ -308,9 +308,7 @@ void mx6_dram_cfg(const struct mx6_ddr_sysinfo *sysinfo,
twtr = ROUND(MAX(4 * clkper, 7500) / clkper, 1) - 1;
trcd = trp;
trtp = twtr;
- cs0_end = (4 * sysinfo->cs_density <= 120) ?
- 4 * sysinfo->cs_density + 7 :
- 127;
+ cs0_end = 4 * sysinfo->cs_density - 1;

debug("density:%d Gb (%d Gb per chip)\n",
sysinfo->cs_density, ddr3_cfg->density);
--
1.9.1