[U-Boot] Possible bug in U-Boot Exynos clock driver

[U-Boot] Possible bug in U-Boot Exynos clock driver

[Thierry Reding]

Hi,

I've been running a couple of builds for a patch that I'm working on and
I noticed the following errors happening for all Exynos boards:

	arch/arm/cpu/armv7/exynos/clock.c: In function 'clock_get_periph_rate':
	arch/arm/cpu/armv7/exynos/clock.c:263:47: warning: array subscript is above array bounds [-Warray-bounds]
	  struct clk_bit_info *bit_info = &clk_bit_info[peripheral];
                                               ^
The problem seems to be that clock_get_periph_rate() is called with the
PERIPH_ID_PWM0 parameter in get_pwm_clk(). clock_get_periph_rate() in
turn calls exynos5_get_periph_rate() which uses the peripheral parameter
to index into the clk_bit_info array. However, PERIPH_ID_PWM0 seems to
evaluate to 132, but the clk_bit_info contains only 29 elements.

I don't know how to properly fix this, but perhaps the clk_bit_info
table needs to be extended to cover other clocks?

Thierry
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