From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Date: Mon, 25 Aug 2014 21:51:18 +0200 Subject: [U-Boot] [PATCH v7 1/2] net: fec_mxc: Adjust RX DMA alignment for mx6solox In-Reply-To: <1408984457-10272-1-git-send-email-fabio.estevam@freescale.com> References: <1408984457-10272-1-git-send-email-fabio.estevam@freescale.com> Message-ID: <201408252151.18889.marex@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Monday, August 25, 2014 at 06:34:16 PM, Fabio Estevam wrote: > mx6solox has a requirement for 64 bytes alignment for RX DMA transfer. > Other SoCs work with the standard 32 bytes alignment. > > Adjust it accordingly by using 64 bytes aligment in the FEC RX DMA buffers, > which addresses the needs from mx6solox and also works for the other SoCs. > > Signed-off-by: Fabio Estevam Acked-by: Marek Vasut Best regards, Marek Vasut