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From: Marek Vasut <marex@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [WIP PATCH 1/4 v2] spi: Add Cadence QSPI driver used by SoCFPGA
Date: Tue, 23 Sep 2014 22:08:21 +0200	[thread overview]
Message-ID: <201409232208.22094.marex@denx.de> (raw)
In-Reply-To: <20140923200558.GA14099@amd>

On Tuesday, September 23, 2014 at 10:05:58 PM, Pavel Machek wrote:
> Hi!
> 
> > +++ b/drivers/spi/cadence_qspi.c
> > @@ -0,0 +1,355 @@
> > +/*
> > + * Copyright (C) 2012
> > + * Altera Corporation <www.altera.com>
> > + *
> > + * See file CREDITS for list of people who contributed to this
> > + * project.
> > + *
> > + * This program is free software; you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License as published by
> > + * the Free Software Foundation; either version 2 of the License, or
> > + * (at your option) any later version.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> > + * GNU General Public License for more details.
> > + *
> > + * You should have received a copy of the GNU General Public License
> > + * along with this program; if not, write to the Free Software
> > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> > + * MA  02111-1307  USA
> > + */
> 
> SPDX headers?
> 
> > +#define CQSPI_WRITEL		writel
> > +#define CQSPI_READL		readl
> 
> It would be nice to get rid of these.
> 
> > +/* Write to SRAM FIFO with polling SRAM fill level. */
> > +static int qpsi_write_sram_fifo_push(const void *reg_base, void
> > *dest_addr, +				const void *src_addr, unsigned 
int num_bytes)
> > +{
> > +	unsigned int retry = CQSPI_REG_RETRY;
> > +	unsigned int sram_level;
> > +	unsigned int wr_bytes;
> > +	unsigned char* src = (unsigned char *)src_addr;
> 
> "char *src", afaict.

uint8_t ...

Best regards,
Marek Vasut

  reply	other threads:[~2014-09-23 20:08 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-23 14:08 [U-Boot] [WIP PATCH 0/2 v2] arm: socfpga: Add Cadence QSPI support Stefan Roese
2014-09-23 14:08 ` [U-Boot] [WIP PATCH 1/4 v2] spi: Add Cadence QSPI driver used by SoCFPGA Stefan Roese
2014-09-23 20:05   ` Pavel Machek
2014-09-23 20:08     ` Marek Vasut [this message]
2014-09-23 14:08 ` [U-Boot] [WIP PATCH 2/4 v2] arm: socfpga: Add Cadence QSPI support to config header Stefan Roese
2014-09-23 14:08 ` [U-Boot] [WIP PATCH 3/4 v2] arm: socfpga: Don't define CONFIG_SPI_FLASH_QUAD Stefan Roese
2014-09-23 14:08 ` [U-Boot] [WIP PATCH 4/4 v2] arm: socfpga: Don't enable dcache (because of cadence SPI driver problem) Stefan Roese
2014-09-23 14:32   ` Marek Vasut
2014-09-23 15:20     ` Stefan Roese
2014-09-23 15:41       ` Michael Trimarchi
2014-09-25 15:25 ` [U-Boot] [WIP PATCH 0/2 v2] arm: socfpga: Add Cadence QSPI support Marek Vasut

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