From: Marek Vasut <marex@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [WIP PATCH 0/2 v2] arm: socfpga: Add Cadence QSPI support
Date: Thu, 25 Sep 2014 17:25:55 +0200 [thread overview]
Message-ID: <201409251725.55566.marex@denx.de> (raw)
In-Reply-To: <1411481312-9929-1-git-send-email-sr@denx.de>
On Tuesday, September 23, 2014 at 04:08:28 PM, Stefan Roese wrote:
> Hi SoCFPGA-developers!
>
> So this is my 2nd posting regarding the Candence SPI driver on SoCFPGA.
> I got it working now. But only with one quick-hack, as you can see in
> patch 4/4. Which disabled the dcache. Or more precise, doesn't enable it.
> Thanks to Michael who pointed this out.
>
> Since I really can't spend more time on this in this week, and
> Chin Liang mentioned that he might be able to help out (thanks
> again for this), I'm posting this version now for all others
> as a reference. Hopefully Chin Liang (or some other volunteer) can fix
> this cache issue in a generic way.
I will keep tracking this in my repository so it doesn't get lost. I am not sure
I will get to fixing it though.
Best regards,
Marek Vasut
prev parent reply other threads:[~2014-09-25 15:25 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-23 14:08 [U-Boot] [WIP PATCH 0/2 v2] arm: socfpga: Add Cadence QSPI support Stefan Roese
2014-09-23 14:08 ` [U-Boot] [WIP PATCH 1/4 v2] spi: Add Cadence QSPI driver used by SoCFPGA Stefan Roese
2014-09-23 20:05 ` Pavel Machek
2014-09-23 20:08 ` Marek Vasut
2014-09-23 14:08 ` [U-Boot] [WIP PATCH 2/4 v2] arm: socfpga: Add Cadence QSPI support to config header Stefan Roese
2014-09-23 14:08 ` [U-Boot] [WIP PATCH 3/4 v2] arm: socfpga: Don't define CONFIG_SPI_FLASH_QUAD Stefan Roese
2014-09-23 14:08 ` [U-Boot] [WIP PATCH 4/4 v2] arm: socfpga: Don't enable dcache (because of cadence SPI driver problem) Stefan Roese
2014-09-23 14:32 ` Marek Vasut
2014-09-23 15:20 ` Stefan Roese
2014-09-23 15:41 ` Michael Trimarchi
2014-09-25 15:25 ` Marek Vasut [this message]
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