[U-Boot] [PATCH 6/7] spi: altera: Add short note about EPCS/EPCQx1

Marek Vasut
2014-10-19T18:43:38Z

Add short documentation-alike note on how to use the Altera SPI
driver with the EPCS/EPCQx1 FPGA IP block on SoCFPGA Cyclone V.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
---
drivers/spi/altera_spi.c | 8 ++++++++
1 file changed, 8 insertions(+)

diff --git a/drivers/spi/altera_spi.c b/drivers/spi/altera_spi.c
index 3065e96..0566e4f 100644
--- a/drivers/spi/altera_spi.c
+++ b/drivers/spi/altera_spi.c
@@ -4,6 +4,14 @@
* based on bfin_spi.c
* Copyright (c) 2005-2008 Analog Devices Inc.
* Copyright (C) 2010 Thomas Chou <thomas@wytron.com.tw>
+ * Copyright (C) 2014 Marek Vasut <marex@denx.de>
+ *
+ * SoCFPGA EPCS/EPCQx1 mini howto:
+ * - Instantiate EPCS/EPCQx1 Serial flash controller in QSys and rebuild
+ * - The controller base address is the "Base" in QSys + 0x400
+ * - Set MSEL[4:0]=10010 (AS Standard)
+ * - Load the bitstream into FPGA, enable bridges
+ * - Only then will the driver work
*
* SPDX-License-Identifier: GPL-2.0+
*/
--
2.1.1