From mboxrd@z Thu Jan 1 00:00:00 1970 From: Albert ARIBAUD Date: Mon, 27 Oct 2014 00:32:25 +0100 Subject: [U-Boot] [PATCH v3 4/4] arm: interrupt_init: set sp in IRQ/FIQ modes In-Reply-To: <20141027001646.3ffb29b7@lilith> References: <1411847291-1790-1-git-send-email-savoundg@gmail.com> <1414362326-6290-1-git-send-email-savoundg@gmail.com> <1414362326-6290-5-git-send-email-savoundg@gmail.com> <20141027001646.3ffb29b7@lilith> Message-ID: <20141027003225.2b2abc0c@lilith> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Mon, 27 Oct 2014 00:16:46 +0100, Albert ARIBAUD wrote: > be preserved. The sequence should initial CPSR and only change the > mode, I and F bits. (grmbl) "... should *read the* initial CPSR and..." Apologies. Amicalement, -- Albert.