[U-Boot] [PATCH 1/5] usb: s3c-otg: Remove useless include

[U-Boot] [PATCH 1/5] usb: s3c-otg: Remove useless include

[Marek Vasut]

Remove the useless inclusion of arch/arm/gpio.h , which is completely
bogus in this driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Vince Bridgers <vbridger@altera.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Lukasz Majewski <l.majewski@samsung.com>
---
 drivers/usb/gadget/s3c_udc_otg.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/usb/gadget/s3c_udc_otg.c b/drivers/usb/gadget/s3c_udc_otg.c
index b9816df..7508b1a 100644
--- a/drivers/usb/gadget/s3c_udc_otg.c
+++ b/drivers/usb/gadget/s3c_udc_otg.c
@@ -31,7 +31,6 @@
 #include <asm/io.h>
 
 #include <asm/mach-types.h>
-#include <asm/arch/gpio.h>
 
 #include "regs-otg.h"
 #include <usb/lin_gadget_compat.h>
-- 
2.0.0

[U-Boot] [PATCH 2/5] usb: s3c-otg: Encapsulate PHY control

[Marek Vasut]

Encapsulate the Samsung PHY control and it's register accesses
into the otg_phy_init() and otg_phy_off() functions.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Vince Bridgers <vbridger@altera.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Lukasz Majewski <l.majewski@samsung.com>
---
 drivers/usb/gadget/s3c_udc_otg.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/drivers/usb/gadget/s3c_udc_otg.c b/drivers/usb/gadget/s3c_udc_otg.c
index 7508b1a..b808ddaf 100644
--- a/drivers/usb/gadget/s3c_udc_otg.c
+++ b/drivers/usb/gadget/s3c_udc_otg.c
@@ -145,8 +145,6 @@ static struct usb_ep_ops s3c_ep_ops = {
 
 void __iomem		*regs_otg;
 struct s3c_usbotg_reg *reg;
-struct s3c_usbotg_phy *phy;
-static unsigned int usb_phy_ctrl;
 
 bool dfu_usb_get_reset(void)
 {
@@ -155,6 +153,10 @@ bool dfu_usb_get_reset(void)
 
 void otg_phy_init(struct s3c_udc *dev)
 {
+	unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl;
+	struct s3c_usbotg_phy *phy =
+		(struct s3c_usbotg_phy *)dev->pdata->regs_phy;
+
 	dev->pdata->phy_control(1);
 
 	/*USB PHY0 Enable */
@@ -189,6 +191,10 @@ void otg_phy_init(struct s3c_udc *dev)
 
 void otg_phy_off(struct s3c_udc *dev)
 {
+	unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl;
+	struct s3c_usbotg_phy *phy =
+		(struct s3c_usbotg_phy *)dev->pdata->regs_phy;
+
 	/* reset controller just in case */
 	writel(PHY_SW_RST0, &phy->rstcon);
 	udelay(20);
@@ -853,9 +859,7 @@ int s3c_udc_probe(struct s3c_plat_otg_data *pdata)
 
 	dev->pdata = pdata;
 
-	phy = (struct s3c_usbotg_phy *)pdata->regs_phy;
 	reg = (struct s3c_usbotg_reg *)pdata->regs_otg;
-	usb_phy_ctrl = pdata->usb_phy_ctrl;
 
 	/* regs_otg = (void *)pdata->regs_otg; */
 
-- 
2.0.0

[U-Boot] [PATCH 2/5] usb: s3c-otg: Encapsulate PHY control

[Pavel Machek]

On Tue 2014-11-04 06:07:31, Marek Vasut wrote:
> Encapsulate the Samsung PHY control and it's register accesses

"its"

> into the otg_phy_init() and otg_phy_off() functions.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Chin Liang See <clsee@altera.com>
> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> Cc: Vince Bridgers <vbridger@altera.com>

Acked-by: Pavel Machek <pavel@denx.de>


-- 
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html

[U-Boot] [PATCH 2/5] usb: s3c-otg: Encapsulate PHY control

[Lukasz Majewski]

Hi Marek,

> Encapsulate the Samsung PHY control and it's register accesses
> into the otg_phy_init() and otg_phy_off() functions.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Chin Liang See <clsee@altera.com>
> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> Cc: Vince Bridgers <vbridger@altera.com>
> Cc: Pavel Machek <pavel@denx.de>
> Cc: Stefan Roese <sr@denx.de>
> Cc: Lukasz Majewski <l.majewski@samsung.com>
> ---
>  drivers/usb/gadget/s3c_udc_otg.c | 12 ++++++++----
>  1 file changed, 8 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/usb/gadget/s3c_udc_otg.c
> b/drivers/usb/gadget/s3c_udc_otg.c index 7508b1a..b808ddaf 100644
> --- a/drivers/usb/gadget/s3c_udc_otg.c
> +++ b/drivers/usb/gadget/s3c_udc_otg.c
> @@ -145,8 +145,6 @@ static struct usb_ep_ops s3c_ep_ops = {
>  
>  void __iomem		*regs_otg;
>  struct s3c_usbotg_reg *reg;
> -struct s3c_usbotg_phy *phy;
> -static unsigned int usb_phy_ctrl;
>  
>  bool dfu_usb_get_reset(void)
>  {
> @@ -155,6 +153,10 @@ bool dfu_usb_get_reset(void)
>  
>  void otg_phy_init(struct s3c_udc *dev)
>  {
> +	unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl;
> +	struct s3c_usbotg_phy *phy =
> +		(struct s3c_usbotg_phy *)dev->pdata->regs_phy;
> +
>  	dev->pdata->phy_control(1);
>  
>  	/*USB PHY0 Enable */
> @@ -189,6 +191,10 @@ void otg_phy_init(struct s3c_udc *dev)
>  
>  void otg_phy_off(struct s3c_udc *dev)
>  {
> +	unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl;
> +	struct s3c_usbotg_phy *phy =
> +		(struct s3c_usbotg_phy *)dev->pdata->regs_phy;
> +
>  	/* reset controller just in case */
>  	writel(PHY_SW_RST0, &phy->rstcon);
>  	udelay(20);
> @@ -853,9 +859,7 @@ int s3c_udc_probe(struct s3c_plat_otg_data *pdata)
>  
>  	dev->pdata = pdata;
>  
> -	phy = (struct s3c_usbotg_phy *)pdata->regs_phy;
>  	reg = (struct s3c_usbotg_reg *)pdata->regs_otg;
> -	usb_phy_ctrl = pdata->usb_phy_ctrl;
>  
>  	/* regs_otg = (void *)pdata->regs_otg; */
>  

Acked-by: Lukasz Majewski <l.majewski@samsung.com>

Tested-by: Lukasz Majewski <l.majewski@samsung.com>

HW: Trats2 (Exynos4412) - on top of v2014.10

-- 
Best regards,

Lukasz Majewski

Samsung R&D Institute Poland (SRPOL) | Linux Platform Group

[U-Boot] [PATCH 3/5] usb: s3c-otg: Split out PHY control

[Marek Vasut]

Split the Samsung specific PHY control into a separate file
and compile this into the S3C OTG driver only if used on a
Samsung system.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Vince Bridgers <vbridger@altera.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Lukasz Majewski <l.majewski@samsung.com>
---
 drivers/usb/gadget/Makefile          |  1 +
 drivers/usb/gadget/s3c_udc_otg.c     | 64 +----------------------
 drivers/usb/gadget/s3c_udc_otg_phy.c | 99 ++++++++++++++++++++++++++++++++++++
 include/configs/exynos4-common.h     |  1 +
 include/configs/s5p_goni.h           |  1 +
 include/configs/s5pc210_universal.h  |  1 +
 include/configs/smdkv310.h           |  1 +
 7 files changed, 106 insertions(+), 62 deletions(-)
 create mode 100644 drivers/usb/gadget/s3c_udc_otg_phy.c

diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
index 2efd5a4..70bb550 100644
--- a/drivers/usb/gadget/Makefile
+++ b/drivers/usb/gadget/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_USB_ETHER) += epautoconf.o config.o usbstring.o
 ifdef CONFIG_USB_GADGET
 obj-$(CONFIG_USB_GADGET_ATMEL_USBA) += atmel_usba_udc.o
 obj-$(CONFIG_USB_GADGET_S3C_UDC_OTG) += s3c_udc_otg.o
+obj-$(CONFIG_USB_GADGET_S3C_UDC_OTG_PHY) += s3c_udc_otg_phy.o
 obj-$(CONFIG_USB_GADGET_FOTG210) += fotg210.o
 obj-$(CONFIG_CI_UDC)	+= ci_udc.o
 obj-$(CONFIG_THOR_FUNCTION) += f_thor.o
diff --git a/drivers/usb/gadget/s3c_udc_otg.c b/drivers/usb/gadget/s3c_udc_otg.c
index b808ddaf..b910053 100644
--- a/drivers/usb/gadget/s3c_udc_otg.c
+++ b/drivers/usb/gadget/s3c_udc_otg.c
@@ -151,68 +151,8 @@ bool dfu_usb_get_reset(void)
 	return !!(readl(&reg->gintsts) & INT_RESET);
 }
 
-void otg_phy_init(struct s3c_udc *dev)
-{
-	unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl;
-	struct s3c_usbotg_phy *phy =
-		(struct s3c_usbotg_phy *)dev->pdata->regs_phy;
-
-	dev->pdata->phy_control(1);
-
-	/*USB PHY0 Enable */
-	printf("USB PHY0 Enable\n");
-
-	/* Enable PHY */
-	writel(readl(usb_phy_ctrl) | USB_PHY_CTRL_EN0, usb_phy_ctrl);
-
-	if (dev->pdata->usb_flags == PHY0_SLEEP) /* C210 Universal */
-		writel((readl(&phy->phypwr)
-			&~(PHY_0_SLEEP | OTG_DISABLE_0 | ANALOG_PWRDOWN)
-			&~FORCE_SUSPEND_0), &phy->phypwr);
-	else /* C110 GONI */
-		writel((readl(&phy->phypwr) &~(OTG_DISABLE_0 | ANALOG_PWRDOWN)
-			&~FORCE_SUSPEND_0), &phy->phypwr);
-
-	if (s5p_cpu_id == 0x4412)
-		writel((readl(&phy->phyclk) & ~(EXYNOS4X12_ID_PULLUP0 |
-			EXYNOS4X12_COMMON_ON_N0)) | EXYNOS4X12_CLK_SEL_24MHZ,
-		       &phy->phyclk); /* PLL 24Mhz */
-	else
-		writel((readl(&phy->phyclk) & ~(ID_PULLUP0 | COMMON_ON_N0)) |
-		       CLK_SEL_24MHZ, &phy->phyclk); /* PLL 24Mhz */
-
-	writel((readl(&phy->rstcon) &~(LINK_SW_RST | PHYLNK_SW_RST))
-	       | PHY_SW_RST0, &phy->rstcon);
-	udelay(10);
-	writel(readl(&phy->rstcon)
-	       &~(PHY_SW_RST0 | LINK_SW_RST | PHYLNK_SW_RST), &phy->rstcon);
-	udelay(10);
-}
-
-void otg_phy_off(struct s3c_udc *dev)
-{
-	unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl;
-	struct s3c_usbotg_phy *phy =
-		(struct s3c_usbotg_phy *)dev->pdata->regs_phy;
-
-	/* reset controller just in case */
-	writel(PHY_SW_RST0, &phy->rstcon);
-	udelay(20);
-	writel(readl(&phy->phypwr) &~PHY_SW_RST0, &phy->rstcon);
-	udelay(20);
-
-	writel(readl(&phy->phypwr) | OTG_DISABLE_0 | ANALOG_PWRDOWN
-	       | FORCE_SUSPEND_0, &phy->phypwr);
-
-	writel(readl(usb_phy_ctrl) &~USB_PHY_CTRL_EN0, usb_phy_ctrl);
-
-	writel((readl(&phy->phyclk) & ~(ID_PULLUP0 | COMMON_ON_N0)),
-	      &phy->phyclk);
-
-	udelay(10000);
-
-	dev->pdata->phy_control(0);
-}
+__weak void otg_phy_init(struct s3c_udc *dev) {}
+__weak void otg_phy_off(struct s3c_udc *dev) {}
 
 /***********************************************************/
 
diff --git a/drivers/usb/gadget/s3c_udc_otg_phy.c b/drivers/usb/gadget/s3c_udc_otg_phy.c
new file mode 100644
index 0000000..055fe86
--- /dev/null
+++ b/drivers/usb/gadget/s3c_udc_otg_phy.c
@@ -0,0 +1,99 @@
+/*
+ * drivers/usb/gadget/s3c_udc_otg.c
+ * Samsung S3C on-chip full/high speed USB OTG 2.0 device controllers
+ *
+ * Copyright (C) 2008 for Samsung Electronics
+ *
+ * BSP Support for Samsung's UDC driver
+ * available at:
+ * git://git.kernel.org/pub/scm/linux/kernel/git/kki_ap/linux-2.6-samsung.git
+ *
+ * State machine bugfixes:
+ * Marek Szyprowski <m.szyprowski@samsung.com>
+ *
+ * Ported to u-boot:
+ * Marek Szyprowski <m.szyprowski@samsung.com>
+ * Lukasz Majewski <l.majewski@samsumg.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/errno.h>
+#include <linux/list.h>
+#include <malloc.h>
+
+#include <linux/usb/ch9.h>
+#include <linux/usb/gadget.h>
+
+#include <asm/byteorder.h>
+#include <asm/unaligned.h>
+#include <asm/io.h>
+
+#include <asm/mach-types.h>
+
+#include "regs-otg.h"
+#include <usb/lin_gadget_compat.h>
+
+void otg_phy_init(struct s3c_udc *dev)
+{
+	unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl;
+	struct s3c_usbotg_phy *phy =
+		(struct s3c_usbotg_phy *)dev->pdata->regs_phy;
+
+	dev->pdata->phy_control(1);
+
+	/*USB PHY0 Enable */
+	printf("USB PHY0 Enable\n");
+
+	/* Enable PHY */
+	writel(readl(usb_phy_ctrl) | USB_PHY_CTRL_EN0, usb_phy_ctrl);
+
+	if (dev->pdata->usb_flags == PHY0_SLEEP) /* C210 Universal */
+		writel((readl(&phy->phypwr)
+			&~(PHY_0_SLEEP | OTG_DISABLE_0 | ANALOG_PWRDOWN)
+			&~FORCE_SUSPEND_0), &phy->phypwr);
+	else /* C110 GONI */
+		writel((readl(&phy->phypwr) &~(OTG_DISABLE_0 | ANALOG_PWRDOWN)
+			&~FORCE_SUSPEND_0), &phy->phypwr);
+
+	if (s5p_cpu_id == 0x4412)
+		writel((readl(&phy->phyclk) & ~(EXYNOS4X12_ID_PULLUP0 |
+			EXYNOS4X12_COMMON_ON_N0)) | EXYNOS4X12_CLK_SEL_24MHZ,
+		       &phy->phyclk); /* PLL 24Mhz */
+	else
+		writel((readl(&phy->phyclk) & ~(ID_PULLUP0 | COMMON_ON_N0)) |
+		       CLK_SEL_24MHZ, &phy->phyclk); /* PLL 24Mhz */
+
+	writel((readl(&phy->rstcon) &~(LINK_SW_RST | PHYLNK_SW_RST))
+	       | PHY_SW_RST0, &phy->rstcon);
+	udelay(10);
+	writel(readl(&phy->rstcon)
+	       &~(PHY_SW_RST0 | LINK_SW_RST | PHYLNK_SW_RST), &phy->rstcon);
+	udelay(10);
+}
+
+void otg_phy_off(struct s3c_udc *dev)
+{
+	unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl;
+	struct s3c_usbotg_phy *phy =
+		(struct s3c_usbotg_phy *)dev->pdata->regs_phy;
+
+	/* reset controller just in case */
+	writel(PHY_SW_RST0, &phy->rstcon);
+	udelay(20);
+	writel(readl(&phy->phypwr) &~PHY_SW_RST0, &phy->rstcon);
+	udelay(20);
+
+	writel(readl(&phy->phypwr) | OTG_DISABLE_0 | ANALOG_PWRDOWN
+	       | FORCE_SUSPEND_0, &phy->phypwr);
+
+	writel(readl(usb_phy_ctrl) &~USB_PHY_CTRL_EN0, usb_phy_ctrl);
+
+	writel((readl(&phy->phyclk) & ~(ID_PULLUP0 | COMMON_ON_N0)),
+	      &phy->phyclk);
+
+	udelay(10000);
+
+	dev->pdata->phy_control(0);
+}
diff --git a/include/configs/exynos4-common.h b/include/configs/exynos4-common.h
index 89ba14e..41631c7 100644
--- a/include/configs/exynos4-common.h
+++ b/include/configs/exynos4-common.h
@@ -59,6 +59,7 @@
 
 #define CONFIG_USB_GADGET
 #define CONFIG_USB_GADGET_S3C_UDC_OTG
+#define CONFIG_USB_GADGET_S3C_UDC_OTG_PHY
 #define CONFIG_USB_GADGET_DUALSPEED
 #define CONFIG_USB_GADGET_VBUS_DRAW	2
 
diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h
index 3633a35..dfa2e07 100644
--- a/include/configs/s5p_goni.h
+++ b/include/configs/s5p_goni.h
@@ -281,6 +281,7 @@
 #define CONFIG_SYS_MAX_I2C_BUS	7
 #define CONFIG_USB_GADGET
 #define CONFIG_USB_GADGET_S3C_UDC_OTG
+#define CONFIG_USB_GADGET_S3C_UDC_OTG_PHY
 #define CONFIG_USB_GADGET_DUALSPEED
 #define CONFIG_USB_GADGET_VBUS_DRAW 2
 #define CONFIG_CMD_USB_MASS_STORAGE
diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h
index 4b30d148..e7bace4 100644
--- a/include/configs/s5pc210_universal.h
+++ b/include/configs/s5pc210_universal.h
@@ -181,6 +181,7 @@
 
 #define CONFIG_USB_GADGET
 #define CONFIG_USB_GADGET_S3C_UDC_OTG
+#define CONFIG_USB_GADGET_S3C_UDC_OTG_PHY
 #define CONFIG_USB_GADGET_DUALSPEED
 
 /*
diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h
index a2469eb..655025c 100644
--- a/include/configs/smdkv310.h
+++ b/include/configs/smdkv310.h
@@ -14,6 +14,7 @@
 #undef CONFIG_BOARD_COMMON
 #undef CONFIG_USB_GADGET
 #undef CONFIG_USB_GADGET_S3C_UDC_OTG
+#undef CONFIG_USB_GADGET_S3C_UDC_OTG_PHY
 #undef CONFIG_CMD_USB_MASS_STORAGE
 #undef CONFIG_REVISION_TAG
 #undef CONFIG_CMD_THOR_DOWNLOAD
-- 
2.0.0

[U-Boot] [PATCH 3/5] usb: s3c-otg: Split out PHY control

[Pavel Machek]

On Tue 2014-11-04 06:07:32, Marek Vasut wrote:
> Split the Samsung specific PHY control into a separate file
> and compile this into the S3C OTG driver only if used on a
> Samsung system.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Chin Liang See <clsee@altera.com>
> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> Cc: Vince Bridgers <vbridger@altera.com>

Acked-by: Pavel Machek <pavel@denx.de>

I know you are just moving the code, but...

> +void otg_phy_init(struct s3c_udc *dev)
> +{
> +	unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl;
> +	struct s3c_usbotg_phy *phy =
> +		(struct s3c_usbotg_phy *)dev->pdata->regs_phy;
> +
> +	dev->pdata->phy_control(1);
> +
> +	/*USB PHY0 Enable */

Wrong comment style.

> +	printf("USB PHY0 Enable\n");
> +
> +	/* Enable PHY */
> +	writel(readl(usb_phy_ctrl) | USB_PHY_CTRL_EN0, usb_phy_ctrl);

We have helpers for setting/clearing bits, right?


-- 
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html

[U-Boot] [PATCH 3/5] usb: s3c-otg: Split out PHY control

[Marek Vasut]

On Tuesday, November 04, 2014 at 08:34:21 PM, Pavel Machek wrote:
> On Tue 2014-11-04 06:07:32, Marek Vasut wrote:
> > Split the Samsung specific PHY control into a separate file
> > and compile this into the S3C OTG driver only if used on a
> > Samsung system.
> > 
> > Signed-off-by: Marek Vasut <marex@denx.de>
> > Cc: Chin Liang See <clsee@altera.com>
> > Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> > Cc: Vince Bridgers <vbridger@altera.com>
> 
> Acked-by: Pavel Machek <pavel@denx.de>
> 
> I know you are just moving the code, but...
> 
> > +void otg_phy_init(struct s3c_udc *dev)
> > +{
> > +	unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl;
> > +	struct s3c_usbotg_phy *phy =
> > +		(struct s3c_usbotg_phy *)dev->pdata->regs_phy;
> > +
> > +	dev->pdata->phy_control(1);
> > +
> > +	/*USB PHY0 Enable */
> 
> Wrong comment style.

I'll fix this one.

> > +	printf("USB PHY0 Enable\n");
> > +
> > +	/* Enable PHY */
> > +	writel(readl(usb_phy_ctrl) | USB_PHY_CTRL_EN0, usb_phy_ctrl);
> 
> We have helpers for setting/clearing bits, right?

Yes we do, Lukasz ... ? :)

Best regards,
Marek Vasut

[U-Boot] [PATCH 3/5] usb: s3c-otg: Split out PHY control

[Lukasz Majewski]

Hi Marek,

> On Tuesday, November 04, 2014 at 08:34:21 PM, Pavel Machek wrote:
> > On Tue 2014-11-04 06:07:32, Marek Vasut wrote:
> > > Split the Samsung specific PHY control into a separate file
> > > and compile this into the S3C OTG driver only if used on a
> > > Samsung system.
> > > 
> > > Signed-off-by: Marek Vasut <marex@denx.de>
> > > Cc: Chin Liang See <clsee@altera.com>
> > > Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> > > Cc: Vince Bridgers <vbridger@altera.com>
> > 
> > Acked-by: Pavel Machek <pavel@denx.de>
> > 
> > I know you are just moving the code, but...
> > 
> > > +void otg_phy_init(struct s3c_udc *dev)
> > > +{
> > > +	unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl;
> > > +	struct s3c_usbotg_phy *phy =
> > > +		(struct s3c_usbotg_phy *)dev->pdata->regs_phy;
> > > +
> > > +	dev->pdata->phy_control(1);
> > > +
> > > +	/*USB PHY0 Enable */
> > 
> > Wrong comment style.
> 
> I'll fix this one.
> 
> > > +	printf("USB PHY0 Enable\n");
> > > +
> > > +	/* Enable PHY */
> > > +	writel(readl(usb_phy_ctrl) | USB_PHY_CTRL_EN0,
> > > usb_phy_ctrl);
> > 
> > We have helpers for setting/clearing bits, right?
> 
> Yes we do, Lukasz ... ? :)

If you think about set_bit()/ clear_bit() functions
from ./arch/arm/include/asm/bitops.h, then I don't mind to replace
current code with them.

Feel free to use them for next version of the patch.

> 
> Best regards,
> Marek Vasut



-- 
Best regards,

Lukasz Majewski

Samsung R&D Institute Poland (SRPOL) | Linux Platform Group

[U-Boot] [PATCH 3/5] usb: s3c-otg: Split out PHY control

[Marek Vasut]

On Friday, November 07, 2014 at 09:59:25 AM, Lukasz Majewski wrote:
> Hi Marek,
> 
> > On Tuesday, November 04, 2014 at 08:34:21 PM, Pavel Machek wrote:
> > > On Tue 2014-11-04 06:07:32, Marek Vasut wrote:
> > > > Split the Samsung specific PHY control into a separate file
> > > > and compile this into the S3C OTG driver only if used on a
> > > > Samsung system.
> > > > 
> > > > Signed-off-by: Marek Vasut <marex@denx.de>
> > > > Cc: Chin Liang See <clsee@altera.com>
> > > > Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> > > > Cc: Vince Bridgers <vbridger@altera.com>
> > > 
> > > Acked-by: Pavel Machek <pavel@denx.de>
> > > 
> > > I know you are just moving the code, but...
> > > 
> > > > +void otg_phy_init(struct s3c_udc *dev)
> > > > +{
> > > > +	unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl;
> > > > +	struct s3c_usbotg_phy *phy =
> > > > +		(struct s3c_usbotg_phy *)dev->pdata->regs_phy;
> > > > +
> > > > +	dev->pdata->phy_control(1);
> > > > +
> > > > +	/*USB PHY0 Enable */
> > > 
> > > Wrong comment style.
> > 
> > I'll fix this one.
> > 
> > > > +	printf("USB PHY0 Enable\n");
> > > > +
> > > > +	/* Enable PHY */
> > > > +	writel(readl(usb_phy_ctrl) | USB_PHY_CTRL_EN0,
> > > > usb_phy_ctrl);
> > > 
> > > We have helpers for setting/clearing bits, right?
> > 
> > Yes we do, Lukasz ... ? :)
> 
> If you think about set_bit()/ clear_bit() functions
> from ./arch/arm/include/asm/bitops.h, then I don't mind to replace
> current code with them.
> 
> Feel free to use them for next version of the patch.

Pavel meant clrsetbits_le32() and friends . Personally, I would leave
that to subsequent set :)

Best regards,
Marek Vasut

[U-Boot] [PATCH 3/5] usb: s3c-otg: Split out PHY control

[Lukasz Majewski]

Hi Marek,

> On Friday, November 07, 2014 at 09:59:25 AM, Lukasz Majewski wrote:
> > Hi Marek,
> > 
> > > On Tuesday, November 04, 2014 at 08:34:21 PM, Pavel Machek wrote:
> > > > On Tue 2014-11-04 06:07:32, Marek Vasut wrote:
> > > > > Split the Samsung specific PHY control into a separate file
> > > > > and compile this into the S3C OTG driver only if used on a
> > > > > Samsung system.
> > > > > 
> > > > > Signed-off-by: Marek Vasut <marex@denx.de>
> > > > > Cc: Chin Liang See <clsee@altera.com>
> > > > > Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> > > > > Cc: Vince Bridgers <vbridger@altera.com>
> > > > 
> > > > Acked-by: Pavel Machek <pavel@denx.de>
> > > > 
> > > > I know you are just moving the code, but...
> > > > 
> > > > > +void otg_phy_init(struct s3c_udc *dev)
> > > > > +{
> > > > > +	unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl;
> > > > > +	struct s3c_usbotg_phy *phy =
> > > > > +		(struct s3c_usbotg_phy
> > > > > *)dev->pdata->regs_phy; +
> > > > > +	dev->pdata->phy_control(1);
> > > > > +
> > > > > +	/*USB PHY0 Enable */
> > > > 
> > > > Wrong comment style.
> > > 
> > > I'll fix this one.
> > > 
> > > > > +	printf("USB PHY0 Enable\n");
> > > > > +
> > > > > +	/* Enable PHY */
> > > > > +	writel(readl(usb_phy_ctrl) | USB_PHY_CTRL_EN0,
> > > > > usb_phy_ctrl);
> > > > 
> > > > We have helpers for setting/clearing bits, right?
> > > 
> > > Yes we do, Lukasz ... ? :)
> > 
> > If you think about set_bit()/ clear_bit() functions
> > from ./arch/arm/include/asm/bitops.h, then I don't mind to replace
> > current code with them.
> > 
> > Feel free to use them for next version of the patch.
> 
> Pavel meant clrsetbits_le32() and friends . Personally, I would leave
> that to subsequent set :)

This is up to you. I just would like to avoid changing too many things
at once.

> 
> Best regards,
> Marek Vasut



-- 
Best regards,

Lukasz Majewski

Samsung R&D Institute Poland (SRPOL) | Linux Platform Group

[U-Boot] [PATCH 3/5] usb: s3c-otg: Split out PHY control

[Marek Vasut]

On Friday, November 07, 2014 at 11:08:44 AM, Lukasz Majewski wrote:
> Hi Marek,
> 
> > On Friday, November 07, 2014 at 09:59:25 AM, Lukasz Majewski wrote:
> > > Hi Marek,
> > > 
> > > > On Tuesday, November 04, 2014 at 08:34:21 PM, Pavel Machek wrote:
> > > > > On Tue 2014-11-04 06:07:32, Marek Vasut wrote:
> > > > > > Split the Samsung specific PHY control into a separate file
> > > > > > and compile this into the S3C OTG driver only if used on a
> > > > > > Samsung system.
> > > > > > 
> > > > > > Signed-off-by: Marek Vasut <marex@denx.de>
> > > > > > Cc: Chin Liang See <clsee@altera.com>
> > > > > > Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> > > > > > Cc: Vince Bridgers <vbridger@altera.com>
> > > > > 
> > > > > Acked-by: Pavel Machek <pavel@denx.de>
> > > > > 
> > > > > I know you are just moving the code, but...
> > > > > 
> > > > > > +void otg_phy_init(struct s3c_udc *dev)
> > > > > > +{
> > > > > > +	unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl;
> > > > > > +	struct s3c_usbotg_phy *phy =
> > > > > > +		(struct s3c_usbotg_phy
> > > > > > *)dev->pdata->regs_phy; +
> > > > > > +	dev->pdata->phy_control(1);
> > > > > > +
> > > > > > +	/*USB PHY0 Enable */
> > > > > 
> > > > > Wrong comment style.
> > > > 
> > > > I'll fix this one.
> > > > 
> > > > > > +	printf("USB PHY0 Enable\n");
> > > > > > +
> > > > > > +	/* Enable PHY */
> > > > > > +	writel(readl(usb_phy_ctrl) | USB_PHY_CTRL_EN0,
> > > > > > usb_phy_ctrl);
> > > > > 
> > > > > We have helpers for setting/clearing bits, right?
> > > > 
> > > > Yes we do, Lukasz ... ? :)
> > > 
> > > If you think about set_bit()/ clear_bit() functions
> > > from ./arch/arm/include/asm/bitops.h, then I don't mind to replace
> > > current code with them.
> > > 
> > > Feel free to use them for next version of the patch.
> > 
> > Pavel meant clrsetbits_le32() and friends . Personally, I would leave
> > that to subsequent set :)
> 
> This is up to you. I just would like to avoid changing too many things
> at once.

Definitelly. Did adding the missing include fix the issues with this patch ?

Best regards,
Marek Vasut

[U-Boot] [PATCH 3/5] usb: s3c-otg: Split out PHY control

[Lukasz Majewski]

Hi Marek,

> On Friday, November 07, 2014 at 11:08:44 AM, Lukasz Majewski wrote:
> > Hi Marek,
> > 
> > > On Friday, November 07, 2014 at 09:59:25 AM, Lukasz Majewski
> > > wrote:
> > > > Hi Marek,
> > > > 
> > > > > On Tuesday, November 04, 2014 at 08:34:21 PM, Pavel Machek
> > > > > wrote:
> > > > > > On Tue 2014-11-04 06:07:32, Marek Vasut wrote:
> > > > > > > Split the Samsung specific PHY control into a separate
> > > > > > > file and compile this into the S3C OTG driver only if
> > > > > > > used on a Samsung system.
> > > > > > > 
> > > > > > > Signed-off-by: Marek Vasut <marex@denx.de>
> > > > > > > Cc: Chin Liang See <clsee@altera.com>
> > > > > > > Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> > > > > > > Cc: Vince Bridgers <vbridger@altera.com>
> > > > > > 
> > > > > > Acked-by: Pavel Machek <pavel@denx.de>
> > > > > > 
> > > > > > I know you are just moving the code, but...
> > > > > > 
> > > > > > > +void otg_phy_init(struct s3c_udc *dev)
> > > > > > > +{
> > > > > > > +	unsigned int usb_phy_ctrl =
> > > > > > > dev->pdata->usb_phy_ctrl;
> > > > > > > +	struct s3c_usbotg_phy *phy =
> > > > > > > +		(struct s3c_usbotg_phy
> > > > > > > *)dev->pdata->regs_phy; +
> > > > > > > +	dev->pdata->phy_control(1);
> > > > > > > +
> > > > > > > +	/*USB PHY0 Enable */
> > > > > > 
> > > > > > Wrong comment style.
> > > > > 
> > > > > I'll fix this one.
> > > > > 
> > > > > > > +	printf("USB PHY0 Enable\n");
> > > > > > > +
> > > > > > > +	/* Enable PHY */
> > > > > > > +	writel(readl(usb_phy_ctrl) | USB_PHY_CTRL_EN0,
> > > > > > > usb_phy_ctrl);
> > > > > > 
> > > > > > We have helpers for setting/clearing bits, right?
> > > > > 
> > > > > Yes we do, Lukasz ... ? :)
> > > > 
> > > > If you think about set_bit()/ clear_bit() functions
> > > > from ./arch/arm/include/asm/bitops.h, then I don't mind to
> > > > replace current code with them.
> > > > 
> > > > Feel free to use them for next version of the patch.
> > > 
> > > Pavel meant clrsetbits_le32() and friends . Personally, I would
> > > leave that to subsequent set :)
> > 
> > This is up to you. I just would like to avoid changing too many
> > things at once.
> 
> Definitelly. Did adding the missing include fix the issues with this
> patch ?
> 

I've took the topic/s3c-otg from u-boot-usb repo.

Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>

Test HW: Exynos4412 - Trats2.


> Best regards,
> Marek Vasut



-- 
Best regards,

Lukasz Majewski

Samsung R&D Institute Poland (SRPOL) | Linux Platform Group

[U-Boot] [PATCH 3/5] usb: s3c-otg: Split out PHY control

[Marek Vasut]

On Friday, November 07, 2014 at 03:23:42 PM, Lukasz Majewski wrote:
> Hi Marek,
> 
> > On Friday, November 07, 2014 at 11:08:44 AM, Lukasz Majewski wrote:
> > > Hi Marek,
> > > 
> > > > On Friday, November 07, 2014 at 09:59:25 AM, Lukasz Majewski
> > > > 
> > > > wrote:
> > > > > Hi Marek,
> > > > > 
> > > > > > On Tuesday, November 04, 2014 at 08:34:21 PM, Pavel Machek
> > > > > > 
> > > > > > wrote:
> > > > > > > On Tue 2014-11-04 06:07:32, Marek Vasut wrote:
> > > > > > > > Split the Samsung specific PHY control into a separate
> > > > > > > > file and compile this into the S3C OTG driver only if
> > > > > > > > used on a Samsung system.
> > > > > > > > 
> > > > > > > > Signed-off-by: Marek Vasut <marex@denx.de>
> > > > > > > > Cc: Chin Liang See <clsee@altera.com>
> > > > > > > > Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> > > > > > > > Cc: Vince Bridgers <vbridger@altera.com>
> > > > > > > 
> > > > > > > Acked-by: Pavel Machek <pavel@denx.de>
> > > > > > > 
> > > > > > > I know you are just moving the code, but...
> > > > > > > 
> > > > > > > > +void otg_phy_init(struct s3c_udc *dev)
> > > > > > > > +{
> > > > > > > > +	unsigned int usb_phy_ctrl =
> > > > > > > > dev->pdata->usb_phy_ctrl;
> > > > > > > > +	struct s3c_usbotg_phy *phy =
> > > > > > > > +		(struct s3c_usbotg_phy
> > > > > > > > *)dev->pdata->regs_phy; +
> > > > > > > > +	dev->pdata->phy_control(1);
> > > > > > > > +
> > > > > > > > +	/*USB PHY0 Enable */
> > > > > > > 
> > > > > > > Wrong comment style.
> > > > > > 
> > > > > > I'll fix this one.
> > > > > > 
> > > > > > > > +	printf("USB PHY0 Enable\n");
> > > > > > > > +
> > > > > > > > +	/* Enable PHY */
> > > > > > > > +	writel(readl(usb_phy_ctrl) | USB_PHY_CTRL_EN0,
> > > > > > > > usb_phy_ctrl);
> > > > > > > 
> > > > > > > We have helpers for setting/clearing bits, right?
> > > > > > 
> > > > > > Yes we do, Lukasz ... ? :)
> > > > > 
> > > > > If you think about set_bit()/ clear_bit() functions
> > > > > from ./arch/arm/include/asm/bitops.h, then I don't mind to
> > > > > replace current code with them.
> > > > > 
> > > > > Feel free to use them for next version of the patch.
> > > > 
> > > > Pavel meant clrsetbits_le32() and friends . Personally, I would
> > > > leave that to subsequent set :)
> > > 
> > > This is up to you. I just would like to avoid changing too many
> > > things at once.
> > 
> > Definitelly. Did adding the missing include fix the issues with this
> > patch ?
> 
> I've took the topic/s3c-otg from u-boot-usb repo.
> 
> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
> Tested-by: Lukasz Majewski <l.majewski@samsung.com>

Thanks, I'll queue that up for master then.

[U-Boot] [PATCH 3/5] usb: s3c-otg: Split out PHY control

[Lukasz Majewski]

Hi Marek,

> Split the Samsung specific PHY control into a separate file
> and compile this into the S3C OTG driver only if used on a
> Samsung system.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Chin Liang See <clsee@altera.com>
> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> Cc: Vince Bridgers <vbridger@altera.com>
> Cc: Pavel Machek <pavel@denx.de>
> Cc: Stefan Roese <sr@denx.de>
> Cc: Lukasz Majewski <l.majewski@samsung.com>
> ---
>  drivers/usb/gadget/Makefile          |  1 +
>  drivers/usb/gadget/s3c_udc_otg.c     | 64 +----------------------
>  drivers/usb/gadget/s3c_udc_otg_phy.c | 99
> ++++++++++++++++++++++++++++++++++++
> include/configs/exynos4-common.h     |  1 +
> include/configs/s5p_goni.h           |  1 +
> include/configs/s5pc210_universal.h  |  1 +
> include/configs/smdkv310.h           |  1 + 7 files changed, 106
> insertions(+), 62 deletions(-) create mode 100644
> drivers/usb/gadget/s3c_udc_otg_phy.c
> 
> diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
> index 2efd5a4..70bb550 100644
> --- a/drivers/usb/gadget/Makefile
> +++ b/drivers/usb/gadget/Makefile
> @@ -12,6 +12,7 @@ obj-$(CONFIG_USB_ETHER) += epautoconf.o config.o
> usbstring.o ifdef CONFIG_USB_GADGET
>  obj-$(CONFIG_USB_GADGET_ATMEL_USBA) += atmel_usba_udc.o
>  obj-$(CONFIG_USB_GADGET_S3C_UDC_OTG) += s3c_udc_otg.o
> +obj-$(CONFIG_USB_GADGET_S3C_UDC_OTG_PHY) += s3c_udc_otg_phy.o
>  obj-$(CONFIG_USB_GADGET_FOTG210) += fotg210.o
>  obj-$(CONFIG_CI_UDC)	+= ci_udc.o
>  obj-$(CONFIG_THOR_FUNCTION) += f_thor.o
> diff --git a/drivers/usb/gadget/s3c_udc_otg.c
> b/drivers/usb/gadget/s3c_udc_otg.c index b808ddaf..b910053 100644
> --- a/drivers/usb/gadget/s3c_udc_otg.c
> +++ b/drivers/usb/gadget/s3c_udc_otg.c
> @@ -151,68 +151,8 @@ bool dfu_usb_get_reset(void)
>  	return !!(readl(&reg->gintsts) & INT_RESET);
>  }
>  
> -void otg_phy_init(struct s3c_udc *dev)
> -{
> -	unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl;
> -	struct s3c_usbotg_phy *phy =
> -		(struct s3c_usbotg_phy *)dev->pdata->regs_phy;
> -
> -	dev->pdata->phy_control(1);
> -
> -	/*USB PHY0 Enable */
> -	printf("USB PHY0 Enable\n");
> -
> -	/* Enable PHY */
> -	writel(readl(usb_phy_ctrl) | USB_PHY_CTRL_EN0, usb_phy_ctrl);
> -
> -	if (dev->pdata->usb_flags == PHY0_SLEEP) /* C210 Universal */
> -		writel((readl(&phy->phypwr)
> -			&~(PHY_0_SLEEP | OTG_DISABLE_0 |
> ANALOG_PWRDOWN)
> -			&~FORCE_SUSPEND_0), &phy->phypwr);
> -	else /* C110 GONI */
> -		writel((readl(&phy->phypwr) &~(OTG_DISABLE_0 |
> ANALOG_PWRDOWN)
> -			&~FORCE_SUSPEND_0), &phy->phypwr);
> -
> -	if (s5p_cpu_id == 0x4412)
> -		writel((readl(&phy->phyclk) &
> ~(EXYNOS4X12_ID_PULLUP0 |
> -			EXYNOS4X12_COMMON_ON_N0)) |
> EXYNOS4X12_CLK_SEL_24MHZ,
> -		       &phy->phyclk); /* PLL 24Mhz */
> -	else
> -		writel((readl(&phy->phyclk) & ~(ID_PULLUP0 |
> COMMON_ON_N0)) |
> -		       CLK_SEL_24MHZ, &phy->phyclk); /* PLL 24Mhz */
> -
> -	writel((readl(&phy->rstcon) &~(LINK_SW_RST | PHYLNK_SW_RST))
> -	       | PHY_SW_RST0, &phy->rstcon);
> -	udelay(10);
> -	writel(readl(&phy->rstcon)
> -	       &~(PHY_SW_RST0 | LINK_SW_RST | PHYLNK_SW_RST),
> &phy->rstcon);
> -	udelay(10);
> -}
> -
> -void otg_phy_off(struct s3c_udc *dev)
> -{
> -	unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl;
> -	struct s3c_usbotg_phy *phy =
> -		(struct s3c_usbotg_phy *)dev->pdata->regs_phy;
> -
> -	/* reset controller just in case */
> -	writel(PHY_SW_RST0, &phy->rstcon);
> -	udelay(20);
> -	writel(readl(&phy->phypwr) &~PHY_SW_RST0, &phy->rstcon);
> -	udelay(20);
> -
> -	writel(readl(&phy->phypwr) | OTG_DISABLE_0 | ANALOG_PWRDOWN
> -	       | FORCE_SUSPEND_0, &phy->phypwr);
> -
> -	writel(readl(usb_phy_ctrl) &~USB_PHY_CTRL_EN0, usb_phy_ctrl);
> -
> -	writel((readl(&phy->phyclk) & ~(ID_PULLUP0 | COMMON_ON_N0)),
> -	      &phy->phyclk);
> -
> -	udelay(10000);
> -
> -	dev->pdata->phy_control(0);
> -}
> +__weak void otg_phy_init(struct s3c_udc *dev) {}
> +__weak void otg_phy_off(struct s3c_udc *dev) {}
>  
>  /***********************************************************/
>  
> diff --git a/drivers/usb/gadget/s3c_udc_otg_phy.c
> b/drivers/usb/gadget/s3c_udc_otg_phy.c new file mode 100644
> index 0000000..055fe86
> --- /dev/null
> +++ b/drivers/usb/gadget/s3c_udc_otg_phy.c
> @@ -0,0 +1,99 @@
> +/*
> + * drivers/usb/gadget/s3c_udc_otg.c
> + * Samsung S3C on-chip full/high speed USB OTG 2.0 device controllers
> + *
> + * Copyright (C) 2008 for Samsung Electronics
> + *
> + * BSP Support for Samsung's UDC driver
> + * available at:
> + *
> git://git.kernel.org/pub/scm/linux/kernel/git/kki_ap/linux-2.6-samsung.git
> + *
> + * State machine bugfixes:
> + * Marek Szyprowski <m.szyprowski@samsung.com>
> + *
> + * Ported to u-boot:
> + * Marek Szyprowski <m.szyprowski@samsung.com>
> + * Lukasz Majewski <l.majewski@samsumg.com>
> + *
> + * SPDX-License-Identifier:	GPL-2.0+
> + */
> +
> +#include <common.h>
> +#include <asm/errno.h>
> +#include <linux/list.h>
> +#include <malloc.h>
> +
> +#include <linux/usb/ch9.h>
> +#include <linux/usb/gadget.h>
> +
> +#include <asm/byteorder.h>
> +#include <asm/unaligned.h>
> +#include <asm/io.h>
> +
> +#include <asm/mach-types.h>
> +
> +#include "regs-otg.h"
> +#include <usb/lin_gadget_compat.h>
> +
> +void otg_phy_init(struct s3c_udc *dev)
> +{
> +	unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl;
> +	struct s3c_usbotg_phy *phy =
> +		(struct s3c_usbotg_phy *)dev->pdata->regs_phy;
> +
> +	dev->pdata->phy_control(1);
> +
> +	/*USB PHY0 Enable */
> +	printf("USB PHY0 Enable\n");
> +
> +	/* Enable PHY */
> +	writel(readl(usb_phy_ctrl) | USB_PHY_CTRL_EN0, usb_phy_ctrl);
> +
> +	if (dev->pdata->usb_flags == PHY0_SLEEP) /* C210 Universal */
> +		writel((readl(&phy->phypwr)
> +			&~(PHY_0_SLEEP | OTG_DISABLE_0 |
> ANALOG_PWRDOWN)
> +			&~FORCE_SUSPEND_0), &phy->phypwr);
> +	else /* C110 GONI */
> +		writel((readl(&phy->phypwr) &~(OTG_DISABLE_0 |
> ANALOG_PWRDOWN)
> +			&~FORCE_SUSPEND_0), &phy->phypwr);
> +
> +	if (s5p_cpu_id == 0x4412)
> +		writel((readl(&phy->phyclk) &
> ~(EXYNOS4X12_ID_PULLUP0 |
> +			EXYNOS4X12_COMMON_ON_N0)) |
> EXYNOS4X12_CLK_SEL_24MHZ,
> +		       &phy->phyclk); /* PLL 24Mhz */
> +	else
> +		writel((readl(&phy->phyclk) & ~(ID_PULLUP0 |
> COMMON_ON_N0)) |
> +		       CLK_SEL_24MHZ, &phy->phyclk); /* PLL 24Mhz */
> +
> +	writel((readl(&phy->rstcon) &~(LINK_SW_RST | PHYLNK_SW_RST))
> +	       | PHY_SW_RST0, &phy->rstcon);
> +	udelay(10);
> +	writel(readl(&phy->rstcon)
> +	       &~(PHY_SW_RST0 | LINK_SW_RST | PHYLNK_SW_RST),
> &phy->rstcon);
> +	udelay(10);
> +}
> +
> +void otg_phy_off(struct s3c_udc *dev)
> +{
> +	unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl;
> +	struct s3c_usbotg_phy *phy =
> +		(struct s3c_usbotg_phy *)dev->pdata->regs_phy;
> +
> +	/* reset controller just in case */
> +	writel(PHY_SW_RST0, &phy->rstcon);
> +	udelay(20);
> +	writel(readl(&phy->phypwr) &~PHY_SW_RST0, &phy->rstcon);
> +	udelay(20);
> +
> +	writel(readl(&phy->phypwr) | OTG_DISABLE_0 | ANALOG_PWRDOWN
> +	       | FORCE_SUSPEND_0, &phy->phypwr);
> +
> +	writel(readl(usb_phy_ctrl) &~USB_PHY_CTRL_EN0, usb_phy_ctrl);
> +
> +	writel((readl(&phy->phyclk) & ~(ID_PULLUP0 | COMMON_ON_N0)),
> +	      &phy->phyclk);
> +
> +	udelay(10000);
> +
> +	dev->pdata->phy_control(0);
> +}
> diff --git a/include/configs/exynos4-common.h
> b/include/configs/exynos4-common.h index 89ba14e..41631c7 100644
> --- a/include/configs/exynos4-common.h
> +++ b/include/configs/exynos4-common.h
> @@ -59,6 +59,7 @@
>  
>  #define CONFIG_USB_GADGET
>  #define CONFIG_USB_GADGET_S3C_UDC_OTG
> +#define CONFIG_USB_GADGET_S3C_UDC_OTG_PHY
>  #define CONFIG_USB_GADGET_DUALSPEED
>  #define CONFIG_USB_GADGET_VBUS_DRAW	2
>  
> diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h
> index 3633a35..dfa2e07 100644
> --- a/include/configs/s5p_goni.h
> +++ b/include/configs/s5p_goni.h
> @@ -281,6 +281,7 @@
>  #define CONFIG_SYS_MAX_I2C_BUS	7
>  #define CONFIG_USB_GADGET
>  #define CONFIG_USB_GADGET_S3C_UDC_OTG
> +#define CONFIG_USB_GADGET_S3C_UDC_OTG_PHY
>  #define CONFIG_USB_GADGET_DUALSPEED
>  #define CONFIG_USB_GADGET_VBUS_DRAW 2
>  #define CONFIG_CMD_USB_MASS_STORAGE
> diff --git a/include/configs/s5pc210_universal.h
> b/include/configs/s5pc210_universal.h index 4b30d148..e7bace4 100644
> --- a/include/configs/s5pc210_universal.h
> +++ b/include/configs/s5pc210_universal.h
> @@ -181,6 +181,7 @@
>  
>  #define CONFIG_USB_GADGET
>  #define CONFIG_USB_GADGET_S3C_UDC_OTG
> +#define CONFIG_USB_GADGET_S3C_UDC_OTG_PHY
>  #define CONFIG_USB_GADGET_DUALSPEED
>  
>  /*
> diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h
> index a2469eb..655025c 100644
> --- a/include/configs/smdkv310.h
> +++ b/include/configs/smdkv310.h
> @@ -14,6 +14,7 @@
>  #undef CONFIG_BOARD_COMMON
>  #undef CONFIG_USB_GADGET
>  #undef CONFIG_USB_GADGET_S3C_UDC_OTG
> +#undef CONFIG_USB_GADGET_S3C_UDC_OTG_PHY
>  #undef CONFIG_CMD_USB_MASS_STORAGE
>  #undef CONFIG_REVISION_TAG
>  #undef CONFIG_CMD_THOR_DOWNLOAD

Unfortunately I've found following build errors:

  CC      drivers/usb/gadget/s3c_udc_otg_phy.o
drivers/usb/gadget/s3c_udc_otg_phy.c:38:26: warning: 'struct s3c_udc'
  declared inside parameter list [enabled by default] void
  otg_phy_init(struct s3c_udc *dev) ^
drivers/usb/gadget/s3c_udc_otg_phy.c:38:26: warning: its scope is only
  this definition or declaration, which is probably not what you want
  [enabled by default] drivers/usb/gadget/s3c_udc_otg_phy.c: In
  function 'otg_phy_init': drivers/usb/gadget/s3c_udc_otg_phy.c:40:33:
  error: dereferencing pointer to incomplete type unsigned int
  usb_phy_ctrl = dev->pdata->usb_phy_ctrl; ^
  drivers/usb/gadget/s3c_udc_otg_phy.c:42:31: error: dereferencing
  pointer to incomplete type (struct s3c_usbotg_phy
  *)dev->pdata->regs_phy; ^ drivers/usb/gadget/s3c_udc_otg_phy.c:44:5:
  error: dereferencing pointer to incomplete type
  dev->pdata->phy_control(1); ^
drivers/usb/gadget/s3c_udc_otg_phy.c:52:9: error: dereferencing pointer
  to incomplete type if (dev->pdata->usb_flags == PHY0_SLEEP) /* C210
  Universal */ ^
drivers/usb/gadget/s3c_udc_otg_phy.c:52:31: error: 'PHY0_SLEEP'
  undeclared (first use in this function) if (dev->pdata->usb_flags ==
  PHY0_SLEEP) /* C210 Universal */ ^
drivers/usb/gadget/s3c_udc_otg_phy.c:52:31: note: each undeclared
  identifier is reported only once for each function it appears in
  drivers/usb/gadget/s3c_udc_otg_phy.c: At top level:
  drivers/usb/gadget/s3c_udc_otg_phy.c:76:25: warning: 'struct s3c_udc'
  declared inside parameter list [enabled by default] void
  otg_phy_off(struct s3c_udc *dev) ^
  drivers/usb/gadget/s3c_udc_otg_phy.c: In function 'otg_phy_off':
  drivers/usb/gadget/s3c_udc_otg_phy.c:78:33: error: dereferencing
  pointer to incomplete type unsigned int usb_phy_ctrl =
  dev->pdata->usb_phy_ctrl; ^
  drivers/usb/gadget/s3c_udc_otg_phy.c:80:31: error: dereferencing
  pointer to incomplete type (struct s3c_usbotg_phy
  *)dev->pdata->regs_phy; ^ drivers/usb/gadget/s3c_udc_otg_phy.c:98:5:
  error: dereferencing pointer to incomplete type
  dev->pdata->phy_control(0); ^
make[1]: *** [drivers/usb/gadget/s3c_udc_otg_phy.o] Error 1
make: *** [drivers/usb/gadget] Error 2

Build HW: trats2 (Exynos4412)

CROSS_COMPILE=/home/lukma/work/ptxdist/toolchains/arm/OSELAS.Toolchain-2013.12.0/arm-v7a-linux-gnueabi/gcc-4.8.2-glibc-2.18-binutils-2.24-kernel-3.12-sanitized/bin/arm-v7a-linux-gnueabi-

Patches applied on top of v2014.10.
-- 
Best regards,

Lukasz Majewski

Samsung R&D Institute Poland (SRPOL) | Linux Platform Group

[U-Boot] [PATCH 3/5] usb: s3c-otg: Split out PHY control

[Marek Vasut]

On Thursday, November 06, 2014 at 10:59:17 AM, Lukasz Majewski wrote:
> Hi Marek,
> 
> > Split the Samsung specific PHY control into a separate file
> > and compile this into the S3C OTG driver only if used on a
> > Samsung system.
> > 
> > Signed-off-by: Marek Vasut <marex@denx.de>
> > Cc: Chin Liang See <clsee@altera.com>
> > Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> > Cc: Vince Bridgers <vbridger@altera.com>
> > Cc: Pavel Machek <pavel@denx.de>
> > Cc: Stefan Roese <sr@denx.de>
> > Cc: Lukasz Majewski <l.majewski@samsung.com>

[...]

> Build HW: trats2 (Exynos4412)
> 
> CROSS_COMPILE=/home/lukma/work/ptxdist/toolchains/arm/OSELAS.Toolchain-2013
> .12.0/arm-v7a-linux-gnueabi/gcc-4.8.2-glibc-2.18-binutils-2.24-kernel-3.12-
> sanitized/bin/arm-v7a-linux-gnueabi-
> 
> Patches applied on top of v2014.10.

Try this trivial patch (add missing include):

diff --git a/drivers/usb/gadget/s3c_udc_otg_phy.c 
b/drivers/usb/gadget/s3c_udc_otg_phy.c
index 055fe86..95bd8cf 100644
--- a/drivers/usb/gadget/s3c_udc_otg_phy.c
+++ b/drivers/usb/gadget/s3c_udc_otg_phy.c
@@ -35,6 +35,8 @@
 #include "regs-otg.h"
 #include <usb/lin_gadget_compat.h>
 
+#include <usb/s3c_udc.h>
+
 void otg_phy_init(struct s3c_udc *dev)
 {
        unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl;

Best regards,
Marek Vasut

[U-Boot] [PATCH 3/5] usb: s3c-otg: Split out PHY control

[Lukasz Majewski]

On Thu, 6 Nov 2014 21:23:46 +0100
Marek Vasut <marex@denx.de> wrote:

> On Thursday, November 06, 2014 at 10:59:17 AM, Lukasz Majewski wrote:
> > Hi Marek,
> > 
> > > Split the Samsung specific PHY control into a separate file
> > > and compile this into the S3C OTG driver only if used on a
> > > Samsung system.
> > > 
> > > Signed-off-by: Marek Vasut <marex@denx.de>
> > > Cc: Chin Liang See <clsee@altera.com>
> > > Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> > > Cc: Vince Bridgers <vbridger@altera.com>
> > > Cc: Pavel Machek <pavel@denx.de>
> > > Cc: Stefan Roese <sr@denx.de>
> > > Cc: Lukasz Majewski <l.majewski@samsung.com>
> 
> [...]
> 
> > Build HW: trats2 (Exynos4412)
> > 
> > CROSS_COMPILE=/home/lukma/work/ptxdist/toolchains/arm/OSELAS.Toolchain-2013
> > .12.0/arm-v7a-linux-gnueabi/gcc-4.8.2-glibc-2.18-binutils-2.24-kernel-3.12-
> > sanitized/bin/arm-v7a-linux-gnueabi-
> > 
> > Patches applied on top of v2014.10.
> 
> Try this trivial patch (add missing include):
> 
> diff --git a/drivers/usb/gadget/s3c_udc_otg_phy.c 
> b/drivers/usb/gadget/s3c_udc_otg_phy.c
> index 055fe86..95bd8cf 100644
> --- a/drivers/usb/gadget/s3c_udc_otg_phy.c
> +++ b/drivers/usb/gadget/s3c_udc_otg_phy.c
> @@ -35,6 +35,8 @@
>  #include "regs-otg.h"
>  #include <usb/lin_gadget_compat.h>
>  
> +#include <usb/s3c_udc.h>
> +

Ok, I will apply it and let you know about the result.

BTW: I assume that your work is to reuse the USB 2.0 UDC IP block
(probably in Altera).

I'd be elated if this is true :-).

>  void otg_phy_init(struct s3c_udc *dev)
>  {
>         unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl;
> 
> Best regards,
> Marek Vasut
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> http://lists.denx.de/mailman/listinfo/u-boot

Best regards,
Lukasz Majewski
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[U-Boot] [PATCH 3/5] usb: s3c-otg: Split out PHY control

[Marek Vasut]

On Thursday, November 06, 2014 at 10:29:03 PM, Lukasz Majewski wrote:
> On Thu, 6 Nov 2014 21:23:46 +0100

Hi!

> Marek Vasut <marex@denx.de> wrote:
> > On Thursday, November 06, 2014 at 10:59:17 AM, Lukasz Majewski wrote:
> > > Hi Marek,
> > > 
> > > > Split the Samsung specific PHY control into a separate file
> > > > and compile this into the S3C OTG driver only if used on a
> > > > Samsung system.
> > > > 
> > > > Signed-off-by: Marek Vasut <marex@denx.de>
> > > > Cc: Chin Liang See <clsee@altera.com>
> > > > Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> > > > Cc: Vince Bridgers <vbridger@altera.com>
> > > > Cc: Pavel Machek <pavel@denx.de>
> > > > Cc: Stefan Roese <sr@denx.de>
> > > > Cc: Lukasz Majewski <l.majewski@samsung.com>
> > 
> > [...]
> > 
> > > Build HW: trats2 (Exynos4412)
> > > 
> > > CROSS_COMPILE=/home/lukma/work/ptxdist/toolchains/arm/OSELAS.Toolchain-
> > > 2013
> > > .12.0/arm-v7a-linux-gnueabi/gcc-4.8.2-glibc-2.18-binutils-2.24-kernel-
> > > 3.12- sanitized/bin/arm-v7a-linux-gnueabi-
> > > 
> > > Patches applied on top of v2014.10.
> > 
> > Try this trivial patch (add missing include):
> > 
> > diff --git a/drivers/usb/gadget/s3c_udc_otg_phy.c
> > b/drivers/usb/gadget/s3c_udc_otg_phy.c
> > index 055fe86..95bd8cf 100644
> > --- a/drivers/usb/gadget/s3c_udc_otg_phy.c
> > +++ b/drivers/usb/gadget/s3c_udc_otg_phy.c
> > @@ -35,6 +35,8 @@
> > 
> >  #include "regs-otg.h"
> >  #include <usb/lin_gadget_compat.h>
> > 
> > +#include <usb/s3c_udc.h>
> > +
> 
> Ok, I will apply it and let you know about the result.
> 
> BTW: I assume that your work is to reuse the USB 2.0 UDC IP block
> (probably in Altera).

Yep, I got the UDC working on my SoCFPGA board. We should probably
rename the s3c-otg driver to something more fitting (dwc2-udc ?)
and strive to somehow merge the dwc2-host and dwc2-udc drivers in
the long run.

Speaking of the rename, I'd like to leave that for the next MW, to
make sure it doesn't break any tools which might for example depend
on the name of the driver.

> I'd be elated if this is true :-).

It is :) ... it must have been hard to tell from patch 5/5 ;-)

Best regards,
Marek Vasut

[U-Boot] [PATCH 3/5] usb: s3c-otg: Split out PHY control

[Lukasz Majewski]

Hi Marek,

> On Thursday, November 06, 2014 at 10:29:03 PM, Lukasz Majewski wrote:
> > On Thu, 6 Nov 2014 21:23:46 +0100
> 
> Hi!
> 
> > Marek Vasut <marex@denx.de> wrote:
> > > On Thursday, November 06, 2014 at 10:59:17 AM, Lukasz Majewski
> > > wrote:
> > > > Hi Marek,
> > > > 
> > > > > Split the Samsung specific PHY control into a separate file
> > > > > and compile this into the S3C OTG driver only if used on a
> > > > > Samsung system.
> > > > > 
> > > > > Signed-off-by: Marek Vasut <marex@denx.de>
> > > > > Cc: Chin Liang See <clsee@altera.com>
> > > > > Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> > > > > Cc: Vince Bridgers <vbridger@altera.com>
> > > > > Cc: Pavel Machek <pavel@denx.de>
> > > > > Cc: Stefan Roese <sr@denx.de>
> > > > > Cc: Lukasz Majewski <l.majewski@samsung.com>
> > > 
> > > [...]
> > > 
> > > > Build HW: trats2 (Exynos4412)
> > > > 
> > > > CROSS_COMPILE=/home/lukma/work/ptxdist/toolchains/arm/OSELAS.Toolchain-
> > > > 2013
> > > > .12.0/arm-v7a-linux-gnueabi/gcc-4.8.2-glibc-2.18-binutils-2.24-kernel-
> > > > 3.12- sanitized/bin/arm-v7a-linux-gnueabi-
> > > > 
> > > > Patches applied on top of v2014.10.
> > > 
> > > Try this trivial patch (add missing include):
> > > 
> > > diff --git a/drivers/usb/gadget/s3c_udc_otg_phy.c
> > > b/drivers/usb/gadget/s3c_udc_otg_phy.c
> > > index 055fe86..95bd8cf 100644
> > > --- a/drivers/usb/gadget/s3c_udc_otg_phy.c
> > > +++ b/drivers/usb/gadget/s3c_udc_otg_phy.c
> > > @@ -35,6 +35,8 @@
> > > 
> > >  #include "regs-otg.h"
> > >  #include <usb/lin_gadget_compat.h>
> > > 
> > > +#include <usb/s3c_udc.h>
> > > +
> > 
> > Ok, I will apply it and let you know about the result.
> > 
> > BTW: I assume that your work is to reuse the USB 2.0 UDC IP block
> > (probably in Altera).
> 
> Yep, I got the UDC working on my SoCFPGA board. We should probably
> rename the s3c-otg driver to something more fitting (dwc2-udc ?)
> and strive to somehow merge the dwc2-host and dwc2-udc drivers in
> the long run.
> 
> Speaking of the rename, I'd like to leave that for the next MW, to
> make sure it doesn't break any tools which might for example depend
> on the name of the driver.

+1

IMHO, we should devote one MW only for rename (as I've written
previously).

> 
> > I'd be elated if this is true :-).
> 
> It is :) ... it must have been hard to tell from patch 5/5 ;-)
> 
> Best regards,
> Marek Vasut



-- 
Best regards,

Lukasz Majewski

Samsung R&D Institute Poland (SRPOL) | Linux Platform Group

[U-Boot] [PATCH 4/5] usb: s3c-otg: Allow custom gusbcfg

[Marek Vasut]

Allow passing in a custom configuration of the gusbcfg register
via platform data.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Vince Bridgers <vbridger@altera.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Lukasz Majewski <l.majewski@samsung.com>
---
 drivers/usb/gadget/s3c_udc_otg.c          | 18 ++++++++++++------
 drivers/usb/gadget/s3c_udc_otg_xfer_dma.c |  2 +-
 include/usb/s3c_udc.h                     |  1 +
 3 files changed, 14 insertions(+), 7 deletions(-)

diff --git a/drivers/usb/gadget/s3c_udc_otg.c b/drivers/usb/gadget/s3c_udc_otg.c
index b910053..7653f03 100644
--- a/drivers/usb/gadget/s3c_udc_otg.c
+++ b/drivers/usb/gadget/s3c_udc_otg.c
@@ -104,7 +104,7 @@ static void stop_activity(struct s3c_udc *dev,
 			  struct usb_gadget_driver *driver);
 static int udc_enable(struct s3c_udc *dev);
 static void udc_set_address(struct s3c_udc *dev, unsigned char address);
-static void reconfig_usbd(void);
+static void reconfig_usbd(struct s3c_udc *dev);
 static void set_max_pktsize(struct s3c_udc *dev, enum usb_device_speed speed);
 static void nuke(struct s3c_ep *ep, int status);
 static int s3c_udc_set_halt(struct usb_ep *_ep, int value);
@@ -215,7 +215,7 @@ static int udc_enable(struct s3c_udc *dev)
 	debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev);
 
 	otg_phy_init(dev);
-	reconfig_usbd();
+	reconfig_usbd(dev);
 
 	debug_cond(DEBUG_SETUP != 0,
 		   "S3C USB 2.0 OTG Controller Core Initialized : 0x%x\n",
@@ -396,15 +396,17 @@ static void stop_activity(struct s3c_udc *dev,
 	udc_reinit(dev);
 }
 
-static void reconfig_usbd(void)
+static void reconfig_usbd(struct s3c_udc *dev)
 {
 	/* 2. Soft-reset OTG Core and then unreset again. */
 	int i;
 	unsigned int uTemp = writel(CORE_SOFT_RESET, &reg->grstctl);
+	uint32_t dflt_gusbcfg;
 
 	debug("Reseting OTG controller\n");
 
-	writel(0<<15		/* PHY Low Power Clock sel*/
+	dflt_gusbcfg =
+		0<<15		/* PHY Low Power Clock sel*/
 		|1<<14		/* Non-Periodic TxFIFO Rewind Enable*/
 		|0x5<<10	/* Turnaround time*/
 		|0<<9 | 0<<8	/* [0:HNP disable,1:HNP enable][ 0:SRP disable*/
@@ -413,8 +415,12 @@ static void reconfig_usbd(void)
 		|0<<6		/* 0: high speed utmi+, 1: full speed serial*/
 		|0<<4		/* 0: utmi+, 1:ulpi*/
 		|1<<3		/* phy i/f  0:8bit, 1:16bit*/
-		|0x7<<0,	/* HS/FS Timeout**/
-		&reg->gusbcfg);
+		|0x7<<0;	/* HS/FS Timeout**/
+
+	if (dev->pdata->usb_gusbcfg)
+		dflt_gusbcfg = dev->pdata->usb_gusbcfg;
+
+	writel(dflt_gusbcfg, &reg->gusbcfg);
 
 	/* 3. Put the OTG device core in the disconnected state.*/
 	uTemp = readl(&reg->dctl);
diff --git a/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c b/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c
index 4f69b22..9c54b46 100644
--- a/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c
+++ b/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c
@@ -551,7 +551,7 @@ static int s3c_udc_irq(int irq, void *_dev)
 				debug_cond(DEBUG_ISR,
 					"\t\tOTG core got reset (%d)!!\n",
 					reset_available);
-				reconfig_usbd();
+				reconfig_usbd(dev);
 				dev->ep0state = WAIT_FOR_SETUP;
 				reset_available = 0;
 				s3c_udc_pre_setup();
diff --git a/include/usb/s3c_udc.h b/include/usb/s3c_udc.h
index 70e48f8..7f49a4e 100644
--- a/include/usb/s3c_udc.h
+++ b/include/usb/s3c_udc.h
@@ -108,5 +108,6 @@ struct s3c_plat_otg_data {
 	unsigned int	regs_otg;
 	unsigned int    usb_phy_ctrl;
 	unsigned int    usb_flags;
+	unsigned int	usb_gusbcfg;
 };
 #endif
-- 
2.0.0

[U-Boot] [PATCH 4/5] usb: s3c-otg: Allow custom gusbcfg

[Pavel Machek]

On Tue 2014-11-04 06:07:33, Marek Vasut wrote:
> Allow passing in a custom configuration of the gusbcfg register
> via platform data.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Chin Liang See <clsee@altera.com>
> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> Cc: Vince Bridgers <vbridger@altera.com>

Acked-by: Pavel Machek <pavel@denx.de>

>  	debug("Reseting OTG controller\n");
>  
> -	writel(0<<15		/* PHY Low Power Clock sel*/
> +	dflt_gusbcfg =
> +		0<<15		/* PHY Low Power Clock sel*/
>  		|1<<14		/* Non-Periodic TxFIFO Rewind Enable*/
>  		|0x5<<10	/* Turnaround time*/
>  		|0<<9 | 0<<8	/* [0:HNP disable,1:HNP enable][ 0:SRP disable*/
> @@ -413,8 +415,12 @@ static void reconfig_usbd(void)
>  		|0<<6		/* 0: high speed utmi+, 1: full speed serial*/
>  		|0<<4		/* 0: utmi+, 1:ulpi*/
>  		|1<<3		/* phy i/f  0:8bit, 1:16bit*/
> -		|0x7<<0,	/* HS/FS Timeout**/
> -		&reg->gusbcfg);
> +		|0x7<<0;	/* HS/FS Timeout**/
> +

"Interesting" comment style. And I'd remove 0x prefixes from constants
<8...


-- 
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html

[U-Boot] [PATCH 4/5] usb: s3c-otg: Allow custom gusbcfg

[Marek Vasut]

On Tuesday, November 04, 2014 at 08:36:57 PM, Pavel Machek wrote:
> On Tue 2014-11-04 06:07:33, Marek Vasut wrote:
> > Allow passing in a custom configuration of the gusbcfg register
> > via platform data.
> > 
> > Signed-off-by: Marek Vasut <marex@denx.de>
> > Cc: Chin Liang See <clsee@altera.com>
> > Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> > Cc: Vince Bridgers <vbridger@altera.com>
> 
> Acked-by: Pavel Machek <pavel@denx.de>
> 
> >  	debug("Reseting OTG controller\n");
> > 
> > -	writel(0<<15		/* PHY Low Power Clock sel*/
> > +	dflt_gusbcfg =
> > +		0<<15		/* PHY Low Power Clock sel*/
> > 
> >  		|1<<14		/* Non-Periodic TxFIFO Rewind Enable*/
> >  		|0x5<<10	/* Turnaround time*/
> >  		|0<<9 | 0<<8	/* [0:HNP disable,1:HNP enable][ 0:SRP disable*/
> > 
> > @@ -413,8 +415,12 @@ static void reconfig_usbd(void)
> > 
> >  		|0<<6		/* 0: high speed utmi+, 1: full speed serial*/
> >  		|0<<4		/* 0: utmi+, 1:ulpi*/
> >  		|1<<3		/* phy i/f  0:8bit, 1:16bit*/
> > 
> > -		|0x7<<0,	/* HS/FS Timeout**/
> > -		&reg->gusbcfg);
> > +		|0x7<<0;	/* HS/FS Timeout**/
> > +
> 
> "Interesting" comment style. And I'd remove 0x prefixes from constants
> <8...

Lukasz, what do you say to just convert those four boards to use the gusbcfg
platform data afterward ?

btw. you can find the latest version in u-boot-usb:topic/s3c-otg

Best regards,
Marek Vasut

[U-Boot] [PATCH 4/5] usb: s3c-otg: Allow custom gusbcfg

[Lukasz Majewski]

Hi Marek,

> On Tuesday, November 04, 2014 at 08:36:57 PM, Pavel Machek wrote:
> > On Tue 2014-11-04 06:07:33, Marek Vasut wrote:
> > > Allow passing in a custom configuration of the gusbcfg register
> > > via platform data.
> > > 
> > > Signed-off-by: Marek Vasut <marex@denx.de>
> > > Cc: Chin Liang See <clsee@altera.com>
> > > Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> > > Cc: Vince Bridgers <vbridger@altera.com>
> > 
> > Acked-by: Pavel Machek <pavel@denx.de>
> > 
> > >  	debug("Reseting OTG controller\n");
> > > 
> > > -	writel(0<<15		/* PHY Low Power Clock sel*/
> > > +	dflt_gusbcfg =
> > > +		0<<15		/* PHY Low Power Clock sel*/
> > > 
> > >  		|1<<14		/* Non-Periodic TxFIFO
> > > Rewind Enable*/ |0x5<<10	/* Turnaround time*/
> > >  		|0<<9 | 0<<8	/* [0:HNP disable,1:HNP
> > > enable][ 0:SRP disable*/
> > > 
> > > @@ -413,8 +415,12 @@ static void reconfig_usbd(void)
> > > 
> > >  		|0<<6		/* 0: high speed utmi+, 1:
> > > full speed serial*/ |0<<4		/* 0: utmi+, 1:ulpi*/
> > >  		|1<<3		/* phy i/f  0:8bit,
> > > 1:16bit*/
> > > 
> > > -		|0x7<<0,	/* HS/FS Timeout**/
> > > -		&reg->gusbcfg);
> > > +		|0x7<<0;	/* HS/FS Timeout**/
> > > +
> > 
> > "Interesting" comment style. And I'd remove 0x prefixes from
> > constants <8...
> 
> Lukasz, what do you say to just convert those four boards to use the
> gusbcfg platform data afterward ?

+1

It is a very good idea since we are using the same dwc2 IP block for
host (./usb/host/dwc2.c) and device (s3c_hsotg).

> 
> btw. you can find the latest version in u-boot-usb:topic/s3c-otg

I've read comments from Pavel and tested the code up till first build
error :-).

> 
> Best regards,
> Marek Vasut



-- 
Best regards,

Lukasz Majewski

Samsung R&D Institute Poland (SRPOL) | Linux Platform Group

[U-Boot] [PATCH 4/5] usb: s3c-otg: Allow custom gusbcfg

[Marek Vasut]

On Friday, November 07, 2014 at 10:11:35 AM, Lukasz Majewski wrote:
> Hi Marek,
> 
> > On Tuesday, November 04, 2014 at 08:36:57 PM, Pavel Machek wrote:
> > > On Tue 2014-11-04 06:07:33, Marek Vasut wrote:
> > > > Allow passing in a custom configuration of the gusbcfg register
> > > > via platform data.
> > > > 
> > > > Signed-off-by: Marek Vasut <marex@denx.de>
> > > > Cc: Chin Liang See <clsee@altera.com>
> > > > Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> > > > Cc: Vince Bridgers <vbridger@altera.com>
> > > 
> > > Acked-by: Pavel Machek <pavel@denx.de>
> > > 
> > > >  	debug("Reseting OTG controller\n");
> > > > 
> > > > -	writel(0<<15		/* PHY Low Power Clock sel*/
> > > > +	dflt_gusbcfg =
> > > > +		0<<15		/* PHY Low Power Clock sel*/
> > > > 
> > > >  		|1<<14		/* Non-Periodic TxFIFO
> > > > 
> > > > Rewind Enable*/ |0x5<<10	/* Turnaround time*/
> > > > 
> > > >  		|0<<9 | 0<<8	/* [0:HNP disable,1:HNP
> > > > 
> > > > enable][ 0:SRP disable*/
> > > > 
> > > > @@ -413,8 +415,12 @@ static void reconfig_usbd(void)
> > > > 
> > > >  		|0<<6		/* 0: high speed utmi+, 1:
> > > > full speed serial*/ |0<<4		/* 0: utmi+, 1:ulpi*/
> > > > 
> > > >  		|1<<3		/* phy i/f  0:8bit,
> > > > 
> > > > 1:16bit*/
> > > > 
> > > > -		|0x7<<0,	/* HS/FS Timeout**/
> > > > -		&reg->gusbcfg);
> > > > +		|0x7<<0;	/* HS/FS Timeout**/
> > > > +
> > > 
> > > "Interesting" comment style. And I'd remove 0x prefixes from
> > > constants <8...
> > 
> > Lukasz, what do you say to just convert those four boards to use the
> > gusbcfg platform data afterward ?
> 
> +1
> 
> It is a very good idea since we are using the same dwc2 IP block for
> host (./usb/host/dwc2.c) and device (s3c_hsotg).

Yep ... I'm just wondering if we should do that rename in the next MW.
If you're fine with this MW though, then I will do just that.

> > btw. you can find the latest version in u-boot-usb:topic/s3c-otg
> 
> I've read comments from Pavel and tested the code up till first build
> error :-).

I rewrote that branch, so feel free to use that as a base for your testing.
I will repost the corrected patches once I get feedback from you.

Best regards,
Marek Vasut

[U-Boot] [PATCH 4/5] usb: s3c-otg: Allow custom gusbcfg

[Lukasz Majewski]

Hi Marek,

> On Friday, November 07, 2014 at 10:11:35 AM, Lukasz Majewski wrote:
> > Hi Marek,
> > 
> > > On Tuesday, November 04, 2014 at 08:36:57 PM, Pavel Machek wrote:
> > > > On Tue 2014-11-04 06:07:33, Marek Vasut wrote:
> > > > > Allow passing in a custom configuration of the gusbcfg
> > > > > register via platform data.
> > > > > 
> > > > > Signed-off-by: Marek Vasut <marex@denx.de>
> > > > > Cc: Chin Liang See <clsee@altera.com>
> > > > > Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> > > > > Cc: Vince Bridgers <vbridger@altera.com>
> > > > 
> > > > Acked-by: Pavel Machek <pavel@denx.de>
> > > > 
> > > > >  	debug("Reseting OTG controller\n");
> > > > > 
> > > > > -	writel(0<<15		/* PHY Low Power Clock
> > > > > sel*/
> > > > > +	dflt_gusbcfg =
> > > > > +		0<<15		/* PHY Low Power Clock
> > > > > sel*/
> > > > > 
> > > > >  		|1<<14		/* Non-Periodic TxFIFO
> > > > > 
> > > > > Rewind Enable*/ |0x5<<10	/* Turnaround time*/
> > > > > 
> > > > >  		|0<<9 | 0<<8	/* [0:HNP disable,1:HNP
> > > > > 
> > > > > enable][ 0:SRP disable*/
> > > > > 
> > > > > @@ -413,8 +415,12 @@ static void reconfig_usbd(void)
> > > > > 
> > > > >  		|0<<6		/* 0: high speed utmi+,
> > > > > 1: full speed serial*/ |0<<4		/* 0: utmi+,
> > > > > 1:ulpi*/
> > > > > 
> > > > >  		|1<<3		/* phy i/f  0:8bit,
> > > > > 
> > > > > 1:16bit*/
> > > > > 
> > > > > -		|0x7<<0,	/* HS/FS Timeout**/
> > > > > -		&reg->gusbcfg);
> > > > > +		|0x7<<0;	/* HS/FS Timeout**/
> > > > > +
> > > > 
> > > > "Interesting" comment style. And I'd remove 0x prefixes from
> > > > constants <8...
> > > 
> > > Lukasz, what do you say to just convert those four boards to use
> > > the gusbcfg platform data afterward ?
> > 
> > +1
> > 
> > It is a very good idea since we are using the same dwc2 IP block for
> > host (./usb/host/dwc2.c) and device (s3c_hsotg).
> 
> Yep ... I'm just wondering if we should do that rename in the next MW.
> If you're fine with this MW though, then I will do just that.

I'd prefer to spent one MW only for s3c-hsotg rename. In other words we
do the "fixes" and "clean ups" now and only when the code gets stable
we perform the rename (at the MW).

Does it work for you?

> 
> > > btw. you can find the latest version in u-boot-usb:topic/s3c-otg
> > 
> > I've read comments from Pavel and tested the code up till first
> > build error :-).
> 
> I rewrote that branch, so feel free to use that as a base for your
> testing. I will repost the corrected patches once I get feedback from
> you.

Ok.

> 
> Best regards,
> Marek Vasut



-- 
Best regards,

Lukasz Majewski

Samsung R&D Institute Poland (SRPOL) | Linux Platform Group

[U-Boot] [PATCH 4/5] usb: s3c-otg: Allow custom gusbcfg

[Lukasz Majewski]

Hi Marek,

> On Friday, November 07, 2014 at 10:11:35 AM, Lukasz Majewski wrote:
> > Hi Marek,
> > 
> > > On Tuesday, November 04, 2014 at 08:36:57 PM, Pavel Machek wrote:
> > > > On Tue 2014-11-04 06:07:33, Marek Vasut wrote:
> > > > > Allow passing in a custom configuration of the gusbcfg
> > > > > register via platform data.
> > > > > 
> > > > > Signed-off-by: Marek Vasut <marex@denx.de>
> > > > > Cc: Chin Liang See <clsee@altera.com>
> > > > > Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> > > > > Cc: Vince Bridgers <vbridger@altera.com>
> > > > 
> > > > Acked-by: Pavel Machek <pavel@denx.de>
> > > > 
> > > > >  	debug("Reseting OTG controller\n");
> > > > > 
> > > > > -	writel(0<<15		/* PHY Low Power Clock
> > > > > sel*/
> > > > > +	dflt_gusbcfg =
> > > > > +		0<<15		/* PHY Low Power Clock
> > > > > sel*/
> > > > > 
> > > > >  		|1<<14		/* Non-Periodic TxFIFO
> > > > > 
> > > > > Rewind Enable*/ |0x5<<10	/* Turnaround time*/
> > > > > 
> > > > >  		|0<<9 | 0<<8	/* [0:HNP disable,1:HNP
> > > > > 
> > > > > enable][ 0:SRP disable*/
> > > > > 
> > > > > @@ -413,8 +415,12 @@ static void reconfig_usbd(void)
> > > > > 
> > > > >  		|0<<6		/* 0: high speed utmi+,
> > > > > 1: full speed serial*/ |0<<4		/* 0: utmi+,
> > > > > 1:ulpi*/
> > > > > 
> > > > >  		|1<<3		/* phy i/f  0:8bit,
> > > > > 
> > > > > 1:16bit*/
> > > > > 
> > > > > -		|0x7<<0,	/* HS/FS Timeout**/
> > > > > -		&reg->gusbcfg);
> > > > > +		|0x7<<0;	/* HS/FS Timeout**/
> > > > > +
> > > > 
> > > > "Interesting" comment style. And I'd remove 0x prefixes from
> > > > constants <8...
> > > 
> > > Lukasz, what do you say to just convert those four boards to use
> > > the gusbcfg platform data afterward ?
> > 
> > +1
> > 
> > It is a very good idea since we are using the same dwc2 IP block for
> > host (./usb/host/dwc2.c) and device (s3c_hsotg).
> 
> Yep ... I'm just wondering if we should do that rename in the next MW.
> If you're fine with this MW though, then I will do just that.
> 
> > > btw. you can find the latest version in u-boot-usb:topic/s3c-otg
> > 
> > I've read comments from Pavel and tested the code up till first
> > build error :-).
> 
> I rewrote that branch, so feel free to use that as a base for your
> testing. I will repost the corrected patches once I get feedback from
> you.
> 
> Best regards,
> Marek Vasut

Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>

Tested-by: Lukasz Majewski <l.majewski@samsung.com>

Test HW: Trats2 (Exynos4412)

-- 
Best regards,

Lukasz Majewski

Samsung R&D Institute Poland (SRPOL) | Linux Platform Group

[U-Boot] [PATCH 4/5] usb: s3c-otg: Allow custom gusbcfg

[Marek Vasut]

On Friday, November 07, 2014 at 03:33:10 PM, Lukasz Majewski wrote:
> Hi Marek,
> 
> > On Friday, November 07, 2014 at 10:11:35 AM, Lukasz Majewski wrote:
> > > Hi Marek,
> > > 
> > > > On Tuesday, November 04, 2014 at 08:36:57 PM, Pavel Machek wrote:
> > > > > On Tue 2014-11-04 06:07:33, Marek Vasut wrote:
> > > > > > Allow passing in a custom configuration of the gusbcfg
> > > > > > register via platform data.
> > > > > > 
> > > > > > Signed-off-by: Marek Vasut <marex@denx.de>
> > > > > > Cc: Chin Liang See <clsee@altera.com>
> > > > > > Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> > > > > > Cc: Vince Bridgers <vbridger@altera.com>
> > > > > 
> > > > > Acked-by: Pavel Machek <pavel@denx.de>
> > > > > 
> > > > > >  	debug("Reseting OTG controller\n");
> > > > > > 
> > > > > > -	writel(0<<15		/* PHY Low Power Clock
> > > > > > sel*/
> > > > > > +	dflt_gusbcfg =
> > > > > > +		0<<15		/* PHY Low Power Clock
> > > > > > sel*/
> > > > > > 
> > > > > >  		|1<<14		/* Non-Periodic TxFIFO
> > > > > > 
> > > > > > Rewind Enable*/ |0x5<<10	/* Turnaround time*/
> > > > > > 
> > > > > >  		|0<<9 | 0<<8	/* [0:HNP disable,1:HNP
> > > > > > 
> > > > > > enable][ 0:SRP disable*/
> > > > > > 
> > > > > > @@ -413,8 +415,12 @@ static void reconfig_usbd(void)
> > > > > > 
> > > > > >  		|0<<6		/* 0: high speed utmi+,
> > > > > > 
> > > > > > 1: full speed serial*/ |0<<4		/* 0: utmi+,
> > > > > > 1:ulpi*/
> > > > > > 
> > > > > >  		|1<<3		/* phy i/f  0:8bit,
> > > > > > 
> > > > > > 1:16bit*/
> > > > > > 
> > > > > > -		|0x7<<0,	/* HS/FS Timeout**/
> > > > > > -		&reg->gusbcfg);
> > > > > > +		|0x7<<0;	/* HS/FS Timeout**/
> > > > > > +
> > > > > 
> > > > > "Interesting" comment style. And I'd remove 0x prefixes from
> > > > > constants <8...
> > > > 
> > > > Lukasz, what do you say to just convert those four boards to use
> > > > the gusbcfg platform data afterward ?
> > > 
> > > +1
> > > 
> > > It is a very good idea since we are using the same dwc2 IP block for
> > > host (./usb/host/dwc2.c) and device (s3c_hsotg).
> > 
> > Yep ... I'm just wondering if we should do that rename in the next MW.
> > If you're fine with this MW though, then I will do just that.
> > 
> > > > btw. you can find the latest version in u-boot-usb:topic/s3c-otg
> > > 
> > > I've read comments from Pavel and tested the code up till first
> > > build error :-).
> > 
> > I rewrote that branch, so feel free to use that as a base for your
> > testing. I will repost the corrected patches once I get feedback from
> > you.
> > 
> > Best regards,
> > Marek Vasut
> 
> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
> 
> Tested-by: Lukasz Majewski <l.majewski@samsung.com>
> 
> Test HW: Trats2 (Exynos4412)

Queued for master, thanks!

[U-Boot] [PATCH 5/5] arm: socfpga: Add example UDC config

[Marek Vasut]

Add example of an USB UDC configuration with DFU and UMS.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Vince Bridgers <vbridger@altera.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Lukasz Majewski <l.majewski@samsung.com>
---
 board/altera/socfpga/socfpga_cyclone5.c | 21 +++++++++++++++++++++
 include/configs/socfpga_common.h        | 30 +++++++++++++++++++++++++++++-
 2 files changed, 50 insertions(+), 1 deletion(-)

diff --git a/board/altera/socfpga/socfpga_cyclone5.c b/board/altera/socfpga/socfpga_cyclone5.c
index 0f81d89..ce625e5 100644
--- a/board/altera/socfpga/socfpga_cyclone5.c
+++ b/board/altera/socfpga/socfpga_cyclone5.c
@@ -8,6 +8,10 @@
 #include <asm/arch/reset_manager.h>
 #include <asm/io.h>
 
+#include <usb.h>
+#include <usb/s3c_udc.h>
+#include <usb_mass_storage.h>
+
 #include <netdev.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -39,3 +43,20 @@ int board_init(void)
 
 	return 0;
 }
+
+#ifdef CONFIG_USB_GADGET
+struct s3c_plat_otg_data socfpga_otg_data = {
+	.regs_otg	= CONFIG_USB_DWC2_REG_ADDR,
+	.usb_gusbcfg	= 0x1417,
+};
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+	return s3c_udc_probe(&socfpga_otg_data);
+}
+
+int g_dnl_board_usb_cable_connected(void)
+{
+	return 1;
+}
+#endif
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index 1df886b..9823be6 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -37,7 +37,7 @@
  */
 #define CONFIG_NR_DRAM_BANKS		1
 #define PHYS_SDRAM_1			0x0
-#define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)
+#define CONFIG_SYS_MALLOC_LEN		(64 * 1024 * 1024)
 #define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM_1
 #define CONFIG_SYS_MEMTEST_END		PHYS_SDRAM_1_SIZE
 
@@ -191,6 +191,34 @@
 #endif
 
 /*
+ * USB Gadget (DFU, UMS)
+ */
+#if defined(CONFIG_CMD_DFU) || defined(CONFIG_CMD_USB_MASS_STORAGE)
+#define CONFIG_USB_GADGET
+#define CONFIG_USB_GADGET_S3C_UDC_OTG
+#define CONFIG_USB_GADGET_DUALSPEED
+#define CONFIG_USB_GADGET_VBUS_DRAW	2
+
+/* USB Composite download gadget - g_dnl */
+#define CONFIG_USBDOWNLOAD_GADGET
+#define CONFIG_USB_GADGET_MASS_STORAGE
+
+#define CONFIG_DFU_FUNCTION
+#define CONFIG_DFU_MMC
+#define CONFIG_SYS_DFU_DATA_BUF_SIZE	(32 * 1024 * 1024)
+#define DFU_DEFAULT_POLL_TIMEOUT	300
+
+/* USB IDs */
+#define CONFIG_G_DNL_VENDOR_NUM		0x0525	/* NetChip */
+#define CONFIG_G_DNL_PRODUCT_NUM	0xA4A5	/* Linux-USB File-backed Storage Gadget */
+#define CONFIG_G_DNL_UMS_VENDOR_NUM	CONFIG_G_DNL_VENDOR_NUM
+#define CONFIG_G_DNL_UMS_PRODUCT_NUM	CONFIG_G_DNL_PRODUCT_NUM
+#ifndef CONFIG_G_DNL_MANUFACTURER
+#define CONFIG_G_DNL_MANUFACTURER	"Altera"
+#endif
+#endif
+
+/*
  * U-Boot environment
  */
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
-- 
2.0.0

[U-Boot] [PATCH 5/5] arm: socfpga: Add example UDC config

[Pavel Machek]

Hi!

> Add example of an USB UDC configuration with DFU and UMS.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Chin Liang See <clsee@altera.com>
> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> Cc: Vince Bridgers <vbridger@altera.com>
> Cc: Pavel Machek <pavel@denx.de>
> Cc: Stefan Roese <sr@denx.de>
> Cc: Lukasz Majewski <l.majewski@samsung.com>

> +/* USB IDs */
> +#define CONFIG_G_DNL_VENDOR_NUM		0x0525	/* NetChip */
> +#define CONFIG_G_DNL_PRODUCT_NUM	0xA4A5	/* Linux-USB File-backed Storage Gadget */


Will not this make NetChip rather angry?

									Pavel
-- 
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html

[U-Boot] [PATCH 5/5] arm: socfpga: Add example UDC config

[Marek Vasut]

On Tuesday, November 04, 2014 at 08:51:57 PM, Pavel Machek wrote:
> Hi!
> 
> > Add example of an USB UDC configuration with DFU and UMS.
> > 
> > Signed-off-by: Marek Vasut <marex@denx.de>
> > Cc: Chin Liang See <clsee@altera.com>
> > Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> > Cc: Vince Bridgers <vbridger@altera.com>
> > Cc: Pavel Machek <pavel@denx.de>
> > Cc: Stefan Roese <sr@denx.de>
> > Cc: Lukasz Majewski <l.majewski@samsung.com>
> > 
> > +/* USB IDs */
> > +#define CONFIG_G_DNL_VENDOR_NUM		0x0525	/* NetChip */
> > +#define CONFIG_G_DNL_PRODUCT_NUM	0xA4A5	/* Linux-USB File-backed Storage
> > Gadget */
> 
> Will not this make NetChip rather angry?

You mean that netchip which reserved this ID especially for free use ? No.

Best regards,
Marek Vasut

[U-Boot] [PATCH 5/5] arm: socfpga: Add example UDC config

[Pavel Machek]

On Tue 2014-11-04 21:09:38, Marek Vasut wrote:
> On Tuesday, November 04, 2014 at 08:51:57 PM, Pavel Machek wrote:
> > Hi!
> > 
> > > Add example of an USB UDC configuration with DFU and UMS.
> > > 
> > > Signed-off-by: Marek Vasut <marex@denx.de>
> > > Cc: Chin Liang See <clsee@altera.com>
> > > Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> > > Cc: Vince Bridgers <vbridger@altera.com>
> > > Cc: Pavel Machek <pavel@denx.de>
> > > Cc: Stefan Roese <sr@denx.de>
> > > Cc: Lukasz Majewski <l.majewski@samsung.com>
> > > 
> > > +/* USB IDs */
> > > +#define CONFIG_G_DNL_VENDOR_NUM		0x0525	/* NetChip */
> > > +#define CONFIG_G_DNL_PRODUCT_NUM	0xA4A5	/* Linux-USB File-backed Storage
> > > Gadget */
> > 
> > Will not this make NetChip rather angry?
> 
> You mean that netchip which reserved this ID especially for free use ? No.

Acked-by: Pavel Machek <pavel@denx.de>

-- 
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html

[U-Boot] [PATCH 5/5] arm: socfpga: Add example UDC config

[Lukasz Majewski]

Hi Marek,

> Add example of an USB UDC configuration with DFU and UMS.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Chin Liang See <clsee@altera.com>
> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> Cc: Vince Bridgers <vbridger@altera.com>
> Cc: Pavel Machek <pavel@denx.de>
> Cc: Stefan Roese <sr@denx.de>
> Cc: Lukasz Majewski <l.majewski@samsung.com>
> ---
>  board/altera/socfpga/socfpga_cyclone5.c | 21 +++++++++++++++++++++
>  include/configs/socfpga_common.h        | 30
> +++++++++++++++++++++++++++++- 2 files changed, 50 insertions(+), 1
> deletion(-)
> 
> diff --git a/board/altera/socfpga/socfpga_cyclone5.c
> b/board/altera/socfpga/socfpga_cyclone5.c index 0f81d89..ce625e5
> 100644 --- a/board/altera/socfpga/socfpga_cyclone5.c
> +++ b/board/altera/socfpga/socfpga_cyclone5.c
> @@ -8,6 +8,10 @@
>  #include <asm/arch/reset_manager.h>
>  #include <asm/io.h>
>  
> +#include <usb.h>
> +#include <usb/s3c_udc.h>
> +#include <usb_mass_storage.h>
> +
>  #include <netdev.h>
>  
>  DECLARE_GLOBAL_DATA_PTR;
> @@ -39,3 +43,20 @@ int board_init(void)
>  
>  	return 0;
>  }
> +
> +#ifdef CONFIG_USB_GADGET
> +struct s3c_plat_otg_data socfpga_otg_data = {
> +	.regs_otg	= CONFIG_USB_DWC2_REG_ADDR,
> +	.usb_gusbcfg	= 0x1417,
> +};
> +
> +int board_usb_init(int index, enum usb_init_type init)
> +{
> +	return s3c_udc_probe(&socfpga_otg_data);
> +}
> +
> +int g_dnl_board_usb_cable_connected(void)
> +{
> +	return 1;
> +}
> +#endif
> diff --git a/include/configs/socfpga_common.h
> b/include/configs/socfpga_common.h index 1df886b..9823be6 100644
> --- a/include/configs/socfpga_common.h
> +++ b/include/configs/socfpga_common.h
> @@ -37,7 +37,7 @@
>   */
>  #define CONFIG_NR_DRAM_BANKS		1
>  #define PHYS_SDRAM_1			0x0
> -#define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)
> +#define CONFIG_SYS_MALLOC_LEN		(64 * 1024 * 1024)
>  #define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM_1
>  #define CONFIG_SYS_MEMTEST_END		PHYS_SDRAM_1_SIZE
>  
> @@ -191,6 +191,34 @@
>  #endif
>  
>  /*
> + * USB Gadget (DFU, UMS)
> + */
> +#if defined(CONFIG_CMD_DFU) || defined(CONFIG_CMD_USB_MASS_STORAGE)
> +#define CONFIG_USB_GADGET
> +#define CONFIG_USB_GADGET_S3C_UDC_OTG
> +#define CONFIG_USB_GADGET_DUALSPEED
> +#define CONFIG_USB_GADGET_VBUS_DRAW	2
> +
> +/* USB Composite download gadget - g_dnl */
> +#define CONFIG_USBDOWNLOAD_GADGET
> +#define CONFIG_USB_GADGET_MASS_STORAGE
> +
> +#define CONFIG_DFU_FUNCTION
> +#define CONFIG_DFU_MMC
> +#define CONFIG_SYS_DFU_DATA_BUF_SIZE	(32 * 1024 * 1024)
> +#define DFU_DEFAULT_POLL_TIMEOUT	300
> +
> +/* USB IDs */
> +#define CONFIG_G_DNL_VENDOR_NUM		0x0525	/*
> NetChip */ +#define CONFIG_G_DNL_PRODUCT_NUM	0xA4A5	/*
> Linux-USB File-backed Storage Gadget */ +#define
> CONFIG_G_DNL_UMS_VENDOR_NUM	CONFIG_G_DNL_VENDOR_NUM +#define
> CONFIG_G_DNL_UMS_PRODUCT_NUM	CONFIG_G_DNL_PRODUCT_NUM +#ifndef
> CONFIG_G_DNL_MANUFACTURER +#define
> CONFIG_G_DNL_MANUFACTURER	"Altera" +#endif
> +#endif
> +
> +/*
>   * U-Boot environment
>   */
>  #define CONFIG_SYS_CONSOLE_IS_IN_ENV

Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>

-- 
Best regards,

Lukasz Majewski

Samsung R&D Institute Poland (SRPOL) | Linux Platform Group

[U-Boot] [PATCH 5/5] arm: socfpga: Add example UDC config

[Marek Vasut]

On Friday, November 07, 2014 at 03:40:00 PM, Lukasz Majewski wrote:
> Hi Marek,
[...]
> > + * USB Gadget (DFU, UMS)
> > + */
> > +#if defined(CONFIG_CMD_DFU) || defined(CONFIG_CMD_USB_MASS_STORAGE)
> > +#define CONFIG_USB_GADGET
> > +#define CONFIG_USB_GADGET_S3C_UDC_OTG
> > +#define CONFIG_USB_GADGET_DUALSPEED
> > +#define CONFIG_USB_GADGET_VBUS_DRAW	2
> > +
> > +/* USB Composite download gadget - g_dnl */
> > +#define CONFIG_USBDOWNLOAD_GADGET
> > +#define CONFIG_USB_GADGET_MASS_STORAGE
> > +
> > +#define CONFIG_DFU_FUNCTION
> > +#define CONFIG_DFU_MMC
> > +#define CONFIG_SYS_DFU_DATA_BUF_SIZE	(32 * 1024 * 1024)
> > +#define DFU_DEFAULT_POLL_TIMEOUT	300
> > +
> > +/* USB IDs */
> > +#define CONFIG_G_DNL_VENDOR_NUM		0x0525	/*
> > NetChip */ +#define CONFIG_G_DNL_PRODUCT_NUM	0xA4A5	/*
> > Linux-USB File-backed Storage Gadget */ +#define
> > CONFIG_G_DNL_UMS_VENDOR_NUM	CONFIG_G_DNL_VENDOR_NUM +#define
> > CONFIG_G_DNL_UMS_PRODUCT_NUM	CONFIG_G_DNL_PRODUCT_NUM +#ifndef
> > CONFIG_G_DNL_MANUFACTURER +#define
> > CONFIG_G_DNL_MANUFACTURER	"Altera" +#endif
> > +#endif
> > +
> > +/*
> > 
> >   * U-Boot environment
> >   */
> >  
> >  #define CONFIG_SYS_CONSOLE_IS_IN_ENV
> 
> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>

Thanks!

> Tested-by: Lukasz Majewski <l.majewski@samsung.com>

Wow, do you have an SoCFPGA now ? :)

Best regards,
Marek Vasut

[U-Boot] [PATCH 5/5] arm: socfpga: Add example UDC config

[Lukasz Majewski]

Hi Marek,

> On Friday, November 07, 2014 at 03:40:00 PM, Lukasz Majewski wrote:
> > Hi Marek,
> [...]
> > > + * USB Gadget (DFU, UMS)
> > > + */
> > > +#if defined(CONFIG_CMD_DFU) ||
> > > defined(CONFIG_CMD_USB_MASS_STORAGE) +#define CONFIG_USB_GADGET
> > > +#define CONFIG_USB_GADGET_S3C_UDC_OTG
> > > +#define CONFIG_USB_GADGET_DUALSPEED
> > > +#define CONFIG_USB_GADGET_VBUS_DRAW	2
> > > +
> > > +/* USB Composite download gadget - g_dnl */
> > > +#define CONFIG_USBDOWNLOAD_GADGET
> > > +#define CONFIG_USB_GADGET_MASS_STORAGE
> > > +
> > > +#define CONFIG_DFU_FUNCTION
> > > +#define CONFIG_DFU_MMC
> > > +#define CONFIG_SYS_DFU_DATA_BUF_SIZE	(32 * 1024 * 1024)
> > > +#define DFU_DEFAULT_POLL_TIMEOUT	300
> > > +
> > > +/* USB IDs */
> > > +#define CONFIG_G_DNL_VENDOR_NUM		0x0525	/*
> > > NetChip */ +#define CONFIG_G_DNL_PRODUCT_NUM
> > > 0xA4A5	/* Linux-USB File-backed Storage Gadget */ +#define
> > > CONFIG_G_DNL_UMS_VENDOR_NUM	CONFIG_G_DNL_VENDOR_NUM
> > > +#define CONFIG_G_DNL_UMS_PRODUCT_NUM
> > > CONFIG_G_DNL_PRODUCT_NUM +#ifndef CONFIG_G_DNL_MANUFACTURER
> > > +#define CONFIG_G_DNL_MANUFACTURER	"Altera" +#endif
> > > +#endif
> > > +
> > > +/*
> > > 
> > >   * U-Boot environment
> > >   */
> > >  
> > >  #define CONFIG_SYS_CONSOLE_IS_IN_ENV
> > 
> > Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
> 
> Thanks!
> 
> > Tested-by: Lukasz Majewski <l.majewski@samsung.com>
> 
> Wow, do you have an SoCFPGA now ? :)

Nope, but I've tested the patch to be 100% sure :-) (as it was the last
one)

> 
> Best regards,
> Marek Vasut



-- 
Best regards,

Lukasz Majewski

Samsung R&D Institute Poland (SRPOL) | Linux Platform Group

[U-Boot] [PATCH 5/5] arm: socfpga: Add example UDC config

[Marek Vasut]

On Friday, November 07, 2014 at 04:28:10 PM, Lukasz Majewski wrote:
> Hi Marek,
> 
> > On Friday, November 07, 2014 at 03:40:00 PM, Lukasz Majewski wrote:
> > > Hi Marek,
> > 
> > [...]
> > 
> > > > + * USB Gadget (DFU, UMS)
> > > > + */
> > > > +#if defined(CONFIG_CMD_DFU) ||
> > > > defined(CONFIG_CMD_USB_MASS_STORAGE) +#define CONFIG_USB_GADGET
> > > > +#define CONFIG_USB_GADGET_S3C_UDC_OTG
> > > > +#define CONFIG_USB_GADGET_DUALSPEED
> > > > +#define CONFIG_USB_GADGET_VBUS_DRAW	2
> > > > +
> > > > +/* USB Composite download gadget - g_dnl */
> > > > +#define CONFIG_USBDOWNLOAD_GADGET
> > > > +#define CONFIG_USB_GADGET_MASS_STORAGE
> > > > +
> > > > +#define CONFIG_DFU_FUNCTION
> > > > +#define CONFIG_DFU_MMC
> > > > +#define CONFIG_SYS_DFU_DATA_BUF_SIZE	(32 * 1024 * 1024)
> > > > +#define DFU_DEFAULT_POLL_TIMEOUT	300
> > > > +
> > > > +/* USB IDs */
> > > > +#define CONFIG_G_DNL_VENDOR_NUM		0x0525	/*
> > > > NetChip */ +#define CONFIG_G_DNL_PRODUCT_NUM
> > > > 0xA4A5	/* Linux-USB File-backed Storage Gadget */ +#define
> > > > CONFIG_G_DNL_UMS_VENDOR_NUM	CONFIG_G_DNL_VENDOR_NUM
> > > > +#define CONFIG_G_DNL_UMS_PRODUCT_NUM
> > > > CONFIG_G_DNL_PRODUCT_NUM +#ifndef CONFIG_G_DNL_MANUFACTURER
> > > > +#define CONFIG_G_DNL_MANUFACTURER	"Altera" +#endif
> > > > +#endif
> > > > +
> > > > +/*
> > > > 
> > > >   * U-Boot environment
> > > >   */
> > > >  
> > > >  #define CONFIG_SYS_CONSOLE_IS_IN_ENV
> > > 
> > > Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
> > 
> > Thanks!
> > 
> > > Tested-by: Lukasz Majewski <l.majewski@samsung.com>
> > 
> > Wow, do you have an SoCFPGA now ? :)
> 
> Nope, but I've tested the patch to be 100% sure :-) (as it was the last
> one)

Thanks!

Best regards,
Marek Vasut

[U-Boot] [PATCH 5/5] arm: socfpga: Add example UDC config

[Marek Vasut]

On Friday, November 07, 2014 at 03:40:00 PM, Lukasz Majewski wrote:
> Hi Marek,
> 
> > Add example of an USB UDC configuration with DFU and UMS.
> > 
> > Signed-off-by: Marek Vasut <marex@denx.de>
> > Cc: Chin Liang See <clsee@altera.com>
> > Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> > Cc: Vince Bridgers <vbridger@altera.com>
> > Cc: Pavel Machek <pavel@denx.de>
> > Cc: Stefan Roese <sr@denx.de>
> > Cc: Lukasz Majewski <l.majewski@samsung.com>
> > ---
> > 
> >  board/altera/socfpga/socfpga_cyclone5.c | 21 +++++++++++++++++++++
> >  include/configs/socfpga_common.h        | 30
> > 
> > +++++++++++++++++++++++++++++- 2 files changed, 50 insertions(+), 1
> > deletion(-)
> > 
> > diff --git a/board/altera/socfpga/socfpga_cyclone5.c
> > b/board/altera/socfpga/socfpga_cyclone5.c index 0f81d89..ce625e5
> > 100644 --- a/board/altera/socfpga/socfpga_cyclone5.c
> > +++ b/board/altera/socfpga/socfpga_cyclone5.c
> > @@ -8,6 +8,10 @@
> > 
> >  #include <asm/arch/reset_manager.h>
> >  #include <asm/io.h>
> > 
> > +#include <usb.h>
> > +#include <usb/s3c_udc.h>
> > +#include <usb_mass_storage.h>
> > +
> > 
> >  #include <netdev.h>
> >  
> >  DECLARE_GLOBAL_DATA_PTR;
> > 
> > @@ -39,3 +43,20 @@ int board_init(void)
> > 
> >  	return 0;
> >  
> >  }
> > 
> > +
> > +#ifdef CONFIG_USB_GADGET
> > +struct s3c_plat_otg_data socfpga_otg_data = {
> > +	.regs_otg	= CONFIG_USB_DWC2_REG_ADDR,
> > +	.usb_gusbcfg	= 0x1417,
> > +};
> > +
> > +int board_usb_init(int index, enum usb_init_type init)
> > +{
> > +	return s3c_udc_probe(&socfpga_otg_data);
> > +}
> > +
> > +int g_dnl_board_usb_cable_connected(void)
> > +{
> > +	return 1;
> > +}
> > +#endif
> > diff --git a/include/configs/socfpga_common.h
> > b/include/configs/socfpga_common.h index 1df886b..9823be6 100644
> > --- a/include/configs/socfpga_common.h
> > +++ b/include/configs/socfpga_common.h
> > @@ -37,7 +37,7 @@
> > 
> >   */
> >  
> >  #define CONFIG_NR_DRAM_BANKS		1
> >  #define PHYS_SDRAM_1			0x0
> > 
> > -#define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)
> > +#define CONFIG_SYS_MALLOC_LEN		(64 * 1024 * 1024)
> > 
> >  #define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM_1
> >  #define CONFIG_SYS_MEMTEST_END		PHYS_SDRAM_1_SIZE
> > 
> > @@ -191,6 +191,34 @@
> > 
> >  #endif
> >  
> >  /*
> > 
> > + * USB Gadget (DFU, UMS)
> > + */
> > +#if defined(CONFIG_CMD_DFU) || defined(CONFIG_CMD_USB_MASS_STORAGE)
> > +#define CONFIG_USB_GADGET
> > +#define CONFIG_USB_GADGET_S3C_UDC_OTG
> > +#define CONFIG_USB_GADGET_DUALSPEED
> > +#define CONFIG_USB_GADGET_VBUS_DRAW	2
> > +
> > +/* USB Composite download gadget - g_dnl */
> > +#define CONFIG_USBDOWNLOAD_GADGET
> > +#define CONFIG_USB_GADGET_MASS_STORAGE
> > +
> > +#define CONFIG_DFU_FUNCTION
> > +#define CONFIG_DFU_MMC
> > +#define CONFIG_SYS_DFU_DATA_BUF_SIZE	(32 * 1024 * 1024)
> > +#define DFU_DEFAULT_POLL_TIMEOUT	300
> > +
> > +/* USB IDs */
> > +#define CONFIG_G_DNL_VENDOR_NUM		0x0525	/*
> > NetChip */ +#define CONFIG_G_DNL_PRODUCT_NUM	0xA4A5	/*
> > Linux-USB File-backed Storage Gadget */ +#define
> > CONFIG_G_DNL_UMS_VENDOR_NUM	CONFIG_G_DNL_VENDOR_NUM +#define
> > CONFIG_G_DNL_UMS_PRODUCT_NUM	CONFIG_G_DNL_PRODUCT_NUM +#ifndef
> > CONFIG_G_DNL_MANUFACTURER +#define
> > CONFIG_G_DNL_MANUFACTURER	"Altera" +#endif
> > +#endif
> > +
> > +/*
> > 
> >   * U-Boot environment
> >   */
> >  
> >  #define CONFIG_SYS_CONSOLE_IS_IN_ENV
> 
> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
> Tested-by: Lukasz Majewski <l.majewski@samsung.com>

Queued for master, thanks!

[U-Boot] [PATCH 1/5] usb: s3c-otg: Remove useless include

[Pavel Machek]

On Tue 2014-11-04 06:07:30, Marek Vasut wrote:
> Remove the useless inclusion of arch/arm/gpio.h , which is completely
> bogus in this driver.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Chin Liang See <clsee@altera.com>
> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> Cc: Vince Bridgers <vbridger@altera.com>

Acked-by: Pavel Machek <pavel@denx.de>

-- 
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html

[U-Boot] [PATCH 1/5] usb: s3c-otg: Remove useless include

[Lukasz Majewski]

Hi Marek,

> Remove the useless inclusion of arch/arm/gpio.h , which is completely
> bogus in this driver.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Chin Liang See <clsee@altera.com>
> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> Cc: Vince Bridgers <vbridger@altera.com>
> Cc: Pavel Machek <pavel@denx.de>
> Cc: Stefan Roese <sr@denx.de>
> Cc: Lukasz Majewski <l.majewski@samsung.com>
> ---
>  drivers/usb/gadget/s3c_udc_otg.c | 1 -
>  1 file changed, 1 deletion(-)
> 
> diff --git a/drivers/usb/gadget/s3c_udc_otg.c
> b/drivers/usb/gadget/s3c_udc_otg.c index b9816df..7508b1a 100644
> --- a/drivers/usb/gadget/s3c_udc_otg.c
> +++ b/drivers/usb/gadget/s3c_udc_otg.c
> @@ -31,7 +31,6 @@
>  #include <asm/io.h>
>  
>  #include <asm/mach-types.h>
> -#include <asm/arch/gpio.h>
>  
>  #include "regs-otg.h"
>  #include <usb/lin_gadget_compat.h>

Acked-by: Lukasz Majewski <l.majewski@samsung.com>

-- 
Best regards,

Lukasz Majewski

Samsung R&D Institute Poland (SRPOL) | Linux Platform Group