* [U-Boot] [PATCH 01/19] x86: Add a definition of asmlinkage
2014-11-15 3:56 [U-Boot] [PATCH 0/19] x86: ivybridge: Add graphics support Simon Glass
@ 2014-11-15 3:56 ` Simon Glass
2014-11-25 21:48 ` Simon Glass
2014-11-15 3:56 ` [U-Boot] [PATCH 02/19] Introduce a header file for the BIOS emulator Simon Glass
` (17 subsequent siblings)
18 siblings, 1 reply; 40+ messages in thread
From: Simon Glass @ 2014-11-15 3:56 UTC (permalink / raw)
To: u-boot
This is needed to permit calling C from assembler without too much pain.
Add a definition for x86.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
include/common.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/common.h b/include/common.h
index 28fba79..d02e42b 100644
--- a/include/common.h
+++ b/include/common.h
@@ -72,6 +72,9 @@ typedef volatile unsigned char vu_char;
#ifdef CONFIG_ARM
#define asmlinkage /* nothing */
#endif
+#ifdef CONFIG_X86
+#define asmlinkage __attribute__((regparm(0)))
+#endif
#ifdef CONFIG_BLACKFIN
#include <asm/blackfin.h>
#endif
--
2.1.0.rc2.206.gedb03e5
^ permalink raw reply related [flat|nested] 40+ messages in thread* [U-Boot] [PATCH 02/19] Introduce a header file for the BIOS emulator
2014-11-15 3:56 [U-Boot] [PATCH 0/19] x86: ivybridge: Add graphics support Simon Glass
2014-11-15 3:56 ` [U-Boot] [PATCH 01/19] x86: Add a definition of asmlinkage Simon Glass
@ 2014-11-15 3:56 ` Simon Glass
2014-11-25 21:49 ` Simon Glass
2014-11-15 3:56 ` [U-Boot] [PATCH 03/19] x86: Add GDT descriptors for option ROMs Simon Glass
` (16 subsequent siblings)
18 siblings, 1 reply; 40+ messages in thread
From: Simon Glass @ 2014-11-15 3:56 UTC (permalink / raw)
To: u-boot
We should have a public header so that users can avoid defining functions
themselves.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
drivers/bios_emulator/include/biosemu.h | 53 ++-------------------------------
drivers/video/ati_radeon_fb.c | 2 +-
include/bios_emul.h | 43 ++++++++++++++++++++++++++
3 files changed, 46 insertions(+), 52 deletions(-)
create mode 100644 include/bios_emul.h
diff --git a/drivers/bios_emulator/include/biosemu.h b/drivers/bios_emulator/include/biosemu.h
index e92e96e..124d79d 100644
--- a/drivers/bios_emulator/include/biosemu.h
+++ b/drivers/bios_emulator/include/biosemu.h
@@ -43,6 +43,8 @@
#ifndef __BIOSEMU_H
#define __BIOSEMU_H
+#include <bios_emul.h>
+
#ifdef __KERNEL__
#include "x86emu.h"
#else
@@ -55,57 +57,6 @@
#pragma pack(1)
-#ifndef __KERNEL__
-/****************************************************************************
-REMARKS:
-Data structure used to describe the details specific to a particular VGA
-controller. This information is used to allow the VGA controller to be
-swapped on the fly within the BIOS emulator.
-
-HEADER:
-biosemu.h
-
-MEMBERS:
-pciInfo - PCI device information block for the controller
-BIOSImage - Pointer to a read/write copy of the BIOS image
-BIOSImageLen - Length of the BIOS image
-LowMem - Copy of key low memory areas
-****************************************************************************/
-typedef struct {
- PCIDeviceInfo *pciInfo;
- void *BIOSImage;
- ulong BIOSImageLen;
- uchar LowMem[1536];
-} BE_VGAInfo;
-#else
-/****************************************************************************
-REMARKS:
-Data structure used to describe the details for the BIOS emulator system
-environment as used by the X86 emulator library.
-
-HEADER:
-biosemu.h
-
-MEMBERS:
-vgaInfo - VGA BIOS information structure
-biosmem_base - Base of the BIOS image
-biosmem_limit - Limit of the BIOS image
-busmem_base - Base of the VGA bus memory
-****************************************************************************/
-typedef struct {
- int function;
- int device;
- int bus;
- u32 VendorID;
- u32 DeviceID;
- pci_dev_t pcidev;
- void *BIOSImage;
- u32 BIOSImageLen;
- u8 LowMem[1536];
-} BE_VGAInfo;
-
-#endif /* __KERNEL__ */
-
#define CRT_C 24 /* 24 CRT Controller Registers */
#define ATT_C 21 /* 21 Attribute Controller Registers */
#define GRA_C 9 /* 9 Graphics Controller Registers */
diff --git a/drivers/video/ati_radeon_fb.c b/drivers/video/ati_radeon_fb.c
index 38d2eb1..cbf4900 100644
--- a/drivers/video/ati_radeon_fb.c
+++ b/drivers/video/ati_radeon_fb.c
@@ -19,6 +19,7 @@
#include <common.h>
#include <command.h>
+#include <bios_emul.h>
#include <pci.h>
#include <asm/processor.h>
#include <asm/errno.h>
@@ -549,7 +550,6 @@ void radeon_setmode_9200(int vesa_idx, int bpp)
}
#include "../bios_emulator/include/biosemu.h"
-extern int BootVideoCardBIOS(pci_dev_t pcidev, BE_VGAInfo ** pVGAInfo, int cleanUp);
int radeon_probe(struct radeonfb_info *rinfo)
{
diff --git a/include/bios_emul.h b/include/bios_emul.h
new file mode 100644
index 0000000..35d1ff3
--- /dev/null
+++ b/include/bios_emul.h
@@ -0,0 +1,43 @@
+/*
+ * Copyright (C) 1996-1999 SciTech Software, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#ifndef _BIOS_EMUL_H
+#define _BIOS_EMUL_H
+
+/* Include the register header directly here */
+#include "../drivers/bios_emulator/include/x86emu/regs.h"
+
+/****************************************************************************
+REMARKS:
+Data structure used to describe the details for the BIOS emulator system
+environment as used by the X86 emulator library.
+
+HEADER:
+biosemu.h
+
+MEMBERS:
+vgaInfo - VGA BIOS information structure
+biosmem_base - Base of the BIOS image
+biosmem_limit - Limit of the BIOS image
+busmem_base - Base of the VGA bus memory
+****************************************************************************/
+typedef struct {
+ int function;
+ int device;
+ int bus;
+ u32 VendorID;
+ u32 DeviceID;
+ pci_dev_t pcidev;
+ void *BIOSImage;
+ u32 BIOSImageLen;
+ u8 LowMem[1536];
+} BE_VGAInfo;
+
+struct vbe_mode_info;
+
+int BootVideoCardBIOS(pci_dev_t pcidev, BE_VGAInfo **pVGAInfo, int cleanUp);
+
+#endif
--
2.1.0.rc2.206.gedb03e5
^ permalink raw reply related [flat|nested] 40+ messages in thread* [U-Boot] [PATCH 02/19] Introduce a header file for the BIOS emulator
2014-11-15 3:56 ` [U-Boot] [PATCH 02/19] Introduce a header file for the BIOS emulator Simon Glass
@ 2014-11-25 21:49 ` Simon Glass
0 siblings, 0 replies; 40+ messages in thread
From: Simon Glass @ 2014-11-25 21:49 UTC (permalink / raw)
To: u-boot
On 14 November 2014 at 20:56, Simon Glass <sjg@chromium.org> wrote:
> We should have a public header so that users can avoid defining functions
> themselves.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
>
> drivers/bios_emulator/include/biosemu.h | 53 ++-------------------------------
> drivers/video/ati_radeon_fb.c | 2 +-
> include/bios_emul.h | 43 ++++++++++++++++++++++++++
> 3 files changed, 46 insertions(+), 52 deletions(-)
> create mode 100644 include/bios_emul.h
Applied to u-boot-x86.
^ permalink raw reply [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH 03/19] x86: Add GDT descriptors for option ROMs
2014-11-15 3:56 [U-Boot] [PATCH 0/19] x86: ivybridge: Add graphics support Simon Glass
2014-11-15 3:56 ` [U-Boot] [PATCH 01/19] x86: Add a definition of asmlinkage Simon Glass
2014-11-15 3:56 ` [U-Boot] [PATCH 02/19] Introduce a header file for the BIOS emulator Simon Glass
@ 2014-11-15 3:56 ` Simon Glass
2014-11-25 21:49 ` Simon Glass
2014-11-15 3:56 ` [U-Boot] [PATCH 04/19] x86: Add vesa mode configuration options Simon Glass
` (15 subsequent siblings)
18 siblings, 1 reply; 40+ messages in thread
From: Simon Glass @ 2014-11-15 3:56 UTC (permalink / raw)
To: u-boot
Option ROMs require a few additional descriptors. Add these, and remove the
enum since we now have to access several descriptors from assembler.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
arch/x86/cpu/cpu.c | 9 ++++++---
arch/x86/include/asm/processor.h | 31 ++++++++++++-------------------
2 files changed, 18 insertions(+), 22 deletions(-)
diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index b391b7a..8292c48 100644
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -124,7 +124,7 @@ static void load_gdt(const u64 *boot_gdt, u16 num_entries)
{
struct gdt_ptr gdt;
- gdt.len = (num_entries * 8) - 1;
+ gdt.len = (num_entries * X86_GDT_ENTRY_SIZE) - 1;
gdt.ptr = (u32)boot_gdt;
asm volatile("lgdtl %0\n" : : "m" (gdt));
@@ -144,10 +144,13 @@ void setup_gdt(gd_t *id, u64 *gdt_addr)
(ulong)&id->arch.gd_addr, 0xfffff);
/* 16-bit CS: code, read/execute, 64 kB, base 0 */
- gdt_addr[X86_GDT_ENTRY_16BIT_CS] = GDT_ENTRY(0x109b, 0, 0x0ffff);
+ gdt_addr[X86_GDT_ENTRY_16BIT_CS] = GDT_ENTRY(0x009b, 0, 0x0ffff);
/* 16-bit DS: data, read/write, 64 kB, base 0 */
- gdt_addr[X86_GDT_ENTRY_16BIT_DS] = GDT_ENTRY(0x1093, 0, 0x0ffff);
+ gdt_addr[X86_GDT_ENTRY_16BIT_DS] = GDT_ENTRY(0x0093, 0, 0x0ffff);
+
+ gdt_addr[X86_GDT_ENTRY_16BIT_FLAT_CS] = GDT_ENTRY(0x809b, 0, 0xfffff);
+ gdt_addr[X86_GDT_ENTRY_16BIT_FLAT_DS] = GDT_ENTRY(0x8093, 0, 0xfffff);
load_gdt(gdt_addr, X86_GDT_NUM_ENTRIES);
load_ds(X86_GDT_ENTRY_32BIT_DS);
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index b9317cb..3e26202 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -8,25 +8,18 @@
#ifndef __ASM_PROCESSOR_H_
#define __ASM_PROCESSOR_H_ 1
-#define X86_GDT_ENTRY_SIZE 8
-
-#ifndef __ASSEMBLY__
-
-enum {
- X86_GDT_ENTRY_NULL = 0,
- X86_GDT_ENTRY_UNUSED,
- X86_GDT_ENTRY_32BIT_CS,
- X86_GDT_ENTRY_32BIT_DS,
- X86_GDT_ENTRY_32BIT_FS,
- X86_GDT_ENTRY_16BIT_CS,
- X86_GDT_ENTRY_16BIT_DS,
- X86_GDT_NUM_ENTRIES
-};
-#else
-/* NOTE: If the above enum is modified, this define must be checked */
-#define X86_GDT_ENTRY_32BIT_DS 3
-#define X86_GDT_NUM_ENTRIES 7
-#endif
+#define X86_GDT_ENTRY_SIZE 8
+
+#define X86_GDT_ENTRY_NULL 0
+#define X86_GDT_ENTRY_UNUSED 1
+#define X86_GDT_ENTRY_32BIT_CS 2
+#define X86_GDT_ENTRY_32BIT_DS 3
+#define X86_GDT_ENTRY_32BIT_FS 4
+#define X86_GDT_ENTRY_16BIT_CS 5
+#define X86_GDT_ENTRY_16BIT_DS 6
+#define X86_GDT_ENTRY_16BIT_FLAT_CS 7
+#define X86_GDT_ENTRY_16BIT_FLAT_DS 8
+#define X86_GDT_NUM_ENTRIES 9
#define X86_GDT_SIZE (X86_GDT_NUM_ENTRIES * X86_GDT_ENTRY_SIZE)
--
2.1.0.rc2.206.gedb03e5
^ permalink raw reply related [flat|nested] 40+ messages in thread* [U-Boot] [PATCH 04/19] x86: Add vesa mode configuration options
2014-11-15 3:56 [U-Boot] [PATCH 0/19] x86: ivybridge: Add graphics support Simon Glass
` (2 preceding siblings ...)
2014-11-15 3:56 ` [U-Boot] [PATCH 03/19] x86: Add GDT descriptors for option ROMs Simon Glass
@ 2014-11-15 3:56 ` Simon Glass
2014-11-25 21:49 ` Simon Glass
2014-11-15 3:56 ` [U-Boot] [PATCH 05/19] Add support for Vesa BIOS extensions Simon Glass
` (14 subsequent siblings)
18 siblings, 1 reply; 40+ messages in thread
From: Simon Glass @ 2014-11-15 3:56 UTC (permalink / raw)
To: u-boot
Add Kconfig options to allow selection of a vesa mode on x86 machines.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
arch/x86/Kconfig | 149 +++++++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 149 insertions(+)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 6e29868..4f5ce38 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -83,6 +83,155 @@ config X86_RAMTEST
to work correctly. It is not exhaustive but can save time by
detecting obvious failures.
+config MARK_GRAPHICS_MEM_WRCOMB
+ bool "Mark graphics memory as write-combining."
+ default n
+ help
+ The graphics performance may increase if the graphics
+ memory is set as write-combining cache type. This option
+ enables marking the graphics memory as write-combining.
+
+menu "Display"
+
+config FRAMEBUFFER_SET_VESA_MODE
+ prompt "Set framebuffer graphics resolution"
+ bool
+ help
+ Set VESA/native framebuffer mode (needed for bootsplash and graphical framebuffer console)
+
+choice
+ prompt "framebuffer graphics resolution"
+ default FRAMEBUFFER_VESA_MODE_117
+ depends on FRAMEBUFFER_SET_VESA_MODE
+ help
+ This option sets the resolution used for the coreboot framebuffer (and
+ bootsplash screen).
+
+config FRAMEBUFFER_VESA_MODE_100
+ bool "640x400 256-color"
+
+config FRAMEBUFFER_VESA_MODE_101
+ bool "640x480 256-color"
+
+config FRAMEBUFFER_VESA_MODE_102
+ bool "800x600 16-color"
+
+config FRAMEBUFFER_VESA_MODE_103
+ bool "800x600 256-color"
+
+config FRAMEBUFFER_VESA_MODE_104
+ bool "1024x768 16-color"
+
+config FRAMEBUFFER_VESA_MODE_105
+ bool "1024x7686 256-color"
+
+config FRAMEBUFFER_VESA_MODE_106
+ bool "1280x1024 16-color"
+
+config FRAMEBUFFER_VESA_MODE_107
+ bool "1280x1024 256-color"
+
+config FRAMEBUFFER_VESA_MODE_108
+ bool "80x60 text"
+
+config FRAMEBUFFER_VESA_MODE_109
+ bool "132x25 text"
+
+config FRAMEBUFFER_VESA_MODE_10A
+ bool "132x43 text"
+
+config FRAMEBUFFER_VESA_MODE_10B
+ bool "132x50 text"
+
+config FRAMEBUFFER_VESA_MODE_10C
+ bool "132x60 text"
+
+config FRAMEBUFFER_VESA_MODE_10D
+ bool "320x200 32k-color (1:5:5:5)"
+
+config FRAMEBUFFER_VESA_MODE_10E
+ bool "320x200 64k-color (5:6:5)"
+
+config FRAMEBUFFER_VESA_MODE_10F
+ bool "320x200 16.8M-color (8:8:8)"
+
+config FRAMEBUFFER_VESA_MODE_110
+ bool "640x480 32k-color (1:5:5:5)"
+
+config FRAMEBUFFER_VESA_MODE_111
+ bool "640x480 64k-color (5:6:5)"
+
+config FRAMEBUFFER_VESA_MODE_112
+ bool "640x480 16.8M-color (8:8:8)"
+
+config FRAMEBUFFER_VESA_MODE_113
+ bool "800x600 32k-color (1:5:5:5)"
+
+config FRAMEBUFFER_VESA_MODE_114
+ bool "800x600 64k-color (5:6:5)"
+
+config FRAMEBUFFER_VESA_MODE_115
+ bool "800x600 16.8M-color (8:8:8)"
+
+config FRAMEBUFFER_VESA_MODE_116
+ bool "1024x768 32k-color (1:5:5:5)"
+
+config FRAMEBUFFER_VESA_MODE_117
+ bool "1024x768 64k-color (5:6:5)"
+
+config FRAMEBUFFER_VESA_MODE_118
+ bool "1024x768 16.8M-color (8:8:8)"
+
+config FRAMEBUFFER_VESA_MODE_119
+ bool "1280x1024 32k-color (1:5:5:5)"
+
+config FRAMEBUFFER_VESA_MODE_11A
+ bool "1280x1024 64k-color (5:6:5)"
+
+config FRAMEBUFFER_VESA_MODE_11B
+ bool "1280x1024 16.8M-color (8:8:8)"
+
+config FRAMEBUFFER_VESA_MODE_USER
+ bool "Manually select VESA mode"
+
+endchoice
+
+# Map the config names to an integer (KB).
+config FRAMEBUFFER_VESA_MODE
+ prompt "VESA mode" if FRAMEBUFFER_VESA_MODE_USER
+ hex
+ default 0x100 if FRAMEBUFFER_VESA_MODE_100
+ default 0x101 if FRAMEBUFFER_VESA_MODE_101
+ default 0x102 if FRAMEBUFFER_VESA_MODE_102
+ default 0x103 if FRAMEBUFFER_VESA_MODE_103
+ default 0x104 if FRAMEBUFFER_VESA_MODE_104
+ default 0x105 if FRAMEBUFFER_VESA_MODE_105
+ default 0x106 if FRAMEBUFFER_VESA_MODE_106
+ default 0x107 if FRAMEBUFFER_VESA_MODE_107
+ default 0x108 if FRAMEBUFFER_VESA_MODE_108
+ default 0x109 if FRAMEBUFFER_VESA_MODE_109
+ default 0x10A if FRAMEBUFFER_VESA_MODE_10A
+ default 0x10B if FRAMEBUFFER_VESA_MODE_10B
+ default 0x10C if FRAMEBUFFER_VESA_MODE_10C
+ default 0x10D if FRAMEBUFFER_VESA_MODE_10D
+ default 0x10E if FRAMEBUFFER_VESA_MODE_10E
+ default 0x10F if FRAMEBUFFER_VESA_MODE_10F
+ default 0x110 if FRAMEBUFFER_VESA_MODE_110
+ default 0x111 if FRAMEBUFFER_VESA_MODE_111
+ default 0x112 if FRAMEBUFFER_VESA_MODE_112
+ default 0x113 if FRAMEBUFFER_VESA_MODE_113
+ default 0x114 if FRAMEBUFFER_VESA_MODE_114
+ default 0x115 if FRAMEBUFFER_VESA_MODE_115
+ default 0x116 if FRAMEBUFFER_VESA_MODE_116
+ default 0x117 if FRAMEBUFFER_VESA_MODE_117
+ default 0x118 if FRAMEBUFFER_VESA_MODE_118
+ default 0x119 if FRAMEBUFFER_VESA_MODE_119
+ default 0x11A if FRAMEBUFFER_VESA_MODE_11A
+ default 0x11B if FRAMEBUFFER_VESA_MODE_11B
+ default 0x117 if FRAMEBUFFER_VESA_MODE_USER
+
+endmenu
+
source "arch/x86/cpu/ivybridge/Kconfig"
source "board/coreboot/coreboot/Kconfig"
--
2.1.0.rc2.206.gedb03e5
^ permalink raw reply related [flat|nested] 40+ messages in thread* [U-Boot] [PATCH 05/19] Add support for Vesa BIOS extensions
2014-11-15 3:56 [U-Boot] [PATCH 0/19] x86: ivybridge: Add graphics support Simon Glass
` (3 preceding siblings ...)
2014-11-15 3:56 ` [U-Boot] [PATCH 04/19] x86: Add vesa mode configuration options Simon Glass
@ 2014-11-15 3:56 ` Simon Glass
2014-11-25 21:49 ` Simon Glass
2014-11-15 3:56 ` [U-Boot] [PATCH 06/19] x86: Add support for running option ROMs natively Simon Glass
` (13 subsequent siblings)
18 siblings, 1 reply; 40+ messages in thread
From: Simon Glass @ 2014-11-15 3:56 UTC (permalink / raw)
To: u-boot
For option ROMs we can use these extensions to request a particular video
mode. Add a header file which defines the binary interface.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
include/vbe.h | 103 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 103 insertions(+)
create mode 100644 include/vbe.h
diff --git a/include/vbe.h b/include/vbe.h
new file mode 100644
index 0000000..d405691
--- /dev/null
+++ b/include/vbe.h
@@ -0,0 +1,103 @@
+/******************************************************************************
+ * Copyright (c) 2004, 2008 IBM Corporation
+ * Copyright (c) 2009 Pattrick Hueper <phueper@hueper.net>
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Contributors:
+ * IBM Corporation - initial implementation
+ *****************************************************************************/
+#ifndef _VBE_H
+#define _VBE_H
+
+/* these structs are for input from and output to OF */
+struct __packed screen_info {
+ u8 display_type; /* 0=NONE, 1= analog, 2=digital */
+ u16 screen_width;
+ u16 screen_height;
+ /* bytes per line in framebuffer, may be more than screen_width */
+ u16 screen_linebytes;
+ u8 color_depth; /* color depth in bits per pixel */
+ u32 framebuffer_address;
+ u8 edid_block_zero[128];
+};
+
+struct __packed screen_info_input {
+ u8 signature[4];
+ u16 size_reserved;
+ u8 monitor_number;
+ u16 max_screen_width;
+ u8 color_depth;
+};
+
+/* these structs only store the required a subset of the VBE-defined fields */
+struct __packed vbe_info {
+ char signature[4];
+ u16 version;
+ u8 *oem_string_ptr;
+ u32 capabilities;
+ u16 video_mode_list[256];
+ u16 total_memory;
+};
+
+struct __packed vesa_mode_info {
+ u16 mode_attributes; /* 00 */
+ u8 win_a_attributes; /* 02 */
+ u8 win_b_attributes; /* 03 */
+ u16 win_granularity; /* 04 */
+ u16 win_size; /* 06 */
+ u16 win_a_segment; /* 08 */
+ u16 win_b_segment; /* 0a */
+ u32 win_func_ptr; /* 0c */
+ u16 bytes_per_scanline; /* 10 */
+ u16 x_resolution; /* 12 */
+ u16 y_resolution; /* 14 */
+ u8 x_charsize; /* 16 */
+ u8 y_charsize; /* 17 */
+ u8 number_of_planes; /* 18 */
+ u8 bits_per_pixel; /* 19 */
+ u8 number_of_banks; /* 20 */
+ u8 memory_model; /* 21 */
+ u8 bank_size; /* 22 */
+ u8 number_of_image_pages; /* 23 */
+ u8 reserved_page;
+ u8 red_mask_size;
+ u8 red_mask_pos;
+ u8 green_mask_size;
+ u8 green_mask_pos;
+ u8 blue_mask_size;
+ u8 blue_mask_pos;
+ u8 reserved_mask_size;
+ u8 reserved_mask_pos;
+ u8 direct_color_mode_info;
+ u32 phys_base_ptr;
+ u32 offscreen_mem_offset;
+ u16 offscreen_mem_size;
+ u8 reserved[206];
+};
+
+struct vbe_mode_info {
+ u16 video_mode;
+ bool valid;
+ union {
+ struct vesa_mode_info vesa;
+ u8 mode_info_block[256];
+ };
+};
+
+struct vbe_ddc_info {
+ u8 port_number; /* i.e. monitor number */
+ u8 edid_transfer_time;
+ u8 ddc_level;
+ u8 edid_block_zero[128];
+};
+
+#define VESA_GET_INFO 0x4f00
+#define VESA_GET_MODE_INFO 0x4f01
+#define VESA_SET_MODE 0x4f02
+
+struct graphic_device;
+int vbe_get_video_info(struct graphic_device *gdev);
+
+#endif
--
2.1.0.rc2.206.gedb03e5
^ permalink raw reply related [flat|nested] 40+ messages in thread* [U-Boot] [PATCH 06/19] x86: Add support for running option ROMs natively
2014-11-15 3:56 [U-Boot] [PATCH 0/19] x86: ivybridge: Add graphics support Simon Glass
` (4 preceding siblings ...)
2014-11-15 3:56 ` [U-Boot] [PATCH 05/19] Add support for Vesa BIOS extensions Simon Glass
@ 2014-11-15 3:56 ` Simon Glass
2014-11-25 21:49 ` Simon Glass
2014-11-15 3:56 ` [U-Boot] [PATCH 07/19] pci: Add general support for execution of video ROMs Simon Glass
` (12 subsequent siblings)
18 siblings, 1 reply; 40+ messages in thread
From: Simon Glass @ 2014-11-15 3:56 UTC (permalink / raw)
To: u-boot
On x86 machines we can use an emulator to run option ROMS as with other
architectures. But with some additional effort (mostly due to the 16-bit
nature of option ROMs) we can run them natively. Add support for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
arch/x86/lib/Makefile | 3 +
arch/x86/lib/bios.c | 348 +++++++++++++++++++++++++++++++++++++++++
arch/x86/lib/bios.h | 98 ++++++++++++
arch/x86/lib/bios_asm.S | 281 +++++++++++++++++++++++++++++++++
arch/x86/lib/bios_interrupts.c | 219 ++++++++++++++++++++++++++
5 files changed, 949 insertions(+)
create mode 100644 arch/x86/lib/bios.c
create mode 100644 arch/x86/lib/bios.h
create mode 100644 arch/x86/lib/bios_asm.S
create mode 100644 arch/x86/lib/bios_interrupts.c
diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile
index e146e64..55de788 100644
--- a/arch/x86/lib/Makefile
+++ b/arch/x86/lib/Makefile
@@ -5,6 +5,9 @@
# SPDX-License-Identifier: GPL-2.0+
#
+obj-y += bios.o
+obj-y += bios_asm.o
+obj-y += bios_interrupts.o
obj-$(CONFIG_CMD_BOOTM) += bootm.o
obj-y += cmd_boot.o
obj-y += gcc.o
diff --git a/arch/x86/lib/bios.c b/arch/x86/lib/bios.c
new file mode 100644
index 0000000..845fd9c
--- /dev/null
+++ b/arch/x86/lib/bios.c
@@ -0,0 +1,348 @@
+/*
+ * From Coreboot file device/oprom/realmode/x86.c
+ *
+ * Copyright (C) 2007 Advanced Micro Devices, Inc.
+ * Copyright (C) 2009-2010 coresystems GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+#include <common.h>
+#include <bios_emul.h>
+#include <vbe.h>
+#include <asm/cache.h>
+#include <asm/processor.h>
+#include <asm/i8259.h>
+#include <asm/io.h>
+#include <asm/post.h>
+#include "bios.h"
+
+/* Interrupt handlers for each interrupt the ROM can call */
+static int (*int_handler[256])(void);
+
+/* to have a common register file for interrupt handlers */
+X86EMU_sysEnv _X86EMU_env;
+
+asmlinkage void (*realmode_call)(u32 addr, u32 eax, u32 ebx, u32 ecx, u32 edx,
+ u32 esi, u32 edi);
+
+asmlinkage void (*realmode_interrupt)(u32 intno, u32 eax, u32 ebx, u32 ecx,
+ u32 edx, u32 esi, u32 edi);
+
+static void setup_realmode_code(void)
+{
+ memcpy((void *)REALMODE_BASE, &asm_realmode_code,
+ asm_realmode_code_size);
+
+ /* Ensure the global pointers are relocated properly. */
+ realmode_call = PTR_TO_REAL_MODE(asm_realmode_call);
+ realmode_interrupt = PTR_TO_REAL_MODE(__realmode_interrupt);
+
+ debug("Real mode stub @%x: %d bytes\n", REALMODE_BASE,
+ asm_realmode_code_size);
+}
+
+static void setup_rombios(void)
+{
+ const char date[] = "06/11/99";
+ memcpy((void *)0xffff5, &date, 8);
+
+ const char ident[] = "PCI_ISA";
+ memcpy((void *)0xfffd9, &ident, 7);
+
+ /* system model: IBM-AT */
+ writeb(0xfc, 0xffffe);
+}
+
+static int int_exception_handler(void)
+{
+ /* compatibility shim */
+ struct eregs reg_info = {
+ .eax = M.x86.R_EAX,
+ .ecx = M.x86.R_ECX,
+ .edx = M.x86.R_EDX,
+ .ebx = M.x86.R_EBX,
+ .esp = M.x86.R_ESP,
+ .ebp = M.x86.R_EBP,
+ .esi = M.x86.R_ESI,
+ .edi = M.x86.R_EDI,
+ .vector = M.x86.intno,
+ .error_code = 0,
+ .eip = M.x86.R_EIP,
+ .cs = M.x86.R_CS,
+ .eflags = M.x86.R_EFLG
+ };
+ struct eregs *regs = ®_info;
+
+ debug("Oops, exception %d while executing option rom\n", regs->vector);
+ cpu_hlt();
+
+ return 0;
+}
+
+static int int_unknown_handler(void)
+{
+ debug("Unsupported software interrupt #0x%x eax 0x%x\n",
+ M.x86.intno, M.x86.R_EAX);
+
+ return -1;
+}
+
+/* setup interrupt handlers for mainboard */
+void bios_set_interrupt_handler(int intnum, int (*int_func)(void))
+{
+ int_handler[intnum] = int_func;
+}
+
+static void setup_interrupt_handlers(void)
+{
+ int i;
+
+ /*
+ * The first 16 int_handler functions are not BIOS services,
+ * but the CPU-generated exceptions ("hardware interrupts")
+ */
+ for (i = 0; i < 0x10; i++)
+ int_handler[i] = &int_exception_handler;
+
+ /* Mark all other int_handler calls as unknown first */
+ for (i = 0x10; i < 0x100; i++) {
+ /* Skip if bios_set_interrupt_handler() isn't called first */
+ if (int_handler[i])
+ continue;
+
+ /*
+ * Now set the default functions that are actually needed
+ * to initialize the option roms. The board may override
+ * these with bios_set_interrupt_handler()
+ */
+ switch (i) {
+ case 0x10:
+ int_handler[0x10] = &int10_handler;
+ break;
+ case 0x12:
+ int_handler[0x12] = &int12_handler;
+ break;
+ case 0x16:
+ int_handler[0x16] = &int16_handler;
+ break;
+ case 0x1a:
+ int_handler[0x1a] = &int1a_handler;
+ break;
+ default:
+ int_handler[i] = &int_unknown_handler;
+ break;
+ }
+ }
+}
+
+static void write_idt_stub(void *target, u8 intnum)
+{
+ unsigned char *codeptr;
+
+ codeptr = (unsigned char *)target;
+ memcpy(codeptr, &__idt_handler, __idt_handler_size);
+ codeptr[3] = intnum; /* modify int# in the code stub. */
+}
+
+static void setup_realmode_idt(void)
+{
+ struct realmode_idt *idts = NULL;
+ int i;
+
+ /*
+ * Copy IDT stub code for each interrupt. This might seem wasteful
+ * but it is really simple
+ */
+ for (i = 0; i < 256; i++) {
+ idts[i].cs = 0;
+ idts[i].offset = 0x1000 + (i * __idt_handler_size);
+ write_idt_stub((void *)((u32)idts[i].offset), i);
+ }
+
+ /*
+ * Many option ROMs use the hard coded interrupt entry points in the
+ * system bios. So install them@the known locations.
+ */
+
+ /* int42 is the relocated int10 */
+ write_idt_stub((void *)0xff065, 0x42);
+ /* BIOS Int 11 Handler F000:F84D */
+ write_idt_stub((void *)0xff84d, 0x11);
+ /* BIOS Int 12 Handler F000:F841 */
+ write_idt_stub((void *)0xff841, 0x12);
+ /* BIOS Int 13 Handler F000:EC59 */
+ write_idt_stub((void *)0xfec59, 0x13);
+ /* BIOS Int 14 Handler F000:E739 */
+ write_idt_stub((void *)0xfe739, 0x14);
+ /* BIOS Int 15 Handler F000:F859 */
+ write_idt_stub((void *)0xff859, 0x15);
+ /* BIOS Int 16 Handler F000:E82E */
+ write_idt_stub((void *)0xfe82e, 0x16);
+ /* BIOS Int 17 Handler F000:EFD2 */
+ write_idt_stub((void *)0xfefd2, 0x17);
+ /* ROM BIOS Int 1A Handler F000:FE6E */
+ write_idt_stub((void *)0xffe6e, 0x1a);
+}
+
+static u8 vbe_get_mode_info(struct vbe_mode_info *mi)
+{
+ u16 buffer_seg;
+ u16 buffer_adr;
+ char *buffer;
+
+ debug("VBE: Getting information about VESA mode %04x\n",
+ mi->video_mode);
+ buffer = PTR_TO_REAL_MODE(asm_realmode_buffer);
+ buffer_seg = (((unsigned long)buffer) >> 4) & 0xff00;
+ buffer_adr = ((unsigned long)buffer) & 0xffff;
+
+ realmode_interrupt(0x10, VESA_GET_MODE_INFO, 0x0000, mi->video_mode,
+ 0x0000, buffer_seg, buffer_adr);
+ memcpy(mi->mode_info_block, buffer, sizeof(struct vbe_mode_info));
+ mi->valid = true;
+
+ return 0;
+}
+
+static u8 vbe_set_mode(struct vbe_mode_info *mi)
+{
+ debug("VBE: Setting VESA mode %#04x\n", mi->video_mode);
+ /* request linear framebuffer mode */
+ mi->video_mode |= (1 << 14);
+ /* request clearing of framebuffer */
+ mi->video_mode &= ~(1 << 15);
+ realmode_interrupt(0x10, VESA_SET_MODE, mi->video_mode,
+ 0x0000, 0x0000, 0x0000, 0x0000);
+
+ return 0;
+}
+
+static void vbe_set_graphics(int vesa_mode, struct vbe_mode_info *mode_info)
+{
+ unsigned char *framebuffer;
+
+ mode_info->video_mode = (1 << 14) | vesa_mode;
+ vbe_get_mode_info(mode_info);
+
+ framebuffer = (unsigned char *)mode_info->vesa.phys_base_ptr;
+ debug("VBE: resolution: %dx%d@%d\n",
+ le16_to_cpu(mode_info->vesa.x_resolution),
+ le16_to_cpu(mode_info->vesa.y_resolution),
+ mode_info->vesa.bits_per_pixel);
+ debug("VBE: framebuffer: %p\n", framebuffer);
+ if (!framebuffer) {
+ debug("VBE: Mode does not support linear framebuffer\n");
+ return;
+ }
+
+ vbe_set_mode(mode_info);
+}
+
+void bios_run_on_x86(pci_dev_t pcidev, unsigned long addr, int vesa_mode,
+ struct vbe_mode_info *mode_info)
+{
+ u32 num_dev;
+
+ num_dev = PCI_BUS(pcidev) << 8 | PCI_DEV(pcidev) << 3 |
+ PCI_FUNC(pcidev);
+
+ /* Needed to avoid exceptions in some ROMs */
+ interrupt_init();
+
+ /* Set up some legacy information in the F segment */
+ setup_rombios();
+
+ /* Set up C interrupt handlers */
+ setup_interrupt_handlers();
+
+ /* Set up real-mode IDT */
+ setup_realmode_idt();
+
+ /* Make sure the code is placed. */
+ setup_realmode_code();
+
+ disable_caches();
+ debug("Calling Option ROM at %lx, pci device %#x...", addr, num_dev);
+
+ /* Option ROM entry point is@OPROM start + 3 */
+ realmode_call(addr + 0x0003, num_dev, 0xffff, 0x0000, 0xffff, 0x0,
+ 0x0);
+ debug("done\n");
+
+ if (vesa_mode != -1)
+ vbe_set_graphics(vesa_mode, mode_info);
+}
+
+asmlinkage int interrupt_handler(u32 intnumber, u32 gsfs, u32 dses,
+ u32 edi, u32 esi, u32 ebp, u32 esp,
+ u32 ebx, u32 edx, u32 ecx, u32 eax,
+ u32 cs_ip, u16 stackflags)
+{
+ u32 ip;
+ u32 cs;
+ u32 flags;
+ int ret = 0;
+
+ ip = cs_ip & 0xffff;
+ cs = cs_ip >> 16;
+ flags = stackflags;
+
+#ifdef CONFIG_REALMODE_DEBUG
+ debug("oprom: INT# 0x%x\n", intnumber);
+ debug("oprom: eax: %08x ebx: %08x ecx: %08x edx: %08x\n",
+ eax, ebx, ecx, edx);
+ debug("oprom: ebp: %08x esp: %08x edi: %08x esi: %08x\n",
+ ebp, esp, edi, esi);
+ debug("oprom: ip: %04x cs: %04x flags: %08x\n",
+ ip, cs, flags);
+ debug("oprom: stackflags = %04x\n", stackflags);
+#endif
+
+ /*
+ * Fetch arguments from the stack and put them to a place
+ * suitable for the interrupt handlers
+ */
+ M.x86.R_EAX = eax;
+ M.x86.R_ECX = ecx;
+ M.x86.R_EDX = edx;
+ M.x86.R_EBX = ebx;
+ M.x86.R_ESP = esp;
+ M.x86.R_EBP = ebp;
+ M.x86.R_ESI = esi;
+ M.x86.R_EDI = edi;
+ M.x86.intno = intnumber;
+ M.x86.R_EIP = ip;
+ M.x86.R_CS = cs;
+ M.x86.R_EFLG = flags;
+
+ /* Call the interrupt handler for this interrupt number */
+ ret = int_handler[intnumber]();
+
+ /*
+ * This code is quite strange...
+ *
+ * Put registers back on the stack. The assembler code will pop them
+ * later. We force (volatile!) changing the values of the parameters
+ * of this function. We know that they stay alive on the stack after
+ * we leave this function.
+ */
+ *(volatile u32 *)&eax = M.x86.R_EAX;
+ *(volatile u32 *)&ecx = M.x86.R_ECX;
+ *(volatile u32 *)&edx = M.x86.R_EDX;
+ *(volatile u32 *)&ebx = M.x86.R_EBX;
+ *(volatile u32 *)&esi = M.x86.R_ESI;
+ *(volatile u32 *)&edi = M.x86.R_EDI;
+ flags = M.x86.R_EFLG;
+
+ /* Pass success or error back to our caller via the CARRY flag */
+ if (ret) {
+ flags &= ~1; /* no error: clear carry */
+ } else {
+ debug("int%02x call returned error\n", intnumber);
+ flags |= 1; /* error: set carry */
+ }
+ *(volatile u16 *)&stackflags = flags;
+
+ return ret;
+}
+
diff --git a/arch/x86/lib/bios.h b/arch/x86/lib/bios.h
new file mode 100644
index 0000000..8491b4a
--- /dev/null
+++ b/arch/x86/lib/bios.h
@@ -0,0 +1,98 @@
+/*
+ * From Coreboot file device/oprom/realmode/x86.h
+ *
+ * Copyright (C) 2007 Advanced Micro Devices, Inc.
+ * Copyright (C) 2009-2010 coresystems GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#ifndef _X86_LIB_BIOS_H
+#define _X86_LIB_BIOS_H
+
+#define REALMODE_BASE 0x600
+
+#ifdef __ASSEMBLY__
+
+#define PTR_TO_REAL_MODE(x) (x - asm_realmode_code + REALMODE_BASE)
+
+#else
+
+/* Convert a symbol address to our real mode area */
+#define PTR_TO_REAL_MODE(sym)\
+ (void *)(REALMODE_BASE + ((char *)&(sym) - (char *)&asm_realmode_code))
+
+/*
+ * The following symbols cannot be used directly. They need to be fixed up
+ * to point to the correct address location after the code has been copied
+ * to REALMODE_BASE. Absolute symbols are not used because those symbols are
+ * relocated by U-Boot.
+ */
+extern unsigned char asm_realmode_call, __realmode_interrupt;
+extern unsigned char asm_realmode_buffer;
+
+#define DOWNTO8(A) \
+ union { \
+ struct { \
+ union { \
+ struct { \
+ uint8_t A##l; \
+ uint8_t A##h; \
+ } __packed; \
+ uint16_t A##x; \
+ } __packed; \
+ uint16_t h##A##x; \
+ } __packed; \
+ uint32_t e##A##x; \
+ } __packed;
+
+#define DOWNTO16(A) \
+ union { \
+ struct { \
+ uint16_t A; \
+ uint16_t h##A; \
+ } __packed; \
+ uint32_t e##A; \
+ } __packed;
+
+struct eregs {
+ DOWNTO8(a);
+ DOWNTO8(c);
+ DOWNTO8(d);
+ DOWNTO8(b);
+ DOWNTO16(sp);
+ DOWNTO16(bp);
+ DOWNTO16(si);
+ DOWNTO16(di);
+ uint32_t vector;
+ uint32_t error_code;
+ uint32_t eip;
+ uint32_t cs;
+ uint32_t eflags;
+};
+
+struct realmode_idt {
+ u16 offset, cs;
+};
+
+void x86_exception(struct eregs *info);
+
+/* From x86_asm.S */
+extern unsigned char __idt_handler;
+extern unsigned int __idt_handler_size;
+extern unsigned char asm_realmode_code;
+extern unsigned int asm_realmode_code_size;
+
+asmlinkage void (*realmode_call)(u32 addr, u32 eax, u32 ebx, u32 ecx, u32 edx,
+ u32 esi, u32 edi);
+
+asmlinkage void (*realmode_interrupt)(u32 intno, u32 eax, u32 ebx, u32 ecx,
+ u32 edx, u32 esi, u32 edi);
+
+int int10_handler(void);
+int int12_handler(void);
+int int16_handler(void);
+int int1a_handler(void);
+#endif /*__ASSEMBLY__ */
+
+#endif
diff --git a/arch/x86/lib/bios_asm.S b/arch/x86/lib/bios_asm.S
new file mode 100644
index 0000000..4faa70e
--- /dev/null
+++ b/arch/x86/lib/bios_asm.S
@@ -0,0 +1,281 @@
+/*
+ * From coreboot x86_asm.S, cleaned up substantially
+ *
+ * Copyright (C) 2009-2010 coresystems GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include <asm/processor.h>
+#include <asm/processor-flags.h>
+#include "bios.h"
+
+#define SEG(segment) $segment * X86_GDT_ENTRY_SIZE
+
+/*
+ * This is the interrupt handler stub code. It gets copied to the IDT and
+ * to some fixed addresses in the F segment. Before the code can used,
+ * it gets patched up by the C function copying it: byte 3 (the $0 in
+ * movb $0, %al) is overwritten with the interrupt numbers.
+ */
+
+ .code16
+ .globl __idt_handler
+__idt_handler:
+ pushal
+ movb $0, %al /* This instruction gets modified */
+ ljmp $0, $__interrupt_handler_16bit
+ .globl __idt_handler_size
+__idt_handler_size:
+ .long . - __idt_handler
+
+.macro setup_registers
+ /* initial register values */
+ movl 44(%ebp), %eax
+ movl %eax, __registers + 0 /* eax */
+ movl 48(%ebp), %eax
+ movl %eax, __registers + 4 /* ebx */
+ movl 52(%ebp), %eax
+ movl %eax, __registers + 8 /* ecx */
+ movl 56(%ebp), %eax
+ movl %eax, __registers + 12 /* edx */
+ movl 60(%ebp), %eax
+ movl %eax, __registers + 16 /* esi */
+ movl 64(%ebp), %eax
+ movl %eax, __registers + 20 /* edi */
+.endm
+
+.macro enter_real_mode
+ /* Activate the right segment descriptor real mode. */
+ ljmp SEG(X86_GDT_ENTRY_16BIT_CS), $PTR_TO_REAL_MODE(1f)
+1:
+.code16
+ /*
+ * Load the segment registers with properly configured segment
+ * descriptors. They will retain these configurations (limits,
+ * writability, etc.) once protected mode is turned off.
+ */
+ mov SEG(X86_GDT_ENTRY_16BIT_DS), %ax
+ mov %ax, %ds
+ mov %ax, %es
+ mov %ax, %fs
+ mov %ax, %gs
+ mov %ax, %ss
+
+ /* Turn off protection */
+ movl %cr0, %eax
+ andl $~X86_CR0_PE, %eax
+ movl %eax, %cr0
+
+ /* Now really going into real mode */
+ ljmp $0, $PTR_TO_REAL_MODE(1f)
+1:
+ /*
+ * Set up a stack: Put the stack at the end of page zero. That way
+ * we can easily share it between real and protected, since the
+ * 16-bit ESP at segment 0 will work for any case.
+ */
+ mov $0x0, %ax
+ mov %ax, %ss
+
+ /* Load 16 bit IDT */
+ xor %ax, %ax
+ mov %ax, %ds
+ lidt __realmode_idt
+
+.endm
+
+.macro prepare_for_irom
+ movl $0x1000, %eax
+ movl %eax, %esp
+
+ /* Initialise registers for option rom lcall */
+ movl __registers + 0, %eax
+ movl __registers + 4, %ebx
+ movl __registers + 8, %ecx
+ movl __registers + 12, %edx
+ movl __registers + 16, %esi
+ movl __registers + 20, %edi
+
+ /* Set all segments to 0x0000, ds to 0x0040 */
+ push %ax
+ xor %ax, %ax
+ mov %ax, %es
+ mov %ax, %fs
+ mov %ax, %gs
+ mov SEG(X86_GDT_ENTRY_16BIT_FLAT_DS), %ax
+ mov %ax, %ds
+ pop %ax
+
+.endm
+
+.macro enter_protected_mode
+ /* Go back to protected mode */
+ movl %cr0, %eax
+ orl $X86_CR0_PE, %eax
+ movl %eax, %cr0
+
+ /* Now that we are in protected mode jump to a 32 bit code segment */
+ data32 ljmp SEG(X86_GDT_ENTRY_32BIT_CS), $PTR_TO_REAL_MODE(1f)
+1:
+ .code32
+ mov SEG(X86_GDT_ENTRY_32BIT_DS), %ax
+ mov %ax, %ds
+ mov %ax, %es
+ mov %ax, %gs
+ mov %ax, %ss
+ mov SEG(X86_GDT_ENTRY_32BIT_FS), %ax
+ mov %ax, %fs
+
+ /* restore proper idt */
+ lidt idt_ptr
+.endm
+
+/*
+ * In order to be independent of U-Boot's position in RAM we relocate a part
+ * of the code to the first megabyte of RAM, so the CPU can use it in
+ * real-mode. This code lives at asm_realmode_code.
+ */
+ .globl asm_realmode_code
+asm_realmode_code:
+
+/* Realmode IDT pointer structure. */
+__realmode_idt = PTR_TO_REAL_MODE(.)
+ .word 1023 /* 16 bit limit */
+ .long 0 /* 24 bit base */
+ .word 0
+
+/* Preserve old stack */
+__stack = PTR_TO_REAL_MODE(.)
+ .long 0
+
+/* Register store for realmode_call and realmode_interrupt */
+__registers = PTR_TO_REAL_MODE(.)
+ .long 0 /* 0 - EAX */
+ .long 0 /* 4 - EBX */
+ .long 0 /* 8 - ECX */
+ .long 0 /* 12 - EDX */
+ .long 0 /* 16 - ESI */
+ .long 0 /* 20 - EDI */
+
+/* 256 byte buffer, used by int10 */
+ .globl asm_realmode_buffer
+asm_realmode_buffer:
+ .skip 256
+
+ .code32
+ .globl asm_realmode_call
+asm_realmode_call:
+ /* save all registers to the stack */
+ pusha
+ pushf
+ movl %esp, __stack
+ movl %esp, %ebp
+
+ /*
+ * This function is called with regparm=0 and we have to skip the
+ * 36 bytes from pushf+pusha. Hence start at 40.
+ * Set up our call instruction.
+ */
+ movl 40(%ebp), %eax
+ mov %ax, __lcall_instr + 1
+ andl $0xffff0000, %eax
+ shrl $4, %eax
+ mov %ax, __lcall_instr + 3
+
+ wbinvd
+
+ setup_registers
+ enter_real_mode
+ prepare_for_irom
+
+__lcall_instr = PTR_TO_REAL_MODE(.)
+ .byte 0x9a
+ .word 0x0000, 0x0000
+
+ enter_protected_mode
+
+ /* restore stack pointer, eflags and register values and exit */
+ movl __stack, %esp
+ popf
+ popa
+ ret
+
+ .globl __realmode_interrupt
+__realmode_interrupt:
+ /* save all registers to the stack and store the stack pointer */
+ pusha
+ pushf
+ movl %esp, __stack
+ movl %esp, %ebp
+
+ /*
+ * This function is called with regparm=0 and we have to skip the
+ * 36 bytes from pushf+pusha. Hence start at 40.
+ * Prepare interrupt calling code.
+ */
+ movl 40(%ebp), %eax
+ movb %al, __intXX_instr + 1 /* intno */
+
+ setup_registers
+ enter_real_mode
+ prepare_for_irom
+
+__intXX_instr = PTR_TO_REAL_MODE(.)
+ .byte 0xcd, 0x00 /* This becomes intXX */
+
+ enter_protected_mode
+
+ /* restore stack pointer, eflags and register values and exit */
+ movl __stack, %esp
+ popf
+ popa
+ ret
+
+/*
+ * This is the 16-bit interrupt entry point called by the IDT stub code.
+ *
+ * Before this code code is called, %eax is pushed to the stack, and the
+ * interrupt number is loaded into %al. On return this function cleans up
+ * for its caller.
+ */
+ .code16
+__interrupt_handler_16bit = PTR_TO_REAL_MODE(.)
+ push %ds
+ push %es
+ push %fs
+ push %gs
+
+ /* Clear DF to not break ABI assumptions */
+ cld
+
+ /*
+ * Clean up the interrupt number. We could do this in the stub, but
+ * it would cost two more bytes per stub entry.
+ */
+ andl $0xff, %eax
+ pushl %eax /* ... and make it the first parameter */
+
+ enter_protected_mode
+
+ /* Call the C interrupt handler */
+ movl $interrupt_handler, %eax
+ call *%eax
+
+ enter_real_mode
+
+ /*
+ * Restore all registers, including those manipulated by the C
+ * handler
+ */
+ popl %eax
+ pop %gs
+ pop %fs
+ pop %es
+ pop %ds
+ popal
+ iret
+
+ .globl asm_realmode_code_size
+asm_realmode_code_size:
+ .long . - asm_realmode_code
diff --git a/arch/x86/lib/bios_interrupts.c b/arch/x86/lib/bios_interrupts.c
new file mode 100644
index 0000000..bf8a220
--- /dev/null
+++ b/arch/x86/lib/bios_interrupts.c
@@ -0,0 +1,219 @@
+/*
+ * From Coreboot
+ *
+ * Copyright (C) 2001 Ronald G. Minnich
+ * Copyright (C) 2005 Nick.Barker9 at btinternet.com
+ * Copyright (C) 2007-2009 coresystems GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include <common.h>
+#include <asm/pci.h>
+#include <asm/arch/pch.h>
+#include "../../../drivers/bios_emulator/include/x86emu/regs.h"
+
+/* errors go in AH. Just set these up so that word assigns will work */
+enum {
+ PCIBIOS_SUCCESSFUL = 0x0000,
+ PCIBIOS_UNSUPPORTED = 0x8100,
+ PCIBIOS_BADVENDOR = 0x8300,
+ PCIBIOS_NODEV = 0x8600,
+ PCIBIOS_BADREG = 0x8700
+};
+
+int int10_handler(void)
+{
+ static u8 cursor_row, cursor_col;
+ int res = 0;
+
+ switch ((M.x86.R_EAX & 0xff00) >> 8) {
+ case 0x01: /* Set cursor shape */
+ res = 1;
+ break;
+ case 0x02: /* Set cursor position */
+ if (cursor_row != ((M.x86.R_EDX >> 8) & 0xff) ||
+ cursor_col >= (M.x86.R_EDX & 0xff)) {
+ debug("\n");
+ }
+ cursor_row = (M.x86.R_EDX >> 8) & 0xff;
+ cursor_col = M.x86.R_EDX & 0xff;
+ res = 1;
+ break;
+ case 0x03: /* Get cursor position */
+ M.x86.R_EAX &= 0x00ff;
+ M.x86.R_ECX = 0x0607;
+ M.x86.R_EDX = (cursor_row << 8) | cursor_col;
+ res = 1;
+ break;
+ case 0x06: /* Scroll up */
+ debug("\n");
+ res = 1;
+ break;
+ case 0x08: /* Get Character and Mode@Cursor Position */
+ M.x86.R_EAX = 0x0f00 | 'A'; /* White on black 'A' */
+ res = 1;
+ break;
+ case 0x09: /* Write Character and attribute */
+ case 0x0e: /* Write Character */
+ debug("%c", M.x86.R_EAX & 0xff);
+ res = 1;
+ break;
+ case 0x0f: /* Get video mode */
+ M.x86.R_EAX = 0x5002; /*80 x 25 */
+ M.x86.R_EBX &= 0x00ff;
+ res = 1;
+ break;
+ default:
+ printf("Unknown INT10 function %04x\n", M.x86.R_EAX & 0xffff);
+ break;
+ }
+ return res;
+}
+
+int int12_handler(void)
+{
+ M.x86.R_EAX = 64 * 1024;
+ return 1;
+}
+
+int int16_handler(void)
+{
+ int res = 0;
+
+ switch ((M.x86.R_EAX & 0xff00) >> 8) {
+ case 0x00: /* Check for Keystroke */
+ M.x86.R_EAX = 0x6120; /* Space Bar, Space */
+ res = 1;
+ break;
+ case 0x01: /* Check for Keystroke */
+ M.x86.R_EFLG |= 1 << 6; /* Zero Flag set (no key available) */
+ res = 1;
+ break;
+ default:
+ printf("Unknown INT16 function %04x\n", M.x86.R_EAX & 0xffff);
+
+break;
+ }
+ return res;
+}
+
+#define PCI_CONFIG_SPACE_TYPE1 (1 << 0)
+#define PCI_SPECIAL_CYCLE_TYPE1 (1 << 4)
+
+int int1a_handler(void)
+{
+ unsigned short func = (unsigned short)M.x86.R_EAX;
+ int retval = 1;
+ unsigned short devid, vendorid, devfn;
+ /* Use short to get rid of gabage in upper half of 32-bit register */
+ short devindex;
+ unsigned char bus;
+ pci_dev_t dev;
+ u32 dword;
+ u16 word;
+ u8 byte, reg;
+
+ switch (func) {
+ case 0xb101: /* PCIBIOS Check */
+ M.x86.R_EDX = 0x20494350; /* ' ICP' */
+ M.x86.R_EAX &= 0xffff0000; /* Clear AH / AL */
+ M.x86.R_EAX |= PCI_CONFIG_SPACE_TYPE1 |
+ PCI_SPECIAL_CYCLE_TYPE1;
+ /*
+ * last bus in the system. Hard code to 255 for now.
+ * dev_enumerate() does not seem to tell us (publically)
+ */
+ M.x86.R_ECX = 0xff;
+ M.x86.R_EDI = 0x00000000; /* protected mode entry */
+ retval = 1;
+ break;
+ case 0xb102: /* Find Device */
+ devid = M.x86.R_ECX;
+ vendorid = M.x86.R_EDX;
+ devindex = M.x86.R_ESI;
+ dev = pci_find_device(vendorid, devid, devindex);
+ if (dev != -1) {
+ unsigned short busdevfn;
+ M.x86.R_EAX &= 0xffff00ff; /* Clear AH */
+ M.x86.R_EAX |= PCIBIOS_SUCCESSFUL;
+ /*
+ * busnum is an unsigned char;
+ * devfn is an int, so we mask it off.
+ */
+ busdevfn = (PCI_BUS(dev) << 8) | PCI_DEV(dev) << 3 |
+ PCI_FUNC(dev);
+ debug("0x%x: return 0x%x\n", func, busdevfn);
+ M.x86.R_EBX = busdevfn;
+ retval = 1;
+ } else {
+ M.x86.R_EAX &= 0xffff00ff; /* Clear AH */
+ M.x86.R_EAX |= PCIBIOS_NODEV;
+ retval = 0;
+ }
+ break;
+ case 0xb10a: /* Read Config Dword */
+ case 0xb109: /* Read Config Word */
+ case 0xb108: /* Read Config Byte */
+ case 0xb10d: /* Write Config Dword */
+ case 0xb10c: /* Write Config Word */
+ case 0xb10b: /* Write Config Byte */
+ devfn = M.x86.R_EBX & 0xff;
+ bus = M.x86.R_EBX >> 8;
+ reg = M.x86.R_EDI;
+ dev = PCI_BDF(bus, devfn >> 3, devfn & 7);
+ if (!dev) {
+ debug("0x%x: BAD DEVICE bus %d devfn 0x%x\n", func,
+ bus, devfn);
+ /* Or are we supposed to return PCIBIOS_NODEV? */
+ M.x86.R_EAX &= 0xffff00ff; /* Clear AH */
+ M.x86.R_EAX |= PCIBIOS_BADREG;
+ retval = 0;
+ return retval;
+ }
+ switch (func) {
+ case 0xb108: /* Read Config Byte */
+ byte = pci_read_config8(dev, reg);
+ M.x86.R_ECX = byte;
+ break;
+ case 0xb109: /* Read Config Word */
+ word = pci_read_config16(dev, reg);
+ M.x86.R_ECX = word;
+ break;
+ case 0xb10a: /* Read Config Dword */
+ dword = pci_read_config32(dev, reg);
+ M.x86.R_ECX = dword;
+ break;
+ case 0xb10b: /* Write Config Byte */
+ byte = M.x86.R_ECX;
+ pci_write_config8(dev, reg, byte);
+ break;
+ case 0xb10c: /* Write Config Word */
+ word = M.x86.R_ECX;
+ pci_write_config16(dev, reg, word);
+ break;
+ case 0xb10d: /* Write Config Dword */
+ dword = M.x86.R_ECX;
+ pci_write_config32(dev, reg, dword);
+ break;
+ }
+
+#ifdef CONFIG_REALMODE_DEBUG
+ debug("0x%x: bus %d devfn 0x%x reg 0x%x val 0x%x\n", func,
+ bus, devfn, reg, M.x86.R_ECX);
+#endif
+ M.x86.R_EAX &= 0xffff00ff; /* Clear AH */
+ M.x86.R_EAX |= PCIBIOS_SUCCESSFUL;
+ retval = 1;
+ break;
+ default:
+ printf("UNSUPPORTED PCIBIOS FUNCTION 0x%x\n", func);
+ M.x86.R_EAX &= 0xffff00ff; /* Clear AH */
+ M.x86.R_EAX |= PCIBIOS_UNSUPPORTED;
+ retval = 0;
+ break;
+ }
+
+ return retval;
+}
+
--
2.1.0.rc2.206.gedb03e5
^ permalink raw reply related [flat|nested] 40+ messages in thread* [U-Boot] [PATCH 06/19] x86: Add support for running option ROMs natively
2014-11-15 3:56 ` [U-Boot] [PATCH 06/19] x86: Add support for running option ROMs natively Simon Glass
@ 2014-11-25 21:49 ` Simon Glass
0 siblings, 0 replies; 40+ messages in thread
From: Simon Glass @ 2014-11-25 21:49 UTC (permalink / raw)
To: u-boot
On 14 November 2014 at 20:56, Simon Glass <sjg@chromium.org> wrote:
> On x86 machines we can use an emulator to run option ROMS as with other
> architectures. But with some additional effort (mostly due to the 16-bit
> nature of option ROMs) we can run them natively. Add support for this.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
>
> arch/x86/lib/Makefile | 3 +
> arch/x86/lib/bios.c | 348 +++++++++++++++++++++++++++++++++++++++++
> arch/x86/lib/bios.h | 98 ++++++++++++
> arch/x86/lib/bios_asm.S | 281 +++++++++++++++++++++++++++++++++
> arch/x86/lib/bios_interrupts.c | 219 ++++++++++++++++++++++++++
> 5 files changed, 949 insertions(+)
> create mode 100644 arch/x86/lib/bios.c
> create mode 100644 arch/x86/lib/bios.h
> create mode 100644 arch/x86/lib/bios_asm.S
> create mode 100644 arch/x86/lib/bios_interrupts.c
Applied to u-boot-x86.
^ permalink raw reply [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH 07/19] pci: Add general support for execution of video ROMs
2014-11-15 3:56 [U-Boot] [PATCH 0/19] x86: ivybridge: Add graphics support Simon Glass
` (5 preceding siblings ...)
2014-11-15 3:56 ` [U-Boot] [PATCH 06/19] x86: Add support for running option ROMs natively Simon Glass
@ 2014-11-15 3:56 ` Simon Glass
2014-11-25 21:49 ` Simon Glass
2014-11-15 3:56 ` [U-Boot] [PATCH 08/19] x86: video: Add video driver for bare x86 boards Simon Glass
` (11 subsequent siblings)
18 siblings, 1 reply; 40+ messages in thread
From: Simon Glass @ 2014-11-15 3:56 UTC (permalink / raw)
To: u-boot
Some platforms don't have native code for dealing with their video
hardware. In some cases they use a binary blob to set it up and perform
required actions like setting the video mode. This approach is a hangover
from the old PC days where a ROM was provided and executed during startup.
Even now, these ROMs are supplied as a way to set up video. It avoids the
code for every video chip needing to be provided in the boot loader. But
it makes the video much less flexible - e.g. it is not possible to do
anything else while the video init is happening (including waiting hundreds
of milliseconds for display panels to start up).
In any case, to deal with this sad state of affairs, provide an API for
execution of x86 video ROMs, either natively or through emulation.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
drivers/pci/Makefile | 2 +-
drivers/pci/pci_rom.c | 276 ++++++++++++++++++++++++++++++++++++++++++++++++++
include/bios_emul.h | 14 +++
include/pci_rom.h | 58 +++++++++++
4 files changed, 349 insertions(+), 1 deletion(-)
create mode 100644 drivers/pci/pci_rom.c
create mode 100644 include/pci_rom.h
diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
index e73a498..55d6a9b 100644
--- a/drivers/pci/Makefile
+++ b/drivers/pci/Makefile
@@ -6,7 +6,7 @@
#
obj-$(CONFIG_FSL_PCI_INIT) += fsl_pci_init.o
-obj-$(CONFIG_PCI) += pci.o pci_auto.o
+obj-$(CONFIG_PCI) += pci.o pci_auto.o pci_rom.o
obj-$(CONFIG_PCI_INDIRECT_BRIDGE) += pci_indirect.o
obj-$(CONFIG_PCI_GT64120) += pci_gt64120.o
obj-$(CONFIG_PCI_MSC01) += pci_msc01.o
diff --git a/drivers/pci/pci_rom.c b/drivers/pci/pci_rom.c
new file mode 100644
index 0000000..c47ffa6
--- /dev/null
+++ b/drivers/pci/pci_rom.c
@@ -0,0 +1,276 @@
+/*
+ * Copyright (C) 2014 Google, Inc
+ *
+ * From coreboot, originally based on the Linux kernel (drivers/pci/pci.c).
+ *
+ * Modifications are:
+ * Copyright (C) 2003-2004 Linux Networx
+ * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx)
+ * Copyright (C) 2003-2006 Ronald G. Minnich <rminnich@gmail.com>
+ * Copyright (C) 2004-2005 Li-Ta Lo <ollie@lanl.gov>
+ * Copyright (C) 2005-2006 Tyan
+ * (Written by Yinghai Lu <yhlu@tyan.com> for Tyan)
+ * Copyright (C) 2005-2009 coresystems GmbH
+ * (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH)
+ *
+ * PCI Bus Services, see include/linux/pci.h for further explanation.
+ *
+ * Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter,
+ * David Mosberger-Tang
+ *
+ * Copyright 1997 -- 1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
+
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include <common.h>
+#include <bios_emul.h>
+#include <errno.h>
+#include <malloc.h>
+#include <pci.h>
+#include <pci_rom.h>
+#include <vbe.h>
+#include <video_fb.h>
+
+#ifdef CONFIG_HAVE_ACPI_RESUME
+#include <asm/acpi.h>
+#endif
+
+__weak bool board_should_run_oprom(pci_dev_t dev)
+{
+ return true;
+}
+
+static bool should_load_oprom(pci_dev_t dev)
+{
+#ifdef CONFIG_HAVE_ACPI_RESUME
+ if (acpi_get_slp_type() == 3)
+ return false;
+#endif
+ if (IS_ENABLED(CONFIG_ALWAYS_LOAD_OPROM))
+ return 1;
+ if (board_should_run_oprom(dev))
+ return 1;
+
+ return 0;
+}
+
+__weak uint32_t board_map_oprom_vendev(uint32_t vendev)
+{
+ return vendev;
+}
+
+static int pci_rom_probe(pci_dev_t dev, uint class,
+ struct pci_rom_header **hdrp)
+{
+ struct pci_rom_header *rom_header;
+ struct pci_rom_data *rom_data;
+ u16 vendor, device;
+ u32 vendev;
+ u32 mapped_vendev;
+ u32 rom_address;
+
+ pci_read_config_word(dev, PCI_VENDOR_ID, &vendor);
+ pci_read_config_word(dev, PCI_DEVICE_ID, &device);
+ vendev = vendor << 16 | device;
+ mapped_vendev = board_map_oprom_vendev(vendev);
+ if (vendev != mapped_vendev)
+ debug("Device ID mapped to %#08x\n", mapped_vendev);
+
+#ifdef CONFIG_X86_OPTION_ROM_ADDR
+ rom_address = CONFIG_X86_OPTION_ROM_ADDR;
+#else
+ pci_write_config_dword(dev, PCI_ROM_ADDRESS, (u32)PCI_ROM_ADDRESS_MASK);
+ pci_read_config_dword(dev, PCI_ROM_ADDRESS, &rom_address);
+ if (rom_address == 0x00000000 || rom_address == 0xffffffff) {
+ debug("%s: rom_address=%x\n", __func__, rom_address);
+ return -ENOENT;
+ }
+
+ /* Enable expansion ROM address decoding. */
+ pci_write_config_dword(dev, PCI_ROM_ADDRESS,
+ rom_address | PCI_ROM_ADDRESS_ENABLE);
+#endif
+ debug("Option ROM address %x\n", rom_address);
+ rom_header = (struct pci_rom_header *)rom_address;
+
+ debug("PCI expansion ROM, signature %#04x, INIT size %#04x, data ptr %#04x\n",
+ le32_to_cpu(rom_header->signature),
+ rom_header->size * 512, le32_to_cpu(rom_header->data));
+
+ if (le32_to_cpu(rom_header->signature) != PCI_ROM_HDR) {
+ printf("Incorrect expansion ROM header signature %04x\n",
+ le32_to_cpu(rom_header->signature));
+ return -EINVAL;
+ }
+
+ rom_data = (((void *)rom_header) + le32_to_cpu(rom_header->data));
+
+ debug("PCI ROM image, vendor ID %04x, device ID %04x,\n",
+ rom_data->vendor, rom_data->device);
+
+ /* If the device id is mapped, a mismatch is expected */
+ if ((vendor != rom_data->vendor || device != rom_data->device) &&
+ (vendev == mapped_vendev)) {
+ printf("ID mismatch: vendor ID %04x, device ID %04x\n",
+ rom_data->vendor, rom_data->device);
+ return -EPERM;
+ }
+
+ debug("PCI ROM image, Class Code %04x%02x, Code Type %02x\n",
+ rom_data->class_hi, rom_data->class_lo, rom_data->type);
+
+ if (class != ((rom_data->class_hi << 8) | rom_data->class_lo)) {
+ debug("Class Code mismatch ROM %08x, dev %08x\n",
+ (rom_data->class_hi << 8) | rom_data->class_lo,
+ class);
+ }
+ *hdrp = rom_header;
+
+ return 0;
+}
+
+int pci_rom_load(uint16_t class, struct pci_rom_header *rom_header,
+ struct pci_rom_header **ram_headerp)
+{
+ struct pci_rom_data *rom_data;
+ unsigned int rom_size;
+ unsigned int image_size = 0;
+ void *target;
+
+ do {
+ /* Get next image, until we see an x86 version */
+ rom_header = (struct pci_rom_header *)((void *)rom_header +
+ image_size);
+
+ rom_data = (struct pci_rom_data *)((void *)rom_header +
+ le32_to_cpu(rom_header->data));
+
+ image_size = le32_to_cpu(rom_data->ilen) * 512;
+ } while ((rom_data->type != 0) && (rom_data->indicator != 0));
+
+ if (rom_data->type != 0)
+ return -EACCES;
+
+ rom_size = rom_header->size * 512;
+
+ target = (void *)PCI_VGA_RAM_IMAGE_START;
+ if (target != rom_header) {
+ debug("Copying VGA ROM Image from %p to %p, 0x%x bytes\n",
+ rom_header, target, rom_size);
+ memcpy(target, rom_header, rom_size);
+ if (memcmp(target, rom_header, rom_size)) {
+ printf("VGA ROM copy failed\n");
+ return -EFAULT;
+ }
+ }
+ *ram_headerp = target;
+
+ return 0;
+}
+
+static struct vbe_mode_info mode_info;
+
+int vbe_get_video_info(struct graphic_device *gdev)
+{
+#ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE
+ struct vesa_mode_info *vesa = &mode_info.vesa;
+
+ gdev->winSizeX = vesa->x_resolution;
+ gdev->winSizeY = vesa->y_resolution;
+
+ gdev->plnSizeX = vesa->x_resolution;
+ gdev->plnSizeY = vesa->y_resolution;
+
+ gdev->gdfBytesPP = vesa->bits_per_pixel / 8;
+
+ switch (vesa->bits_per_pixel) {
+ case 24:
+ gdev->gdfIndex = GDF_32BIT_X888RGB;
+ break;
+ case 16:
+ gdev->gdfIndex = GDF_16BIT_565RGB;
+ break;
+ default:
+ gdev->gdfIndex = GDF__8BIT_INDEX;
+ break;
+ }
+
+ gdev->isaBase = CONFIG_SYS_ISA_IO_BASE_ADDRESS;
+ gdev->pciBase = vesa->phys_base_ptr;
+
+ gdev->frameAdrs = vesa->phys_base_ptr;
+ gdev->memSize = vesa->bytes_per_scanline * vesa->y_resolution;
+
+ gdev->vprBase = vesa->phys_base_ptr;
+ gdev->cprBase = vesa->phys_base_ptr;
+
+ return 0;
+#else
+ return -ENOSYS;
+#endif
+}
+
+int pci_run_vga_bios(pci_dev_t dev, int (*int15_handler)(void), bool emulate)
+{
+ struct pci_rom_header *rom, *ram;
+ int vesa_mode = -1;
+ uint16_t class;
+ int ret;
+
+ /* Only execute VGA ROMs */
+ pci_read_config_word(dev, PCI_CLASS_DEVICE, &class);
+ if ((class ^ PCI_CLASS_DISPLAY_VGA) & 0xff00) {
+ debug("%s: Class %#x, should be %#x\n", __func__, class,
+ PCI_CLASS_DISPLAY_VGA);
+ return -ENODEV;
+ }
+
+ if (!should_load_oprom(dev))
+ return -ENXIO;
+
+ ret = pci_rom_probe(dev, class, &rom);
+ if (ret)
+ return ret;
+
+ ret = pci_rom_load(class, rom, &ram);
+ if (ret)
+ return ret;
+
+ if (!board_should_run_oprom(dev))
+ return -ENXIO;
+
+#if defined(CONFIG_FRAMEBUFFER_SET_VESA_MODE) && \
+ defined(CONFIG_FRAMEBUFFER_VESA_MODE)
+ vesa_mode = CONFIG_FRAMEBUFFER_VESA_MODE;
+#endif
+ if (emulate) {
+#ifdef CONFIG_BIOSEMU
+ BE_VGAInfo *info;
+
+ ret = biosemu_setup(dev, &info);
+ if (ret)
+ return ret;
+ biosemu_set_interrupt_handler(0x15, int15_handler);
+ ret = biosemu_run(dev, (uchar *)ram, 1 << 16, info, true,
+ vesa_mode, &mode_info);
+ if (ret)
+ return ret;
+#else
+ printf("BIOS emulation not available - see CONFIG_BIOSEMU\n");
+ return -ENOSYS;
+#endif
+ } else {
+#ifdef CONFIG_X86
+ bios_set_interrupt_handler(0x15, int15_handler);
+
+ bios_run_on_x86(dev, (unsigned long)ram, vesa_mode,
+ &mode_info);
+#else
+ printf("BIOS native execution is only available on x86\n");
+ return -ENOSYS;
+#endif
+ }
+
+ return 0;
+}
diff --git a/include/bios_emul.h b/include/bios_emul.h
index 35d1ff3..a11d4e4 100644
--- a/include/bios_emul.h
+++ b/include/bios_emul.h
@@ -40,4 +40,18 @@ struct vbe_mode_info;
int BootVideoCardBIOS(pci_dev_t pcidev, BE_VGAInfo **pVGAInfo, int cleanUp);
+/* Run a BIOS ROM natively (only supported on x86 machines) */
+void bios_run_on_x86(pci_dev_t pcidev, unsigned long addr, int vesa_mode,
+ struct vbe_mode_info *mode_info);
+
+/**
+ * bios_set_interrupt_handler() - Install an interrupt handler for the BIOS
+ *
+ * This installs an interrupt handler that the BIOS will call when needed.
+ *
+ * @intnum: Interrupt number to install a handler for
+ * @int_handler_func: Function to call to handle interrupt
+ */
+void bios_set_interrupt_handler(int intnum, int (*int_handler_func)(void));
+
#endif
diff --git a/include/pci_rom.h b/include/pci_rom.h
new file mode 100644
index 0000000..8b2674c
--- /dev/null
+++ b/include/pci_rom.h
@@ -0,0 +1,58 @@
+/*
+ * From coreboot file of same name
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _PCI_ROM_H
+#define _PCI_ROM_H
+
+#define PCI_ROM_HDR 0xaa55
+#define PCI_VGA_RAM_IMAGE_START 0xc0000
+
+struct pci_rom_header {
+ uint16_t signature;
+ uint8_t size;
+ uint8_t init[3];
+ uint8_t reserved[0x12];
+ uint16_t data;
+};
+
+struct pci_rom_data {
+ uint32_t signature;
+ uint16_t vendor;
+ uint16_t device;
+ uint16_t reserved_1;
+ uint16_t dlen;
+ uint8_t drevision;
+ uint8_t class_lo;
+ uint16_t class_hi;
+ uint16_t ilen;
+ uint16_t irevision;
+ uint8_t type;
+ uint8_t indicator;
+ uint16_t reserved_2;
+};
+
+ /**
+ * pci_run_vga_bios() - Run the VGA BIOS in an x86 PC
+ *
+ * @dev: Video device containing the BIOS
+ * @int15_handler: Function to call to handle int 0x15
+ * @emulate: true to use the x86 emulator, false to run native
+ */
+int pci_run_vga_bios(pci_dev_t dev, int (*int15_handler)(void), bool emulate);
+
+/**
+ * board_map_oprom_vendev() - map several PCI IDs to the one the ROM expects
+ *
+ * Some VGA option roms are used for several chipsets but they only have one
+ * PCI ID in their header. If we encounter such an option rom, we need to do
+ * the mapping ourselves.
+ *
+ * @vendev: Vendor and device for the video device
+ * @return standard vendor and device expected by the ROM
+ */
+uint32_t board_map_oprom_vendev(uint32_t vendev);
+
+#endif
--
2.1.0.rc2.206.gedb03e5
^ permalink raw reply related [flat|nested] 40+ messages in thread* [U-Boot] [PATCH 07/19] pci: Add general support for execution of video ROMs
2014-11-15 3:56 ` [U-Boot] [PATCH 07/19] pci: Add general support for execution of video ROMs Simon Glass
@ 2014-11-25 21:49 ` Simon Glass
0 siblings, 0 replies; 40+ messages in thread
From: Simon Glass @ 2014-11-25 21:49 UTC (permalink / raw)
To: u-boot
On 14 November 2014 at 20:56, Simon Glass <sjg@chromium.org> wrote:
> Some platforms don't have native code for dealing with their video
> hardware. In some cases they use a binary blob to set it up and perform
> required actions like setting the video mode. This approach is a hangover
> from the old PC days where a ROM was provided and executed during startup.
>
> Even now, these ROMs are supplied as a way to set up video. It avoids the
> code for every video chip needing to be provided in the boot loader. But
> it makes the video much less flexible - e.g. it is not possible to do
> anything else while the video init is happening (including waiting hundreds
> of milliseconds for display panels to start up).
>
> In any case, to deal with this sad state of affairs, provide an API for
> execution of x86 video ROMs, either natively or through emulation.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
Applied to u-boot-x86.
^ permalink raw reply [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH 08/19] x86: video: Add video driver for bare x86 boards
2014-11-15 3:56 [U-Boot] [PATCH 0/19] x86: ivybridge: Add graphics support Simon Glass
` (6 preceding siblings ...)
2014-11-15 3:56 ` [U-Boot] [PATCH 07/19] pci: Add general support for execution of video ROMs Simon Glass
@ 2014-11-15 3:56 ` Simon Glass
2014-11-15 7:26 ` Anatolij Gustschin
2014-11-15 3:56 ` [U-Boot] [PATCH 09/19] x86: Allow an option ROM to be built into U-Boot Simon Glass
` (10 subsequent siblings)
18 siblings, 1 reply; 40+ messages in thread
From: Simon Glass @ 2014-11-15 3:56 UTC (permalink / raw)
To: u-boot
Add a very simple driver which uses vesa to discover the video mode and
then provides a frame buffer for use by U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
drivers/video/Makefile | 1 +
drivers/video/x86_fb.c | 37 +++++++++++++++++++++++++++++++++++++
include/video_fb.h | 2 +-
3 files changed, 39 insertions(+), 1 deletion(-)
create mode 100644 drivers/video/x86_fb.c
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 14a6781..000f389 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -41,6 +41,7 @@ obj-$(CONFIG_VIDEO_SM501) += sm501.o
obj-$(CONFIG_VIDEO_SMI_LYNXEM) += smiLynxEM.o videomodes.o
obj-$(CONFIG_VIDEO_TEGRA) += tegra.o
obj-$(CONFIG_VIDEO_VCXK) += bus_vcxk.o
+obj-$(CONFIG_VIDEO_X86) += x86_fb.o
obj-$(CONFIG_FORMIKE) += formike.o
obj-$(CONFIG_AM335X_LCD) += am335x-fb.o
obj-$(CONFIG_VIDEO_PARADE) += parade.o
diff --git a/drivers/video/x86_fb.c b/drivers/video/x86_fb.c
new file mode 100644
index 0000000..8743a8c
--- /dev/null
+++ b/drivers/video/x86_fb.c
@@ -0,0 +1,37 @@
+/*
+ *
+ * Vesa frame buffer driver for x86
+ *
+ * Copyright (C) 2014 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <video_fb.h>
+#include <vbe.h>
+#include "videomodes.h"
+
+/*
+ * The Graphic Device
+ */
+GraphicDevice ctfb;
+
+void *video_hw_init(void)
+{
+ GraphicDevice *gdev = &ctfb;
+ int bits_per_pixel;
+
+ printf("Video: ");
+ if (vbe_get_video_info(gdev)) {
+ printf("No video mode configured\n");
+ return NULL;
+ }
+
+ bits_per_pixel = gdev->gdfBytesPP * 8;
+ sprintf(gdev->modeIdent, "%dx%dx%d", gdev->winSizeX, gdev->winSizeY,
+ bits_per_pixel);
+ printf("%s\n", gdev->modeIdent);
+
+ return (void *)gdev;
+}
diff --git a/include/video_fb.h b/include/video_fb.h
index 6cd4e37..55ec24d 100644
--- a/include/video_fb.h
+++ b/include/video_fb.h
@@ -40,7 +40,7 @@
/* Export Graphic Driver Control */
/******************************************************************************/
-typedef struct {
+typedef struct graphic_device {
unsigned int isaBase;
unsigned int pciBase;
unsigned int dprBase;
--
2.1.0.rc2.206.gedb03e5
^ permalink raw reply related [flat|nested] 40+ messages in thread* [U-Boot] [PATCH 08/19] x86: video: Add video driver for bare x86 boards
2014-11-15 3:56 ` [U-Boot] [PATCH 08/19] x86: video: Add video driver for bare x86 boards Simon Glass
@ 2014-11-15 7:26 ` Anatolij Gustschin
2014-11-25 21:49 ` Simon Glass
0 siblings, 1 reply; 40+ messages in thread
From: Anatolij Gustschin @ 2014-11-15 7:26 UTC (permalink / raw)
To: u-boot
Hi Simon,
On Fri, 14 Nov 2014 20:56:34 -0700
Simon Glass <sjg@chromium.org> wrote:
> Add a very simple driver which uses vesa to discover the video mode and
> then provides a frame buffer for use by U-Boot.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
>
> drivers/video/Makefile | 1 +
> drivers/video/x86_fb.c | 37 +++++++++++++++++++++++++++++++++++++
> include/video_fb.h | 2 +-
> 3 files changed, 39 insertions(+), 1 deletion(-)
> create mode 100644 drivers/video/x86_fb.c
Acked-by: Anatolij Gustschin <agust@denx.de>
Thanks,
Anatolij
^ permalink raw reply [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH 08/19] x86: video: Add video driver for bare x86 boards
2014-11-15 7:26 ` Anatolij Gustschin
@ 2014-11-25 21:49 ` Simon Glass
0 siblings, 0 replies; 40+ messages in thread
From: Simon Glass @ 2014-11-25 21:49 UTC (permalink / raw)
To: u-boot
On 15 November 2014 at 00:26, Anatolij Gustschin <agust@denx.de> wrote:
> Hi Simon,
>
> On Fri, 14 Nov 2014 20:56:34 -0700
> Simon Glass <sjg@chromium.org> wrote:
>
>> Add a very simple driver which uses vesa to discover the video mode and
>> then provides a frame buffer for use by U-Boot.
>>
>> Signed-off-by: Simon Glass <sjg@chromium.org>
>> ---
>>
>> drivers/video/Makefile | 1 +
>> drivers/video/x86_fb.c | 37 +++++++++++++++++++++++++++++++++++++
>> include/video_fb.h | 2 +-
>> 3 files changed, 39 insertions(+), 1 deletion(-)
>> create mode 100644 drivers/video/x86_fb.c
>
> Acked-by: Anatolij Gustschin <agust@denx.de>
>
> Thanks,
>
> Anatolij
I had to move the video_fh.h change to the previous patch to maintain
bisectability.
Applied to u-boot-x86.
^ permalink raw reply [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH 09/19] x86: Allow an option ROM to be built into U-Boot
2014-11-15 3:56 [U-Boot] [PATCH 0/19] x86: ivybridge: Add graphics support Simon Glass
` (7 preceding siblings ...)
2014-11-15 3:56 ` [U-Boot] [PATCH 08/19] x86: video: Add video driver for bare x86 boards Simon Glass
@ 2014-11-15 3:56 ` Simon Glass
2014-11-25 21:49 ` Simon Glass
2014-11-15 3:56 ` [U-Boot] [PATCH 10/19] x86: Add initial video device init for Intel GMA Simon Glass
` (9 subsequent siblings)
18 siblings, 1 reply; 40+ messages in thread
From: Simon Glass @ 2014-11-15 3:56 UTC (permalink / raw)
To: u-boot
Some x86 machines require a binary blob containing 16-bit initialisation
code for their video hardware. Allow this to be built into the x86 ROM so
that it is accessible during boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
Makefile | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Makefile b/Makefile
index feb1b4c..04053c9 100644
--- a/Makefile
+++ b/Makefile
@@ -983,6 +983,9 @@ u-boot.rom: u-boot-x86-16bit.bin u-boot-dtb.bin \
$(objtree)/tools/ifdtool -w \
$(CONFIG_SYS_X86_START16):$(objtree)/u-boot-x86-16bit.bin \
u-boot.tmp
+ $(objtree)/tools/ifdtool -w \
+ $(CONFIG_X86_OPTION_ROM_ADDR):$(srctree)/board/$(BOARDDIR)/$(CONFIG_X86_OPTION_ROM_FILENAME) \
+ u-boot.tmp
mv u-boot.tmp $@
OBJCOPYFLAGS_u-boot-x86-16bit.bin := -O binary -j .start16 -j .resetvec
--
2.1.0.rc2.206.gedb03e5
^ permalink raw reply related [flat|nested] 40+ messages in thread* [U-Boot] [PATCH 10/19] x86: Add initial video device init for Intel GMA
2014-11-15 3:56 [U-Boot] [PATCH 0/19] x86: ivybridge: Add graphics support Simon Glass
` (8 preceding siblings ...)
2014-11-15 3:56 ` [U-Boot] [PATCH 09/19] x86: Allow an option ROM to be built into U-Boot Simon Glass
@ 2014-11-15 3:56 ` Simon Glass
2014-11-25 21:49 ` Simon Glass
2014-11-15 3:56 ` [U-Boot] [PATCH 11/19] x86: dts: Add video information to the device tree Simon Glass
` (8 subsequent siblings)
18 siblings, 1 reply; 40+ messages in thread
From: Simon Glass @ 2014-11-15 3:56 UTC (permalink / raw)
To: u-boot
Intel's Graphics Media Accelerator (GMA) is a generic name for a wide range
of video devices. Add code to set up the hardware on ivybridge. Part of the
init happens in native code, part of it happens in a 16-bit option ROM for
those nostalgic for the 1970s.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
arch/x86/cpu/ivybridge/Makefile | 1 +
arch/x86/cpu/ivybridge/bd82x6x.c | 13 +-
arch/x86/cpu/ivybridge/gma.c | 756 ++++++++++++++++++++++++++
arch/x86/cpu/ivybridge/gma.h | 157 ++++++
arch/x86/include/asm/arch-ivybridge/bd82x6x.h | 2 +
doc/device-tree-bindings/video/intel-gma.txt | 40 ++
include/fdtdec.h | 1 +
lib/fdtdec.c | 1 +
8 files changed, 970 insertions(+), 1 deletion(-)
create mode 100644 arch/x86/cpu/ivybridge/gma.c
create mode 100644 arch/x86/cpu/ivybridge/gma.h
create mode 100644 doc/device-tree-bindings/video/intel-gma.txt
diff --git a/arch/x86/cpu/ivybridge/Makefile b/arch/x86/cpu/ivybridge/Makefile
index 1296a78..0c7efae 100644
--- a/arch/x86/cpu/ivybridge/Makefile
+++ b/arch/x86/cpu/ivybridge/Makefile
@@ -9,6 +9,7 @@ obj-y += car.o
obj-y += cpu.o
obj-y += early_init.o
obj-y += early_me.o
+obj-y += gma.o
obj-y += lpc.o
obj-y += me_status.o
obj-y += model_206ax.o
diff --git a/arch/x86/cpu/ivybridge/bd82x6x.c b/arch/x86/cpu/ivybridge/bd82x6x.c
index 739f979..65a17d3 100644
--- a/arch/x86/cpu/ivybridge/bd82x6x.c
+++ b/arch/x86/cpu/ivybridge/bd82x6x.c
@@ -91,7 +91,8 @@ int bd82x6x_init_pci_devices(void)
const void *blob = gd->fdt_blob;
struct pci_controller *hose;
struct x86_cpu_priv *cpu;
- int sata_node;
+ int sata_node, gma_node;
+ int ret;
hose = pci_bus_to_hose(0);
lpc_enable(PCH_LPC_DEV);
@@ -111,6 +112,16 @@ int bd82x6x_init_pci_devices(void)
return -ENOMEM;
model_206ax_init(cpu);
+ gma_node = fdtdec_next_compatible(blob, 0, COMPAT_INTEL_GMA);
+ if (gma_node < 0) {
+ debug("%s: Cannot find GMA node\n", __func__);
+ return -EINVAL;
+ }
+ ret = gma_func0_init(PCH_VIDEO_DEV, pci_bus_to_hose(0), blob,
+ gma_node);
+ if (ret)
+ return ret;
+
return 0;
}
diff --git a/arch/x86/cpu/ivybridge/gma.c b/arch/x86/cpu/ivybridge/gma.c
new file mode 100644
index 0000000..3d7f740
--- /dev/null
+++ b/arch/x86/cpu/ivybridge/gma.c
@@ -0,0 +1,756 @@
+/*
+ * From Coreboot file of the same name
+ *
+ * Copyright (C) 2011 Chromium OS Authors
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include <common.h>
+#include <bios_emul.h>
+#include <errno.h>
+#include <fdtdec.h>
+#include <pci_rom.h>
+#include <asm/io.h>
+#include <asm/pci.h>
+#include <asm/arch/pch.h>
+#include <asm/arch/sandybridge.h>
+
+struct gt_powermeter {
+ u16 reg;
+ u32 value;
+};
+
+static const struct gt_powermeter snb_pm_gt1[] = {
+ { 0xa200, 0xcc000000 },
+ { 0xa204, 0x07000040 },
+ { 0xa208, 0x0000fe00 },
+ { 0xa20c, 0x00000000 },
+ { 0xa210, 0x17000000 },
+ { 0xa214, 0x00000021 },
+ { 0xa218, 0x0817fe19 },
+ { 0xa21c, 0x00000000 },
+ { 0xa220, 0x00000000 },
+ { 0xa224, 0xcc000000 },
+ { 0xa228, 0x07000040 },
+ { 0xa22c, 0x0000fe00 },
+ { 0xa230, 0x00000000 },
+ { 0xa234, 0x17000000 },
+ { 0xa238, 0x00000021 },
+ { 0xa23c, 0x0817fe19 },
+ { 0xa240, 0x00000000 },
+ { 0xa244, 0x00000000 },
+ { 0xa248, 0x8000421e },
+ { 0 }
+};
+
+static const struct gt_powermeter snb_pm_gt2[] = {
+ { 0xa200, 0x330000a6 },
+ { 0xa204, 0x402d0031 },
+ { 0xa208, 0x00165f83 },
+ { 0xa20c, 0xf1000000 },
+ { 0xa210, 0x00000000 },
+ { 0xa214, 0x00160016 },
+ { 0xa218, 0x002a002b },
+ { 0xa21c, 0x00000000 },
+ { 0xa220, 0x00000000 },
+ { 0xa224, 0x330000a6 },
+ { 0xa228, 0x402d0031 },
+ { 0xa22c, 0x00165f83 },
+ { 0xa230, 0xf1000000 },
+ { 0xa234, 0x00000000 },
+ { 0xa238, 0x00160016 },
+ { 0xa23c, 0x002a002b },
+ { 0xa240, 0x00000000 },
+ { 0xa244, 0x00000000 },
+ { 0xa248, 0x8000421e },
+ { 0 }
+};
+
+static const struct gt_powermeter ivb_pm_gt1[] = {
+ { 0xa800, 0x00000000 },
+ { 0xa804, 0x00021c00 },
+ { 0xa808, 0x00000403 },
+ { 0xa80c, 0x02001700 },
+ { 0xa810, 0x05000200 },
+ { 0xa814, 0x00000000 },
+ { 0xa818, 0x00690500 },
+ { 0xa81c, 0x0000007f },
+ { 0xa820, 0x01002501 },
+ { 0xa824, 0x00000300 },
+ { 0xa828, 0x01000331 },
+ { 0xa82c, 0x0000000c },
+ { 0xa830, 0x00010016 },
+ { 0xa834, 0x01100101 },
+ { 0xa838, 0x00010103 },
+ { 0xa83c, 0x00041300 },
+ { 0xa840, 0x00000b30 },
+ { 0xa844, 0x00000000 },
+ { 0xa848, 0x7f000000 },
+ { 0xa84c, 0x05000008 },
+ { 0xa850, 0x00000001 },
+ { 0xa854, 0x00000004 },
+ { 0xa858, 0x00000007 },
+ { 0xa85c, 0x00000000 },
+ { 0xa860, 0x00010000 },
+ { 0xa248, 0x0000221e },
+ { 0xa900, 0x00000000 },
+ { 0xa904, 0x00001c00 },
+ { 0xa908, 0x00000000 },
+ { 0xa90c, 0x06000000 },
+ { 0xa910, 0x09000200 },
+ { 0xa914, 0x00000000 },
+ { 0xa918, 0x00590000 },
+ { 0xa91c, 0x00000000 },
+ { 0xa920, 0x04002501 },
+ { 0xa924, 0x00000100 },
+ { 0xa928, 0x03000410 },
+ { 0xa92c, 0x00000000 },
+ { 0xa930, 0x00020000 },
+ { 0xa934, 0x02070106 },
+ { 0xa938, 0x00010100 },
+ { 0xa93c, 0x00401c00 },
+ { 0xa940, 0x00000000 },
+ { 0xa944, 0x00000000 },
+ { 0xa948, 0x10000e00 },
+ { 0xa94c, 0x02000004 },
+ { 0xa950, 0x00000001 },
+ { 0xa954, 0x00000004 },
+ { 0xa960, 0x00060000 },
+ { 0xaa3c, 0x00001c00 },
+ { 0xaa54, 0x00000004 },
+ { 0xaa60, 0x00060000 },
+ { 0 }
+};
+
+static const struct gt_powermeter ivb_pm_gt2[] = {
+ { 0xa800, 0x10000000 },
+ { 0xa804, 0x00033800 },
+ { 0xa808, 0x00000902 },
+ { 0xa80c, 0x0c002f00 },
+ { 0xa810, 0x12000400 },
+ { 0xa814, 0x00000000 },
+ { 0xa818, 0x00d20800 },
+ { 0xa81c, 0x00000002 },
+ { 0xa820, 0x03004b02 },
+ { 0xa824, 0x00000600 },
+ { 0xa828, 0x07000773 },
+ { 0xa82c, 0x00000000 },
+ { 0xa830, 0x00010032 },
+ { 0xa834, 0x1520040d },
+ { 0xa838, 0x00020105 },
+ { 0xa83c, 0x00083700 },
+ { 0xa840, 0x0000151d },
+ { 0xa844, 0x00000000 },
+ { 0xa848, 0x20001b00 },
+ { 0xa84c, 0x0a000010 },
+ { 0xa850, 0x00000000 },
+ { 0xa854, 0x00000008 },
+ { 0xa858, 0x00000008 },
+ { 0xa85c, 0x00000000 },
+ { 0xa860, 0x00020000 },
+ { 0xa248, 0x0000221e },
+ { 0xa900, 0x00000000 },
+ { 0xa904, 0x00003500 },
+ { 0xa908, 0x00000000 },
+ { 0xa90c, 0x0c000000 },
+ { 0xa910, 0x12000500 },
+ { 0xa914, 0x00000000 },
+ { 0xa918, 0x00b20000 },
+ { 0xa91c, 0x00000000 },
+ { 0xa920, 0x08004b02 },
+ { 0xa924, 0x00000200 },
+ { 0xa928, 0x07000820 },
+ { 0xa92c, 0x00000000 },
+ { 0xa930, 0x00030000 },
+ { 0xa934, 0x050f020d },
+ { 0xa938, 0x00020300 },
+ { 0xa93c, 0x00903900 },
+ { 0xa940, 0x00000000 },
+ { 0xa944, 0x00000000 },
+ { 0xa948, 0x20001b00 },
+ { 0xa94c, 0x0a000010 },
+ { 0xa950, 0x00000000 },
+ { 0xa954, 0x00000008 },
+ { 0xa960, 0x00110000 },
+ { 0xaa3c, 0x00003900 },
+ { 0xaa54, 0x00000008 },
+ { 0xaa60, 0x00110000 },
+ { 0 }
+};
+
+static const struct gt_powermeter ivb_pm_gt2_17w[] = {
+ { 0xa800, 0x20000000 },
+ { 0xa804, 0x000e3800 },
+ { 0xa808, 0x00000806 },
+ { 0xa80c, 0x0c002f00 },
+ { 0xa810, 0x0c000800 },
+ { 0xa814, 0x00000000 },
+ { 0xa818, 0x00d20d00 },
+ { 0xa81c, 0x000000ff },
+ { 0xa820, 0x03004b02 },
+ { 0xa824, 0x00000600 },
+ { 0xa828, 0x07000773 },
+ { 0xa82c, 0x00000000 },
+ { 0xa830, 0x00020032 },
+ { 0xa834, 0x1520040d },
+ { 0xa838, 0x00020105 },
+ { 0xa83c, 0x00083700 },
+ { 0xa840, 0x000016ff },
+ { 0xa844, 0x00000000 },
+ { 0xa848, 0xff000000 },
+ { 0xa84c, 0x0a000010 },
+ { 0xa850, 0x00000002 },
+ { 0xa854, 0x00000008 },
+ { 0xa858, 0x0000000f },
+ { 0xa85c, 0x00000000 },
+ { 0xa860, 0x00020000 },
+ { 0xa248, 0x0000221e },
+ { 0xa900, 0x00000000 },
+ { 0xa904, 0x00003800 },
+ { 0xa908, 0x00000000 },
+ { 0xa90c, 0x0c000000 },
+ { 0xa910, 0x12000800 },
+ { 0xa914, 0x00000000 },
+ { 0xa918, 0x00b20000 },
+ { 0xa91c, 0x00000000 },
+ { 0xa920, 0x08004b02 },
+ { 0xa924, 0x00000300 },
+ { 0xa928, 0x01000820 },
+ { 0xa92c, 0x00000000 },
+ { 0xa930, 0x00030000 },
+ { 0xa934, 0x15150406 },
+ { 0xa938, 0x00020300 },
+ { 0xa93c, 0x00903900 },
+ { 0xa940, 0x00000000 },
+ { 0xa944, 0x00000000 },
+ { 0xa948, 0x20001b00 },
+ { 0xa94c, 0x0a000010 },
+ { 0xa950, 0x00000000 },
+ { 0xa954, 0x00000008 },
+ { 0xa960, 0x00110000 },
+ { 0xaa3c, 0x00003900 },
+ { 0xaa54, 0x00000008 },
+ { 0xaa60, 0x00110000 },
+ { 0 }
+};
+
+static const struct gt_powermeter ivb_pm_gt2_35w[] = {
+ { 0xa800, 0x00000000 },
+ { 0xa804, 0x00030400 },
+ { 0xa808, 0x00000806 },
+ { 0xa80c, 0x0c002f00 },
+ { 0xa810, 0x0c000300 },
+ { 0xa814, 0x00000000 },
+ { 0xa818, 0x00d20d00 },
+ { 0xa81c, 0x000000ff },
+ { 0xa820, 0x03004b02 },
+ { 0xa824, 0x00000600 },
+ { 0xa828, 0x07000773 },
+ { 0xa82c, 0x00000000 },
+ { 0xa830, 0x00020032 },
+ { 0xa834, 0x1520040d },
+ { 0xa838, 0x00020105 },
+ { 0xa83c, 0x00083700 },
+ { 0xa840, 0x000016ff },
+ { 0xa844, 0x00000000 },
+ { 0xa848, 0xff000000 },
+ { 0xa84c, 0x0a000010 },
+ { 0xa850, 0x00000001 },
+ { 0xa854, 0x00000008 },
+ { 0xa858, 0x00000008 },
+ { 0xa85c, 0x00000000 },
+ { 0xa860, 0x00020000 },
+ { 0xa248, 0x0000221e },
+ { 0xa900, 0x00000000 },
+ { 0xa904, 0x00003800 },
+ { 0xa908, 0x00000000 },
+ { 0xa90c, 0x0c000000 },
+ { 0xa910, 0x12000800 },
+ { 0xa914, 0x00000000 },
+ { 0xa918, 0x00b20000 },
+ { 0xa91c, 0x00000000 },
+ { 0xa920, 0x08004b02 },
+ { 0xa924, 0x00000300 },
+ { 0xa928, 0x01000820 },
+ { 0xa92c, 0x00000000 },
+ { 0xa930, 0x00030000 },
+ { 0xa934, 0x15150406 },
+ { 0xa938, 0x00020300 },
+ { 0xa93c, 0x00903900 },
+ { 0xa940, 0x00000000 },
+ { 0xa944, 0x00000000 },
+ { 0xa948, 0x20001b00 },
+ { 0xa94c, 0x0a000010 },
+ { 0xa950, 0x00000000 },
+ { 0xa954, 0x00000008 },
+ { 0xa960, 0x00110000 },
+ { 0xaa3c, 0x00003900 },
+ { 0xaa54, 0x00000008 },
+ { 0xaa60, 0x00110000 },
+ { 0 }
+};
+
+/*
+ * Some vga option roms are used for several chipsets but they only have one
+ * PCI ID in their header. If we encounter such an option rom, we need to do
+ * the mapping ourselves.
+ */
+
+u32 map_oprom_vendev(u32 vendev)
+{
+ u32 new_vendev = vendev;
+
+ switch (vendev) {
+ case 0x80860102: /* GT1 Desktop */
+ case 0x8086010a: /* GT1 Server */
+ case 0x80860112: /* GT2 Desktop */
+ case 0x80860116: /* GT2 Mobile */
+ case 0x80860122: /* GT2 Desktop >=1.3GHz */
+ case 0x80860126: /* GT2 Mobile >=1.3GHz */
+ case 0x80860156: /* IVB */
+ case 0x80860166: /* IVB */
+ /* Set to GT1 Mobile */
+ new_vendev = 0x80860106;
+ break;
+ }
+
+ return new_vendev;
+}
+
+static inline u32 gtt_read(void *bar, u32 reg)
+{
+ return readl(bar + reg);
+}
+
+static inline void gtt_write(void *bar, u32 reg, u32 data)
+{
+ writel(data, bar + reg);
+}
+
+static void gtt_write_powermeter(void *bar, const struct gt_powermeter *pm)
+{
+ for (; pm && pm->reg; pm++)
+ gtt_write(bar, pm->reg, pm->value);
+}
+
+#define GTT_RETRY 1000
+static int gtt_poll(void *bar, u32 reg, u32 mask, u32 value)
+{
+ unsigned try = GTT_RETRY;
+ u32 data;
+
+ while (try--) {
+ data = gtt_read(bar, reg);
+ if ((data & mask) == value)
+ return 1;
+ udelay(10);
+ }
+
+ printf("GT init timeout\n");
+ return 0;
+}
+
+static int gma_pm_init_pre_vbios(void *gtt_bar)
+{
+ u32 reg32;
+
+ debug("GT Power Management Init, silicon = %#x\n",
+ bridge_silicon_revision());
+
+ if (bridge_silicon_revision() < IVB_STEP_C0) {
+ /* 1: Enable force wake */
+ gtt_write(gtt_bar, 0xa18c, 0x00000001);
+ gtt_poll(gtt_bar, 0x130090, (1 << 0), (1 << 0));
+ } else {
+ gtt_write(gtt_bar, 0xa180, 1 << 5);
+ gtt_write(gtt_bar, 0xa188, 0xffff0001);
+ gtt_poll(gtt_bar, 0x130040, (1 << 0), (1 << 0));
+ }
+
+ if ((bridge_silicon_revision() & BASE_REV_MASK) == BASE_REV_SNB) {
+ /* 1d: Set GTT+0x42004 [15:14]=11 (SnB C1+) */
+ reg32 = gtt_read(gtt_bar, 0x42004);
+ reg32 |= (1 << 14) | (1 << 15);
+ gtt_write(gtt_bar, 0x42004, reg32);
+ }
+
+ if (bridge_silicon_revision() >= IVB_STEP_A0) {
+ /* Display Reset Acknowledge Settings */
+ reg32 = gtt_read(gtt_bar, 0x45010);
+ reg32 |= (1 << 1) | (1 << 0);
+ gtt_write(gtt_bar, 0x45010, reg32);
+ }
+
+ /* 2: Get GT SKU from GTT+0x911c[13] */
+ reg32 = gtt_read(gtt_bar, 0x911c);
+ if ((bridge_silicon_revision() & BASE_REV_MASK) == BASE_REV_SNB) {
+ if (reg32 & (1 << 13)) {
+ debug("SNB GT1 Power Meter Weights\n");
+ gtt_write_powermeter(gtt_bar, snb_pm_gt1);
+ } else {
+ debug("SNB GT2 Power Meter Weights\n");
+ gtt_write_powermeter(gtt_bar, snb_pm_gt2);
+ }
+ } else {
+ u32 unit = readl(MCHBAR_REG(0x5938)) & 0xf;
+
+ if (reg32 & (1 << 13)) {
+ /* GT1 SKU */
+ debug("IVB GT1 Power Meter Weights\n");
+ gtt_write_powermeter(gtt_bar, ivb_pm_gt1);
+ } else {
+ /* GT2 SKU */
+ u32 tdp = readl(MCHBAR_REG(0x5930)) & 0x7fff;
+ tdp /= (1 << unit);
+
+ if (tdp <= 17) {
+ /* <=17W ULV */
+ debug("IVB GT2 17W Power Meter Weights\n");
+ gtt_write_powermeter(gtt_bar, ivb_pm_gt2_17w);
+ } else if ((tdp >= 25) && (tdp <= 35)) {
+ /* 25W-35W */
+ debug("IVB GT2 25W-35W Power Meter Weights\n");
+ gtt_write_powermeter(gtt_bar, ivb_pm_gt2_35w);
+ } else {
+ /* All others */
+ debug("IVB GT2 35W Power Meter Weights\n");
+ gtt_write_powermeter(gtt_bar, ivb_pm_gt2_35w);
+ }
+ }
+ }
+
+ /* 3: Gear ratio map */
+ gtt_write(gtt_bar, 0xa004, 0x00000010);
+
+ /* 4: GFXPAUSE */
+ gtt_write(gtt_bar, 0xa000, 0x00070020);
+
+ /* 5: Dynamic EU trip control */
+ gtt_write(gtt_bar, 0xa080, 0x00000004);
+
+ /* 6: ECO bits */
+ reg32 = gtt_read(gtt_bar, 0xa180);
+ reg32 |= (1 << 26) | (1 << 31);
+ /* (bit 20=1 for SNB step D1+ / IVB A0+) */
+ if (bridge_silicon_revision() >= SNB_STEP_D1)
+ reg32 |= (1 << 20);
+ gtt_write(gtt_bar, 0xa180, reg32);
+
+ /* 6a: for SnB step D2+ only */
+ if (((bridge_silicon_revision() & BASE_REV_MASK) == BASE_REV_SNB) &&
+ (bridge_silicon_revision() >= SNB_STEP_D2)) {
+ reg32 = gtt_read(gtt_bar, 0x9400);
+ reg32 |= (1 << 7);
+ gtt_write(gtt_bar, 0x9400, reg32);
+
+ reg32 = gtt_read(gtt_bar, 0x941c);
+ reg32 &= 0xf;
+ reg32 |= (1 << 1);
+ gtt_write(gtt_bar, 0x941c, reg32);
+ gtt_poll(gtt_bar, 0x941c, (1 << 1), (0 << 1));
+ }
+
+ if ((bridge_silicon_revision() & BASE_REV_MASK) == BASE_REV_IVB) {
+ reg32 = gtt_read(gtt_bar, 0x907c);
+ reg32 |= (1 << 16);
+ gtt_write(gtt_bar, 0x907c, reg32);
+
+ /* 6b: Clocking reset controls */
+ gtt_write(gtt_bar, 0x9424, 0x00000001);
+ } else {
+ /* 6b: Clocking reset controls */
+ gtt_write(gtt_bar, 0x9424, 0x00000000);
+ }
+
+ /* 7 */
+ if (gtt_poll(gtt_bar, 0x138124, (1 << 31), (0 << 31))) {
+ gtt_write(gtt_bar, 0x138128, 0x00000029); /* Mailbox Data */
+ /* Mailbox Cmd for RC6 VID */
+ gtt_write(gtt_bar, 0x138124, 0x80000004);
+ if (gtt_poll(gtt_bar, 0x138124, (1 << 31), (0 << 31)))
+ gtt_write(gtt_bar, 0x138124, 0x8000000a);
+ gtt_poll(gtt_bar, 0x138124, (1 << 31), (0 << 31));
+ }
+
+ /* 8 */
+ gtt_write(gtt_bar, 0xa090, 0x00000000); /* RC Control */
+ gtt_write(gtt_bar, 0xa098, 0x03e80000); /* RC1e Wake Rate Limit */
+ gtt_write(gtt_bar, 0xa09c, 0x0028001e); /* RC6/6p Wake Rate Limit */
+ gtt_write(gtt_bar, 0xa0a0, 0x0000001e); /* RC6pp Wake Rate Limit */
+ gtt_write(gtt_bar, 0xa0a8, 0x0001e848); /* RC Evaluation Interval */
+ gtt_write(gtt_bar, 0xa0ac, 0x00000019); /* RC Idle Hysteresis */
+
+ /* 9 */
+ gtt_write(gtt_bar, 0x2054, 0x0000000a); /* Render Idle Max Count */
+ gtt_write(gtt_bar, 0x12054, 0x0000000a); /* Video Idle Max Count */
+ gtt_write(gtt_bar, 0x22054, 0x0000000a); /* Blitter Idle Max Count */
+
+ /* 10 */
+ gtt_write(gtt_bar, 0xa0b0, 0x00000000); /* Unblock Ack to Busy */
+ gtt_write(gtt_bar, 0xa0b4, 0x000003e8); /* RC1e Threshold */
+ gtt_write(gtt_bar, 0xa0b8, 0x0000c350); /* RC6 Threshold */
+ gtt_write(gtt_bar, 0xa0bc, 0x000186a0); /* RC6p Threshold */
+ gtt_write(gtt_bar, 0xa0c0, 0x0000fa00); /* RC6pp Threshold */
+
+ /* 11 */
+ gtt_write(gtt_bar, 0xa010, 0x000f4240); /* RP Down Timeout */
+ gtt_write(gtt_bar, 0xa014, 0x12060000); /* RP Interrupt Limits */
+ gtt_write(gtt_bar, 0xa02c, 0x00015f90); /* RP Up Threshold */
+ gtt_write(gtt_bar, 0xa030, 0x000186a0); /* RP Down Threshold */
+ gtt_write(gtt_bar, 0xa068, 0x000186a0); /* RP Up EI */
+ gtt_write(gtt_bar, 0xa06c, 0x000493e0); /* RP Down EI */
+ gtt_write(gtt_bar, 0xa070, 0x0000000a); /* RP Idle Hysteresis */
+
+ /* 11a: Enable Render Standby (RC6) */
+ if ((bridge_silicon_revision() & BASE_REV_MASK) == BASE_REV_IVB) {
+ /*
+ * IvyBridge should also support DeepRenderStandby.
+ *
+ * Unfortunately it does not work reliably on all SKUs so
+ * disable it here and it can be enabled by the kernel.
+ */
+ gtt_write(gtt_bar, 0xa090, 0x88040000); /* HW RC Control */
+ } else {
+ gtt_write(gtt_bar, 0xa090, 0x88040000); /* HW RC Control */
+ }
+
+ /* 12: Normal Frequency Request */
+ /* RPNFREQ_VAL comes from MCHBAR 0x5998 23:16 (8 bits!? use 7) */
+ reg32 = readl(MCHBAR_REG(0x5998));
+ reg32 >>= 16;
+ reg32 &= 0xef;
+ reg32 <<= 25;
+ gtt_write(gtt_bar, 0xa008, reg32);
+
+ /* 13: RP Control */
+ gtt_write(gtt_bar, 0xa024, 0x00000592);
+
+ /* 14: Enable PM Interrupts */
+ gtt_write(gtt_bar, 0x4402c, 0x03000076);
+
+ /* Clear 0x6c024 [8:6] */
+ reg32 = gtt_read(gtt_bar, 0x6c024);
+ reg32 &= ~0x000001c0;
+ gtt_write(gtt_bar, 0x6c024, reg32);
+
+ return 0;
+}
+
+int gma_pm_init_post_vbios(void *gtt_bar, const void *blob, int node)
+{
+ u32 reg32, cycle_delay;
+
+ debug("GT Power Management Init (post VBIOS)\n");
+
+ /* 15: Deassert Force Wake */
+ if (bridge_silicon_revision() < IVB_STEP_C0) {
+ gtt_write(gtt_bar, 0xa18c, gtt_read(gtt_bar, 0xa18c) & ~1);
+ gtt_poll(gtt_bar, 0x130090, (1 << 0), (0 << 0));
+ } else {
+ gtt_write(gtt_bar, 0xa188, 0x1fffe);
+ if (gtt_poll(gtt_bar, 0x130040, (1 << 0), (0 << 0))) {
+ gtt_write(gtt_bar, 0xa188,
+ gtt_read(gtt_bar, 0xa188) | 1);
+ }
+ }
+
+ /* 16: SW RC Control */
+ gtt_write(gtt_bar, 0xa094, 0x00060000);
+
+ /* Setup Digital Port Hotplug */
+ reg32 = gtt_read(gtt_bar, 0xc4030);
+ if (!reg32) {
+ u32 dp_hotplug[3];
+
+ if (fdtdec_get_int_array(blob, node, "intel,dp_hotplug",
+ dp_hotplug, ARRAY_SIZE(dp_hotplug)))
+ return -EINVAL;
+
+ reg32 = (dp_hotplug[0] & 0x7) << 2;
+ reg32 |= (dp_hotplug[0] & 0x7) << 10;
+ reg32 |= (dp_hotplug[0] & 0x7) << 18;
+ gtt_write(gtt_bar, 0xc4030, reg32);
+ }
+
+ /* Setup Panel Power On Delays */
+ reg32 = gtt_read(gtt_bar, 0xc7208);
+ if (!reg32) {
+ reg32 = (unsigned)fdtdec_get_int(blob, node,
+ "panel-port-select", 0) << 30;
+ reg32 |= fdtdec_get_int(blob, node, "panel-power-up-delay", 0)
+ << 16;
+ reg32 |= fdtdec_get_int(blob, node,
+ "panel-power-backlight-on-delay", 0);
+ gtt_write(gtt_bar, 0xc7208, reg32);
+ }
+
+ /* Setup Panel Power Off Delays */
+ reg32 = gtt_read(gtt_bar, 0xc720c);
+ if (!reg32) {
+ reg32 = fdtdec_get_int(blob, node, "panel-power-down-delay", 0)
+ << 16;
+ reg32 |= fdtdec_get_int(blob, node,
+ "panel-power-backlight-off-delay", 0);
+ gtt_write(gtt_bar, 0xc720c, reg32);
+ }
+
+ /* Setup Panel Power Cycle Delay */
+ cycle_delay = fdtdec_get_int(blob, node,
+ "intel,panel-power-cycle-delay", 0);
+ if (cycle_delay) {
+ reg32 = gtt_read(gtt_bar, 0xc7210);
+ reg32 &= ~0xff;
+ reg32 |= cycle_delay;
+ gtt_write(gtt_bar, 0xc7210, reg32);
+ }
+
+ /* Enable Backlight if needed */
+ reg32 = fdtdec_get_int(blob, node, "intel,cpu-backlight", 0);
+ if (reg32) {
+ gtt_write(gtt_bar, 0x48250, (1 << 31));
+ gtt_write(gtt_bar, 0x48254, reg32);
+ }
+ reg32 = fdtdec_get_int(blob, node, "intel,pch-backlight", 0);
+ if (reg32) {
+ gtt_write(gtt_bar, 0xc8250, (1 << 31));
+ gtt_write(gtt_bar, 0xc8254, reg32);
+ }
+
+ return 0;
+}
+
+/*
+ * Some vga option roms are used for several chipsets but they only have one
+ * PCI ID in their header. If we encounter such an option rom, we need to do
+ * the mapping ourselves.
+ */
+
+uint32_t board_map_oprom_vendev(uint32_t vendev)
+{
+ switch (vendev) {
+ case 0x80860102: /* GT1 Desktop */
+ case 0x8086010a: /* GT1 Server */
+ case 0x80860112: /* GT2 Desktop */
+ case 0x80860116: /* GT2 Mobile */
+ case 0x80860122: /* GT2 Desktop >=1.3GHz */
+ case 0x80860126: /* GT2 Mobile >=1.3GHz */
+ case 0x80860156: /* IVB */
+ case 0x80860166: /* IVB */
+ return 0x80860106; /* GT1 Mobile */
+ }
+
+ return vendev;
+}
+
+static int int15_handler(void)
+{
+ int res = 0;
+
+ debug("%s: INT15 function %04x!\n", __func__, M.x86.R_AX);
+
+ switch (M.x86.R_AX) {
+ case 0x5f34:
+ /*
+ * Set Panel Fitting Hook:
+ * bit 2 = Graphics Stretching
+ * bit 1 = Text Stretching
+ * bit 0 = Centering (do not set with bit1 or bit2)
+ * 0 = video bios default
+ */
+ M.x86.R_AX = 0x005f;
+ M.x86.R_CL = 0x00; /* Use video bios default */
+ res = 1;
+ break;
+ case 0x5f35:
+ /*
+ * Boot Display Device Hook:
+ * bit 0 = CRT
+ * bit 1 = TV (eDP)
+ * bit 2 = EFP
+ * bit 3 = LFP
+ * bit 4 = CRT2
+ * bit 5 = TV2 (eDP)
+ * bit 6 = EFP2
+ * bit 7 = LFP2
+ */
+ M.x86.R_AX = 0x005f;
+ M.x86.R_CX = 0x0000; /* Use video bios default */
+ res = 1;
+ break;
+ case 0x5f51:
+ /*
+ * Hook to select active LFP configuration:
+ * 00h = No LVDS, VBIOS does not enable LVDS
+ * 01h = Int-LVDS, LFP driven by integrated LVDS decoder
+ * 02h = SVDO-LVDS, LFP driven by SVDO decoder
+ * 03h = eDP, LFP Driven by Int-DisplayPort encoder
+ */
+ M.x86.R_AX = 0x005f;
+ M.x86.R_CX = 0x0003; /* eDP */
+ res = 1;
+ break;
+ case 0x5f70:
+ switch (M.x86.R_CH) {
+ case 0:
+ /* Get Mux */
+ M.x86.R_AX = 0x005f;
+ M.x86.R_CX = 0x0000;
+ res = 1;
+ break;
+ case 1:
+ /* Set Mux */
+ M.x86.R_AX = 0x005f;
+ M.x86.R_CX = 0x0000;
+ res = 1;
+ break;
+ case 2:
+ /* Get SG/Non-SG mode */
+ M.x86.R_AX = 0x005f;
+ M.x86.R_CX = 0x0000;
+ res = 1;
+ break;
+ default:
+ /* Interrupt was not handled */
+ debug("Unknown INT15 5f70 function: 0x%02x\n",
+ M.x86.R_CH);
+ break;
+ }
+ break;
+ case 0x5fac:
+ res = 1;
+ break;
+ default:
+ debug("Unknown INT15 function %04x!\n", M.x86.R_AX);
+ break;
+ }
+ return res;
+}
+
+int gma_func0_init(pci_dev_t dev, struct pci_controller *hose,
+ const void *blob, int node)
+{
+ void *gtt_bar;
+ u32 reg32;
+ int ret;
+
+ /* IGD needs to be Bus Master */
+ reg32 = pci_read_config32(dev, PCI_COMMAND);
+ reg32 |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | PCI_COMMAND_IO;
+ pci_write_config32(dev, PCI_COMMAND, reg32);
+
+ gtt_bar = (void *)pci_read_bar32(pci_bus_to_hose(0), dev, 0);
+ debug("GT bar %p\n", gtt_bar);
+ ret = gma_pm_init_pre_vbios(gtt_bar);
+ if (ret)
+ return ret;
+
+ ret = pci_run_vga_bios(dev, int15_handler, false);
+
+ /* Post VBIOS init */
+ ret = gma_pm_init_post_vbios(gtt_bar, blob, node);
+ if (ret)
+ return ret;
+
+ return 0;
+}
diff --git a/arch/x86/cpu/ivybridge/gma.h b/arch/x86/cpu/ivybridge/gma.h
new file mode 100644
index 0000000..5ddb239
--- /dev/null
+++ b/arch/x86/cpu/ivybridge/gma.h
@@ -0,0 +1,157 @@
+/*
+ * From Coreboot file of the same name
+ *
+ * Copyright (C) 2012 Chromium OS Authors
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+/* mailbox 0: header */
+__packed struct opregion_header {
+ u8 signature[16];
+ u32 size;
+ u32 version;
+ u8 sbios_version[32];
+ u8 vbios_version[16];
+ u8 driver_version[16];
+ u32 mailboxes;
+ u8 reserved[164];
+};
+
+#define IGD_OPREGION_SIGNATURE "IntelGraphicsMem"
+#define IGD_OPREGION_VERSION 2
+
+#define IGD_MBOX1 (1 << 0)
+#define IGD_MBOX2 (1 << 1)
+#define IGD_MBOX3 (1 << 2)
+#define IGD_MBOX4 (1 << 3)
+#define IGD_MBOX5 (1 << 4)
+
+#define MAILBOXES_MOBILE (IGD_MBOX1 | IGD_MBOX2 | IGD_MBOX3 | \
+ IGD_MBOX4 | IGD_MBOX5)
+#define MAILBOXES_DESKTOP (IGD_MBOX2 | IGD_MBOX4)
+
+#define SBIOS_VERSION_SIZE 32
+
+/* mailbox 1: public acpi methods */
+__packed struct opregion_mailbox1 {
+ u32 drdy;
+ u32 csts;
+ u32 cevt;
+ u8 reserved1[20];
+ u32 didl[8];
+ u32 cpdl[8];
+ u32 cadl[8];
+ u32 nadl[8];
+ u32 aslp;
+ u32 tidx;
+ u32 chpd;
+ u32 clid;
+ u32 cdck;
+ u32 sxsw;
+ u32 evts;
+ u32 cnot;
+ u32 nrdy;
+ u8 reserved2[60];
+};
+
+/* mailbox 2: software sci interface */
+__packed struct opregion_mailbox2 {
+ u32 scic;
+ u32 parm;
+ u32 dslp;
+ u8 reserved[244];
+};
+
+/* mailbox 3: power conservation */
+__packed struct opregion_mailbox3 {
+ u32 ardy;
+ u32 aslc;
+ u32 tche;
+ u32 alsi;
+ u32 bclp;
+ u32 pfit;
+ u32 cblv;
+ u16 bclm[20];
+ u32 cpfm;
+ u32 epfm;
+ u8 plut[74];
+ u32 pfmb;
+ u32 ccdv;
+ u32 pcft;
+ u8 reserved[94];
+};
+
+#define IGD_BACKLIGHT_BRIGHTNESS 0xff
+#define IGD_INITIAL_BRIGHTNESS 0x64
+
+#define IGD_FIELD_VALID (1 << 31)
+#define IGD_WORD_FIELD_VALID (1 << 15)
+#define IGD_PFIT_STRETCH 6
+
+/* mailbox 4: vbt */
+__packed struct {
+ u8 gvd1[7168];
+} opregion_vbt_t;
+
+/* IGD OpRegion */
+__packed struct igd_opregion {
+ opregion_header_t header;
+ opregion_mailbox1_t mailbox1;
+ opregion_mailbox2_t mailbox2;
+ opregion_mailbox3_t mailbox3;
+ opregion_vbt_t vbt;
+};
+
+/* Intel Video BIOS (Option ROM) */
+__packed struct optionrom_header {
+ u16 signature;
+ u8 size;
+ u8 reserved[21];
+ u16 pcir_offset;
+ u16 vbt_offset;
+};
+
+#define OPROM_SIGNATURE 0xaa55
+
+__packed struct optionrom_pcir {
+ u32 signature;
+ u16 vendor;
+ u16 device;
+ u16 reserved1;
+ u16 length;
+ u8 revision;
+ u8 classcode[3];
+ u16 imagelength;
+ u16 coderevision;
+ u8 codetype;
+ u8 indicator;
+ u16 reserved2;
+};
+
+__packed struct optionrom_vbt {
+ u8 hdr_signature[20];
+ u16 hdr_version;
+ u16 hdr_size;
+ u16 hdr_vbt_size;
+ u8 hdr_vbt_checksum;
+ u8 hdr_reserved;
+ u32 hdr_vbt_datablock;
+ u32 hdr_aim[4];
+ u8 datahdr_signature[16];
+ u16 datahdr_version;
+ u16 datahdr_size;
+ u16 datahdr_datablocksize;
+ u8 coreblock_id;
+ u16 coreblock_size;
+ u16 coreblock_biossize;
+ u8 coreblock_biostype;
+ u8 coreblock_releasestatus;
+ u8 coreblock_hwsupported;
+ u8 coreblock_integratedhw;
+ u8 coreblock_biosbuild[4];
+ u8 coreblock_biossignon[155];
+};
+
+#define VBT_SIGNATURE 0x54425624
+
diff --git a/arch/x86/include/asm/arch-ivybridge/bd82x6x.h b/arch/x86/include/asm/arch-ivybridge/bd82x6x.h
index 96d51c2..e1d9a9b 100644
--- a/arch/x86/include/asm/arch-ivybridge/bd82x6x.h
+++ b/arch/x86/include/asm/arch-ivybridge/bd82x6x.h
@@ -13,6 +13,8 @@ void bd82x6x_pci_init(pci_dev_t dev);
void bd82x6x_usb_ehci_init(pci_dev_t dev);
void bd82x6x_usb_xhci_init(pci_dev_t dev);
int bd82x6x_init_pci_devices(void);
+int gma_func0_init(pci_dev_t dev, struct pci_controller *hose,
+ const void *blob, int node);
int bd82x6x_init(void);
struct x86_cpu_priv;
diff --git a/doc/device-tree-bindings/video/intel-gma.txt b/doc/device-tree-bindings/video/intel-gma.txt
new file mode 100644
index 0000000..914be4f
--- /dev/null
+++ b/doc/device-tree-bindings/video/intel-gma.txt
@@ -0,0 +1,40 @@
+Intel GMA Bindings
+==================
+
+This is the Intel Graphics Media Accelerator. This binding supports selection
+of display parameters only.
+
+
+Required properties:
+ - compatible : "intel,gma";
+
+Optional properties:
+ - intel,dp-hotplug : values for digital port hotplug, one cell per value for
+ ports B, C and D
+ - intel,panel-port-select : output port to use: 0=LVDS 1=DP_B 2=DP_C 3=DP_D
+ - intel,panel-power-cycle-delay : T4 time sequence (6 = 500ms)
+
+ The following delays are in units of 0.1ms:
+ - intel,panel-power-up-delay : T1+T2 time sequence
+ - intel,panel-power-down-delay : T3 time sequence
+ - intel,panel-power-backlight-on-delay : T5 time sequence
+ - intel,panel-power-backlight-off-delay : Tx time sequence
+
+ - intel,cpu-backlight : Value for CPU Backlight PWM
+ - intel,pch-backlight : Value for PCH Backlight PWM
+
+Example
+-------
+
+gma {
+ compatible = "intel,gma";
+ intel,dp_hotplug = <0 0 0x06>;
+ intel,panel-port-select = <1>;
+ intel,panel-power-cycle-delay = <6>;
+ intel,panel-power-up-delay = <2000>;
+ intel,panel-power-down-delay = <500>;
+ intel,panel-power-backlight-on-delay = <2000>;
+ intel,panel-power-backlight-off-delay = <2000>;
+ intel,cpu-backlight = <0x00000200>;
+ intel,pch-backlight = <0x04000000>;
+};
diff --git a/include/fdtdec.h b/include/fdtdec.h
index b6e1d40..ea92894 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -122,6 +122,7 @@ enum fdt_compat_id {
COMPAT_MEMORY_SPD, /* Memory SPD information */
COMPAT_INTEL_PANTHERPOINT_AHCI, /* Intel Pantherpoint AHCI */
COMPAT_INTEL_MODEL_206AX, /* Intel Model 206AX CPU */
+ COMPAT_INTEL_GMA, /* Intel Graphics Media Accelerator */
COMPAT_COUNT,
};
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 2f2b467..2345df4 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -77,6 +77,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
COMPAT(MEMORY_SPD, "memory-spd"),
COMPAT(INTEL_PANTHERPOINT_AHCI, "intel,pantherpoint-ahci"),
COMPAT(INTEL_MODEL_206AX, "intel,model-206ax"),
+ COMPAT(INTEL_GMA, "intel,gma"),
};
const char *fdtdec_get_compatible(enum fdt_compat_id id)
--
2.1.0.rc2.206.gedb03e5
^ permalink raw reply related [flat|nested] 40+ messages in thread* [U-Boot] [PATCH 10/19] x86: Add initial video device init for Intel GMA
2014-11-15 3:56 ` [U-Boot] [PATCH 10/19] x86: Add initial video device init for Intel GMA Simon Glass
@ 2014-11-25 21:49 ` Simon Glass
0 siblings, 0 replies; 40+ messages in thread
From: Simon Glass @ 2014-11-25 21:49 UTC (permalink / raw)
To: u-boot
On 14 November 2014 at 20:56, Simon Glass <sjg@chromium.org> wrote:
> Intel's Graphics Media Accelerator (GMA) is a generic name for a wide range
> of video devices. Add code to set up the hardware on ivybridge. Part of the
> init happens in native code, part of it happens in a 16-bit option ROM for
> those nostalgic for the 1970s.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
>
> arch/x86/cpu/ivybridge/Makefile | 1 +
> arch/x86/cpu/ivybridge/bd82x6x.c | 13 +-
> arch/x86/cpu/ivybridge/gma.c | 756 ++++++++++++++++++++++++++
> arch/x86/cpu/ivybridge/gma.h | 157 ++++++
> arch/x86/include/asm/arch-ivybridge/bd82x6x.h | 2 +
> doc/device-tree-bindings/video/intel-gma.txt | 40 ++
> include/fdtdec.h | 1 +
> lib/fdtdec.c | 1 +
> 8 files changed, 970 insertions(+), 1 deletion(-)
> create mode 100644 arch/x86/cpu/ivybridge/gma.c
> create mode 100644 arch/x86/cpu/ivybridge/gma.h
> create mode 100644 doc/device-tree-bindings/video/intel-gma.txt
Applied to u-boot-x86.
^ permalink raw reply [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH 11/19] x86: dts: Add video information to the device tree
2014-11-15 3:56 [U-Boot] [PATCH 0/19] x86: ivybridge: Add graphics support Simon Glass
` (9 preceding siblings ...)
2014-11-15 3:56 ` [U-Boot] [PATCH 10/19] x86: Add initial video device init for Intel GMA Simon Glass
@ 2014-11-15 3:56 ` Simon Glass
2014-11-25 21:49 ` Simon Glass
2014-11-15 3:56 ` [U-Boot] [PATCH 12/19] x86: config: Enable video support for chromebook_link Simon Glass
` (7 subsequent siblings)
18 siblings, 1 reply; 40+ messages in thread
From: Simon Glass @ 2014-11-15 3:56 UTC (permalink / raw)
To: u-boot
This provides panel timing information needed by the video driver.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
arch/x86/dts/link.dts | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/x86/dts/link.dts b/arch/x86/dts/link.dts
index d3c94e0..592af16 100644
--- a/arch/x86/dts/link.dts
+++ b/arch/x86/dts/link.dts
@@ -171,6 +171,19 @@
intel,sata-port0-gen3-tx = <0x00880a7f>;
};
+ gma {
+ compatible = "intel,gma";
+ intel,dp_hotplug = <0 0 0x06>;
+ intel,panel-port-select = <1>;
+ intel,panel-power-cycle-delay = <6>;
+ intel,panel-power-up-delay = <2000>;
+ intel,panel-power-down-delay = <500>;
+ intel,panel-power-backlight-on-delay = <2000>;
+ intel,panel-power-backlight-off-delay = <2000>;
+ intel,cpu-backlight = <0x00000200>;
+ intel,pch-backlight = <0x04000000>;
+ };
+
lpc {
compatible = "intel,lpc";
#address-cells = <1>;
--
2.1.0.rc2.206.gedb03e5
^ permalink raw reply related [flat|nested] 40+ messages in thread* [U-Boot] [PATCH 12/19] x86: config: Enable video support for chromebook_link
2014-11-15 3:56 [U-Boot] [PATCH 0/19] x86: ivybridge: Add graphics support Simon Glass
` (10 preceding siblings ...)
2014-11-15 3:56 ` [U-Boot] [PATCH 11/19] x86: dts: Add video information to the device tree Simon Glass
@ 2014-11-15 3:56 ` Simon Glass
2014-11-25 21:50 ` Simon Glass
2014-11-15 3:56 ` [U-Boot] [PATCH 13/19] bios_emulator: Allow x86 to use the emulator Simon Glass
` (6 subsequent siblings)
18 siblings, 1 reply; 40+ messages in thread
From: Simon Glass @ 2014-11-15 3:56 UTC (permalink / raw)
To: u-boot
Now that we have the required drivers, enable video support with a suitable
option ROM.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
include/configs/chromebook_link.h | 10 +++-------
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/include/configs/chromebook_link.h b/include/configs/chromebook_link.h
index 6b57b28..c098c6c 100644
--- a/include/configs/chromebook_link.h
+++ b/include/configs/chromebook_link.h
@@ -39,13 +39,9 @@
{PCI_VENDOR_ID_INTEL, \
PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE}
-/*
- * These common x86 features are not yet supported, but are added in
- * follow-on patches in this series. Add undefs here to avoid every patch
- * having to put things back into x86-common.h
- */
-#undef CONFIG_VIDEO
-#undef CONFIG_CFB_CONSOLE
+#define CONFIG_X86_OPTION_ROM_FILENAME pci8086,0166.bin
+#define CONFIG_X86_OPTION_ROM_ADDR 0xfff90000
+#define CONFIG_VIDEO_X86
#define CONFIG_PCI_MEM_BUS 0xe0000000
#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
--
2.1.0.rc2.206.gedb03e5
^ permalink raw reply related [flat|nested] 40+ messages in thread* [U-Boot] [PATCH 13/19] bios_emulator: Allow x86 to use the emulator
2014-11-15 3:56 [U-Boot] [PATCH 0/19] x86: ivybridge: Add graphics support Simon Glass
` (11 preceding siblings ...)
2014-11-15 3:56 ` [U-Boot] [PATCH 12/19] x86: config: Enable video support for chromebook_link Simon Glass
@ 2014-11-15 3:56 ` Simon Glass
2014-11-25 21:50 ` Simon Glass
2014-11-15 3:56 ` [U-Boot] [PATCH 14/19] bios_emulator: Add vesa support and allow ROMs to be passed in as data Simon Glass
` (5 subsequent siblings)
18 siblings, 1 reply; 40+ messages in thread
From: Simon Glass @ 2014-11-15 3:56 UTC (permalink / raw)
To: u-boot
There is an implicit assumption that x86 machines want to use raw I/O in the
BIOS emulator, but this should be selectable. Add an CONFIG_X86EMU_RAW_IO
option to control it instead.
Also fix a few bugs which cause warnings on x86 and adjust the Makefile to
remove the assumption that only PowerPC uses the emulator.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
drivers/bios_emulator/Makefile | 2 +-
drivers/bios_emulator/besys.c | 32 +++++++++++++++++---------------
drivers/bios_emulator/include/x86emu.h | 4 ++--
drivers/bios_emulator/x86emu/debug.c | 8 +++-----
4 files changed, 23 insertions(+), 23 deletions(-)
diff --git a/drivers/bios_emulator/Makefile b/drivers/bios_emulator/Makefile
index e56356e..2ba43ac 100644
--- a/drivers/bios_emulator/Makefile
+++ b/drivers/bios_emulator/Makefile
@@ -9,4 +9,4 @@ obj-y = atibios.o biosemu.o besys.o bios.o \
$(X86DIR)/debug.o
ccflags-y := -I$(srctree)/$(src) -I$(srctree)/$(src)/include \
- -D__PPC__ -D__BIG_ENDIAN__
+ $(if $(CONFIG_PPC),-D__PPC__ -D__BIG_ENDIAN__)
diff --git a/drivers/bios_emulator/besys.c b/drivers/bios_emulator/besys.c
index ad88a53..70c472a 100644
--- a/drivers/bios_emulator/besys.c
+++ b/drivers/bios_emulator/besys.c
@@ -54,7 +54,7 @@
/*------------------------- Global Variables ------------------------------*/
-#ifndef __i386__
+#ifndef CONFIG_X86EMU_RAW_IO
static char *BE_biosDate = "08/14/99";
static u8 BE_model = 0xFC;
static u8 BE_submodel = 0x00;
@@ -80,16 +80,18 @@ static u8 *BE_memaddr(u32 addr)
if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
return (u8*)(_BE_env.biosmem_base + addr - 0xC0000);
} else if (addr > _BE_env.biosmem_limit && addr < 0xD0000) {
- DB(printf("BE_memaddr: address %#lx may be invalid!\n", addr);)
- return M.mem_base;
+ DB(printf("BE_memaddr: address %#lx may be invalid!\n",
+ (ulong)addr);)
+ return (u8 *)M.mem_base;
} else if (addr >= 0xA0000 && addr <= 0xBFFFF) {
return (u8*)(_BE_env.busmem_base + addr - 0xA0000);
}
-#ifdef __i386__
+#ifdef CONFIG_X86EMU_RAW_IO
else if (addr >= 0xD0000 && addr <= 0xFFFFF) {
/* We map the real System BIOS directly on real PC's */
- DB(printf("BE_memaddr: System BIOS address %#lx\n", addr);)
- return _BE_env.busmem_base + addr - 0xA0000;
+ DB(printf("BE_memaddr: System BIOS address %#lx\n",
+ (ulong)addr);)
+ return (u8 *)_BE_env.busmem_base + addr - 0xA0000;
}
#else
else if (addr >= 0xFFFF5 && addr < 0xFFFFE) {
@@ -108,10 +110,10 @@ static u8 *BE_memaddr(u32 addr)
#endif
else if (addr > M.mem_size - 1) {
HALT_SYS();
- return M.mem_base;
+ return (u8 *)M.mem_base;
}
- return M.mem_base + addr;
+ return (u8 *)(M.mem_base + addr);
}
/****************************************************************************
@@ -230,7 +232,7 @@ void X86API BE_wrl(u32 addr, u32 val)
}
}
-#if defined(DEBUG) || !defined(__i386__)
+#if !defined(CONFIG_X86EMU_RAW_IO)
/* For Non-Intel machines we may need to emulate some I/O port accesses that
* the BIOS may try to access, such as the PCI config registers.
@@ -560,7 +562,7 @@ u8 X86API BE_inb(X86EMU_pioAddr port)
{
u8 val = 0;
-#if defined(DEBUG) || !defined(__i386__)
+#if !defined(CONFIG_X86EMU_RAW_IO)
if (IS_VGA_PORT(port)){
/*seems reading port 0x3c3 return the high 16 bit of io port*/
if(port == 0x3c3)
@@ -601,7 +603,7 @@ u16 X86API BE_inw(X86EMU_pioAddr port)
{
u16 val = 0;
-#if defined(DEBUG) || !defined(__i386__)
+#if !defined(CONFIG_X86EMU_RAW_IO)
if (IS_PCI_PORT(port))
val = PCI_inp(port, REG_READ_WORD);
else if (port < 0x100) {
@@ -629,7 +631,7 @@ u32 X86API BE_inl(X86EMU_pioAddr port)
{
u32 val = 0;
-#if defined(DEBUG) || !defined(__i386__)
+#if !defined(CONFIG_X86EMU_RAW_IO)
if (IS_PCI_PORT(port))
val = PCI_inp(port, REG_READ_DWORD);
else if (port < 0x100) {
@@ -652,7 +654,7 @@ through to the real hardware if we don't need to special case it.
****************************************************************************/
void X86API BE_outb(X86EMU_pioAddr port, u8 val)
{
-#if defined(DEBUG) || !defined(__i386__)
+#if !defined(CONFIG_X86EMU_RAW_IO)
if (IS_VGA_PORT(port))
VGA_outpb(port, val);
else if (IS_TIMER_PORT(port))
@@ -683,7 +685,7 @@ through to the real hardware if we don't need to special case it.
****************************************************************************/
void X86API BE_outw(X86EMU_pioAddr port, u16 val)
{
-#if defined(DEBUG) || !defined(__i386__)
+#if !defined(CONFIG_X86EMU_RAW_IO)
if (IS_VGA_PORT(port)) {
VGA_outpb(port, val);
VGA_outpb(port + 1, val >> 8);
@@ -710,7 +712,7 @@ through to the real hardware if we don't need to special case it.
****************************************************************************/
void X86API BE_outl(X86EMU_pioAddr port, u32 val)
{
-#if defined(DEBUG) || !defined(__i386__)
+#if !defined(CONFIG_X86EMU_RAW_IO)
if (IS_PCI_PORT(port))
PCI_outp(port, val, REG_WRITE_DWORD);
else if (port < 0x100) {
diff --git a/drivers/bios_emulator/include/x86emu.h b/drivers/bios_emulator/include/x86emu.h
index a70a768..278f669 100644
--- a/drivers/bios_emulator/include/x86emu.h
+++ b/drivers/bios_emulator/include/x86emu.h
@@ -53,9 +53,9 @@ typedef u16 X86EMU_pioAddr;
/*---------------------- Macros and type definitions ----------------------*/
-#if defined (CONFIG_ARM)
+#if defined(CONFIG_ARM)
#define GAS_LINE_COMMENT "@"
-#elif defined(CONFIG_MIPS) || defined(CONFIG_PPC)
+#elif defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_X86)
#define GAS_LINE_COMMENT "#"
#elif defined (CONFIG_SH)
#define GAS_LINE_COMMENT "!"
diff --git a/drivers/bios_emulator/x86emu/debug.c b/drivers/bios_emulator/x86emu/debug.c
index 2fa8050..2ec64c2 100644
--- a/drivers/bios_emulator/x86emu/debug.c
+++ b/drivers/bios_emulator/x86emu/debug.c
@@ -211,9 +211,7 @@ void X86EMU_dump_memory(u16 seg, u16 off, u32 amt)
u32 start = off & 0xfffffff0;
u32 end = (off + 16) & 0xfffffff0;
u32 i;
- u32 current;
- current = start;
while (end <= off + amt) {
printk("%04x:%04x ", seg, start);
for (i = start; i < off; i++)
@@ -229,7 +227,7 @@ void X86EMU_dump_memory(u16 seg, u16 off, u32 amt)
void x86emu_single_step(void)
{
char s[1024];
- int ps[10];
+ int ps[10];
int ntok;
int cmd;
int done;
@@ -238,8 +236,6 @@ void x86emu_single_step(void)
static int breakpoint;
static int noDecode = 1;
- char *p;
-
if (DEBUG_BREAK()) {
if (M.x86.saved_ip != breakpoint) {
return;
@@ -255,6 +251,8 @@ void x86emu_single_step(void)
offset = M.x86.saved_ip;
while (!done) {
printk("-");
+ ps[1] = 0; /* Avoid dodgy compiler warnings */
+ ps[2] = 0;
cmd = x86emu_parse_line(s, ps, &ntok);
switch (cmd) {
case 'u':
--
2.1.0.rc2.206.gedb03e5
^ permalink raw reply related [flat|nested] 40+ messages in thread* [U-Boot] [PATCH 13/19] bios_emulator: Allow x86 to use the emulator
2014-11-15 3:56 ` [U-Boot] [PATCH 13/19] bios_emulator: Allow x86 to use the emulator Simon Glass
@ 2014-11-25 21:50 ` Simon Glass
0 siblings, 0 replies; 40+ messages in thread
From: Simon Glass @ 2014-11-25 21:50 UTC (permalink / raw)
To: u-boot
On 14 November 2014 at 20:56, Simon Glass <sjg@chromium.org> wrote:
> There is an implicit assumption that x86 machines want to use raw I/O in the
> BIOS emulator, but this should be selectable. Add an CONFIG_X86EMU_RAW_IO
> option to control it instead.
>
> Also fix a few bugs which cause warnings on x86 and adjust the Makefile to
> remove the assumption that only PowerPC uses the emulator.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
>
> drivers/bios_emulator/Makefile | 2 +-
> drivers/bios_emulator/besys.c | 32 +++++++++++++++++---------------
> drivers/bios_emulator/include/x86emu.h | 4 ++--
> drivers/bios_emulator/x86emu/debug.c | 8 +++-----
> 4 files changed, 23 insertions(+), 23 deletions(-)
Applied to u-boot-x86.
^ permalink raw reply [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH 14/19] bios_emulator: Add vesa support and allow ROMs to be passed in as data
2014-11-15 3:56 [U-Boot] [PATCH 0/19] x86: ivybridge: Add graphics support Simon Glass
` (12 preceding siblings ...)
2014-11-15 3:56 ` [U-Boot] [PATCH 13/19] bios_emulator: Allow x86 to use the emulator Simon Glass
@ 2014-11-15 3:56 ` Simon Glass
2014-11-25 21:50 ` Simon Glass
2014-11-15 3:56 ` [U-Boot] [PATCH 15/19] bios_emulator: Allow a custom interrupt handler to be installed Simon Glass
` (4 subsequent siblings)
18 siblings, 1 reply; 40+ messages in thread
From: Simon Glass @ 2014-11-15 3:56 UTC (permalink / raw)
To: u-boot
As well as locating the ROM on the PCI bus, allow the ROM to be supplied to
the emulator. Split the init up a little so that callers can supply their
own interrupt routines. Also allow a vesa mode to be provided, to be
selected once the BIOS run is complete.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
drivers/bios_emulator/atibios.c | 198 ++++++++++++++++++++++++++++------------
drivers/bios_emulator/besys.c | 4 +-
include/bios_emul.h | 8 ++
3 files changed, 152 insertions(+), 58 deletions(-)
diff --git a/drivers/bios_emulator/atibios.c b/drivers/bios_emulator/atibios.c
index 3b2ed6e..93b815c 100644
--- a/drivers/bios_emulator/atibios.c
+++ b/drivers/bios_emulator/atibios.c
@@ -46,8 +46,11 @@
* BIOS in u-boot.
****************************************************************************/
#include <common.h>
-#include "biosemui.h"
+#include <bios_emul.h>
+#include <errno.h>
#include <malloc.h>
+#include <vbe.h>
+#include "biosemui.h"
/* Length of the BIOS image */
#define MAX_BIOSLEN (128 * 1024L)
@@ -59,17 +62,54 @@ static u32 saveBaseAddress14;
static u32 saveBaseAddress18;
static u32 saveBaseAddress20;
+static void atibios_set_vesa_mode(RMREGS *regs, int vesa_mode,
+ struct vbe_mode_info *mode_info)
+{
+ debug("VBE: Setting VESA mode %#04x\n", vesa_mode);
+ /* request linear framebuffer mode */
+ vesa_mode |= (1 << 14);
+ /* request clearing of framebuffer */
+ vesa_mode &= ~(1 << 15);
+ regs->e.eax = VESA_SET_MODE;
+ regs->e.ebx = vesa_mode;
+ BE_int86(0x10, regs, regs);
+
+ int offset = 0x2000;
+ void *buffer = (void *)(M.mem_base + offset);
+
+ u16 buffer_seg = (((unsigned long)offset) >> 4) & 0xff00;
+ u16 buffer_adr = ((unsigned long)offset) & 0xffff;
+ regs->e.eax = VESA_GET_MODE_INFO;
+ regs->e.ebx = 0;
+ regs->e.ecx = vesa_mode;
+ regs->e.edx = 0;
+ regs->e.esi = buffer_seg;
+ regs->e.edi = buffer_adr;
+ BE_int86(0x10, regs, regs);
+ memcpy(mode_info->mode_info_block, buffer,
+ sizeof(struct vbe_mode_info));
+ mode_info->valid = true;
+
+ vesa_mode |= (1 << 14);
+ /* request clearing of framebuffer */
+ vesa_mode &= ~(1 << 15);
+ regs->e.eax = VESA_SET_MODE;
+ regs->e.ebx = vesa_mode;
+ BE_int86(0x10, regs, regs);
+}
+
/****************************************************************************
PARAMETERS:
pcidev - PCI device info for the video card on the bus to boot
-VGAInfo - BIOS emulator VGA info structure
+vga_info - BIOS emulator VGA info structure
REMARKS:
This function executes the BIOS POST code on the controller. We assume that
at this stage the controller has its I/O and memory space enabled and
that all other controllers are in a disabled state.
****************************************************************************/
-static void PCI_doBIOSPOST(pci_dev_t pcidev, BE_VGAInfo * VGAInfo)
+static void PCI_doBIOSPOST(pci_dev_t pcidev, BE_VGAInfo *vga_info,
+ int vesa_mode, struct vbe_mode_info *mode_info)
{
RMREGS regs;
RMSREGS sregs;
@@ -84,13 +124,16 @@ static void PCI_doBIOSPOST(pci_dev_t pcidev, BE_VGAInfo * VGAInfo)
((int)PCI_DEV(pcidev) << 3) | (int)PCI_FUNC(pcidev);
/*Setup the X86 emulator for the VGA BIOS*/
- BE_setVGA(VGAInfo);
+ BE_setVGA(vga_info);
/*Execute the BIOS POST code*/
BE_callRealMode(0xC000, 0x0003, ®s, &sregs);
/*Cleanup and exit*/
- BE_getVGA(VGAInfo);
+ BE_getVGA(vga_info);
+
+ if (vesa_mode != -1)
+ atibios_set_vesa_mode(®s, vesa_mode, mode_info);
}
/****************************************************************************
@@ -244,60 +287,61 @@ REMARKS:
Loads and POST's the display controllers BIOS, directly from the BIOS
image we can extract over the PCI bus.
****************************************************************************/
-static int PCI_postController(pci_dev_t pcidev, BE_VGAInfo * VGAInfo)
+static int PCI_postController(pci_dev_t pcidev, uchar *bios_rom, int bios_len,
+ BE_VGAInfo *vga_info, int vesa_mode,
+ struct vbe_mode_info *mode_info)
{
- u32 BIOSImageLen;
- uchar *mappedBIOS;
- uchar *copyOfBIOS;
-
- /*Allocate memory to store copy of BIOS from display controller*/
- if ((mappedBIOS = PCI_mapBIOSImage(pcidev)) == NULL) {
- printf("videoboot: Video ROM failed to map!\n");
- return false;
- }
+ u32 bios_image_len;
+ uchar *mapped_bios;
+ uchar *copy_of_bios;
+
+ if (bios_rom) {
+ copy_of_bios = bios_rom;
+ bios_image_len = bios_len;
+ } else {
+ /*
+ * Allocate memory to store copy of BIOS from display
+ * controller
+ */
+ mapped_bios = PCI_mapBIOSImage(pcidev);
+ if (mapped_bios == NULL) {
+ printf("videoboot: Video ROM failed to map!\n");
+ return false;
+ }
- BIOSImageLen = mappedBIOS[2] * 512;
+ bios_image_len = mapped_bios[2] * 512;
- if ((copyOfBIOS = malloc(BIOSImageLen)) == NULL) {
- printf("videoboot: Out of memory!\n");
- return false;
+ copy_of_bios = malloc(bios_image_len);
+ if (copy_of_bios == NULL) {
+ printf("videoboot: Out of memory!\n");
+ return false;
+ }
+ memcpy(copy_of_bios, mapped_bios, bios_image_len);
+ PCI_unmapBIOSImage(pcidev, mapped_bios);
}
- memcpy(copyOfBIOS, mappedBIOS, BIOSImageLen);
- PCI_unmapBIOSImage(pcidev, mappedBIOS);
-
- /*Save information in VGAInfo structure*/
- VGAInfo->function = PCI_FUNC(pcidev);
- VGAInfo->device = PCI_DEV(pcidev);
- VGAInfo->bus = PCI_BUS(pcidev);
- VGAInfo->pcidev = pcidev;
- VGAInfo->BIOSImage = copyOfBIOS;
- VGAInfo->BIOSImageLen = BIOSImageLen;
+ /*Save information in vga_info structure*/
+ vga_info->function = PCI_FUNC(pcidev);
+ vga_info->device = PCI_DEV(pcidev);
+ vga_info->bus = PCI_BUS(pcidev);
+ vga_info->pcidev = pcidev;
+ vga_info->BIOSImage = copy_of_bios;
+ vga_info->BIOSImageLen = bios_image_len;
/*Now execute the BIOS POST for the device*/
- if (copyOfBIOS[0] != 0x55 || copyOfBIOS[1] != 0xAA) {
+ if (copy_of_bios[0] != 0x55 || copy_of_bios[1] != 0xAA) {
printf("videoboot: Video ROM image is invalid!\n");
return false;
}
- PCI_doBIOSPOST(pcidev, VGAInfo);
+ PCI_doBIOSPOST(pcidev, vga_info, vesa_mode, mode_info);
/*Reset the size of the BIOS image to the final size*/
- VGAInfo->BIOSImageLen = copyOfBIOS[2] * 512;
+ vga_info->BIOSImageLen = copy_of_bios[2] * 512;
return true;
}
-/****************************************************************************
-PARAMETERS:
-pcidev - PCI device info for the video card on the bus to boot
-pVGAInfo - Place to return VGA info structure is requested
-cleanUp - true to clean up on exit, false to leave emulator active
-
-REMARKS:
-Boots the PCI/AGP video card on the bus using the Video ROM BIOS image
-and the X86 BIOS emulator module.
-****************************************************************************/
-int BootVideoCardBIOS(pci_dev_t pcidev, BE_VGAInfo ** pVGAInfo, int cleanUp)
+int biosemu_setup(pci_dev_t pcidev, BE_VGAInfo **vga_infop)
{
BE_VGAInfo *VGAInfo;
@@ -307,28 +351,70 @@ int BootVideoCardBIOS(pci_dev_t pcidev, BE_VGAInfo ** pVGAInfo, int cleanUp)
/*Initialise the x86 BIOS emulator*/
if ((VGAInfo = malloc(sizeof(*VGAInfo))) == NULL) {
printf("videoboot: Out of memory!\n");
- return false;
+ return -ENOMEM;
}
memset(VGAInfo, 0, sizeof(*VGAInfo));
BE_init(0, 65536, VGAInfo, 0);
+ *vga_infop = VGAInfo;
- /*Post all the display controller BIOS'es*/
- if (!PCI_postController(pcidev, VGAInfo))
- return false;
+ return 0;
+}
- /*Cleanup and exit the emulator if requested. If the BIOS emulator
- is needed after booting the card, we will not call BE_exit and
- leave it enabled for further use (ie: VESA driver etc).
+void biosemu_set_interrupt_handler(int intnum, int (*int_func)(void))
+{
+ X86EMU_setupIntrFunc(intnum, (X86EMU_intrFuncs)int_func);
+}
+
+int biosemu_run(pci_dev_t pcidev, uchar *bios_rom, int bios_len,
+ BE_VGAInfo *vga_info, int clean_up, int vesa_mode,
+ struct vbe_mode_info *mode_info)
+{
+ /*Post all the display controller BIOS'es*/
+ if (!PCI_postController(pcidev, bios_rom, bios_len, vga_info,
+ vesa_mode, mode_info))
+ return -EINVAL;
+
+ /*
+ * Cleanup and exit the emulator if requested. If the BIOS emulator
+ * is needed after booting the card, we will not call BE_exit and
+ * leave it enabled for further use (ie: VESA driver etc).
*/
- if (cleanUp) {
+ if (clean_up) {
BE_exit();
- if (VGAInfo->BIOSImage)
- free(VGAInfo->BIOSImage);
- free(VGAInfo);
- VGAInfo = NULL;
+ if (vga_info->BIOSImage)
+ free(vga_info->BIOSImage);
+ free(vga_info);
+ vga_info = NULL;
}
- /*Return VGA info pointer if the caller requested it*/
+
+ return 0;
+}
+
+/****************************************************************************
+PARAMETERS:
+pcidev - PCI device info for the video card on the bus to boot
+pVGAInfo - Place to return VGA info structure is requested
+cleanUp - true to clean up on exit, false to leave emulator active
+
+REMARKS:
+Boots the PCI/AGP video card on the bus using the Video ROM BIOS image
+and the X86 BIOS emulator module.
+****************************************************************************/
+int BootVideoCardBIOS(pci_dev_t pcidev, BE_VGAInfo **pVGAInfo, int clean_up)
+{
+ BE_VGAInfo *VGAInfo;
+ int ret;
+
+ ret = biosemu_setup(pcidev, &VGAInfo);
+ if (ret)
+ return false;
+ ret = biosemu_run(pcidev, NULL, 0, VGAInfo, clean_up, -1, NULL);
+ if (ret)
+ return false;
+
+ /* Return VGA info pointer if the caller requested it*/
if (pVGAInfo)
*pVGAInfo = VGAInfo;
+
return true;
}
diff --git a/drivers/bios_emulator/besys.c b/drivers/bios_emulator/besys.c
index 70c472a..8e29a9e 100644
--- a/drivers/bios_emulator/besys.c
+++ b/drivers/bios_emulator/besys.c
@@ -713,9 +713,9 @@ through to the real hardware if we don't need to special case it.
void X86API BE_outl(X86EMU_pioAddr port, u32 val)
{
#if !defined(CONFIG_X86EMU_RAW_IO)
- if (IS_PCI_PORT(port))
+ if (IS_PCI_PORT(port)) {
PCI_outp(port, val, REG_WRITE_DWORD);
- else if (port < 0x100) {
+ } else if (port < 0x100) {
DB(printf("WARN: INVALID outl.%04X <- %08X\n", (u16) port,val);)
LOG_outpd(port, val);
} else
diff --git a/include/bios_emul.h b/include/bios_emul.h
index a11d4e4..ef17864 100644
--- a/include/bios_emul.h
+++ b/include/bios_emul.h
@@ -54,4 +54,12 @@ void bios_run_on_x86(pci_dev_t pcidev, unsigned long addr, int vesa_mode,
*/
void bios_set_interrupt_handler(int intnum, int (*int_handler_func)(void));
+void biosemu_set_interrupt_handler(int intnum, int (*int_func)(void));
+
+int biosemu_setup(pci_dev_t pcidev, BE_VGAInfo **pVGAInfo);
+
+int biosemu_run(pci_dev_t pcidev, uchar *bios_rom, int bios_len,
+ BE_VGAInfo *vga_info, int clean_up, int vesa_mode,
+ struct vbe_mode_info *mode_info);
+
#endif
--
2.1.0.rc2.206.gedb03e5
^ permalink raw reply related [flat|nested] 40+ messages in thread* [U-Boot] [PATCH 14/19] bios_emulator: Add vesa support and allow ROMs to be passed in as data
2014-11-15 3:56 ` [U-Boot] [PATCH 14/19] bios_emulator: Add vesa support and allow ROMs to be passed in as data Simon Glass
@ 2014-11-25 21:50 ` Simon Glass
0 siblings, 0 replies; 40+ messages in thread
From: Simon Glass @ 2014-11-25 21:50 UTC (permalink / raw)
To: u-boot
On 14 November 2014 at 20:56, Simon Glass <sjg@chromium.org> wrote:
> As well as locating the ROM on the PCI bus, allow the ROM to be supplied to
> the emulator. Split the init up a little so that callers can supply their
> own interrupt routines. Also allow a vesa mode to be provided, to be
> selected once the BIOS run is complete.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
>
> drivers/bios_emulator/atibios.c | 198 ++++++++++++++++++++++++++++------------
> drivers/bios_emulator/besys.c | 4 +-
> include/bios_emul.h | 8 ++
> 3 files changed, 152 insertions(+), 58 deletions(-)
Applied to u-boot-x86.
^ permalink raw reply [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH 15/19] bios_emulator: Allow a custom interrupt handler to be installed
2014-11-15 3:56 [U-Boot] [PATCH 0/19] x86: ivybridge: Add graphics support Simon Glass
` (13 preceding siblings ...)
2014-11-15 3:56 ` [U-Boot] [PATCH 14/19] bios_emulator: Add vesa support and allow ROMs to be passed in as data Simon Glass
@ 2014-11-15 3:56 ` Simon Glass
2014-11-25 21:50 ` Simon Glass
2014-11-15 3:56 ` [U-Boot] [PATCH 16/19] bios_emulator: Add an option to enable debugging Simon Glass
` (3 subsequent siblings)
18 siblings, 1 reply; 40+ messages in thread
From: Simon Glass @ 2014-11-15 3:56 UTC (permalink / raw)
To: u-boot
Sometime we want to provide an interrupt handler for the ROM, Add a
function to allow this.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
drivers/bios_emulator/include/x86emu.h | 1 +
drivers/bios_emulator/x86emu/sys.c | 5 +++++
2 files changed, 6 insertions(+)
diff --git a/drivers/bios_emulator/include/x86emu.h b/drivers/bios_emulator/include/x86emu.h
index 278f669..63febe0 100644
--- a/drivers/bios_emulator/include/x86emu.h
+++ b/drivers/bios_emulator/include/x86emu.h
@@ -153,6 +153,7 @@ extern "C" { /* Use "C" linkage when in C++ mode */
void X86EMU_setupMemFuncs(X86EMU_memFuncs * funcs);
void X86EMU_setupPioFuncs(X86EMU_pioFuncs * funcs);
void X86EMU_setupIntrFuncs(X86EMU_intrFuncs funcs[]);
+ void X86EMU_setupIntrFunc(int intnum, X86EMU_intrFuncs func);
void X86EMU_prepareForInt(int num);
/* decode.c */
diff --git a/drivers/bios_emulator/x86emu/sys.c b/drivers/bios_emulator/x86emu/sys.c
index 21f9730..0ba9c0c 100644
--- a/drivers/bios_emulator/x86emu/sys.c
+++ b/drivers/bios_emulator/x86emu/sys.c
@@ -273,6 +273,11 @@ void X86EMU_setupPioFuncs(X86EMU_pioFuncs * funcs)
sys_outl = funcs->outl;
}
+void X86EMU_setupIntrFunc(int intnum, X86EMU_intrFuncs func)
+{
+ _X86EMU_intrTab[intnum] = func;
+}
+
/****************************************************************************
PARAMETERS:
funcs - New interrupt vector table to make active
--
2.1.0.rc2.206.gedb03e5
^ permalink raw reply related [flat|nested] 40+ messages in thread* [U-Boot] [PATCH 16/19] bios_emulator: Add an option to enable debugging
2014-11-15 3:56 [U-Boot] [PATCH 0/19] x86: ivybridge: Add graphics support Simon Glass
` (14 preceding siblings ...)
2014-11-15 3:56 ` [U-Boot] [PATCH 15/19] bios_emulator: Allow a custom interrupt handler to be installed Simon Glass
@ 2014-11-15 3:56 ` Simon Glass
2014-11-25 21:50 ` Simon Glass
2014-11-15 3:56 ` [U-Boot] [PATCH 17/19] bios_emulator: Always print errors when opcode decode fails Simon Glass
` (2 subsequent siblings)
18 siblings, 1 reply; 40+ messages in thread
From: Simon Glass @ 2014-11-15 3:56 UTC (permalink / raw)
To: u-boot
At present there are DEBUG options spread around the place. If you enable
one and not another you can end up with an emulator that does not work,
since each file can have a different view of what the registers look like.
To fix this, create a global CONFIG_X86EMU_DEBUG option that keeps
everything consistent.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
drivers/bios_emulator/besys.c | 64 ++++++++++++++++++++++------
drivers/bios_emulator/bios.c | 4 +-
drivers/bios_emulator/biosemui.h | 2 +-
drivers/bios_emulator/include/x86emu.h | 2 +-
drivers/bios_emulator/include/x86emu/debug.h | 16 +++----
drivers/bios_emulator/include/x86emu/regs.h | 2 +-
drivers/bios_emulator/x86emu/debug.c | 2 +-
drivers/bios_emulator/x86emu/decode.c | 24 +++++------
drivers/bios_emulator/x86emu/ops.c | 28 ++++++------
9 files changed, 90 insertions(+), 54 deletions(-)
diff --git a/drivers/bios_emulator/besys.c b/drivers/bios_emulator/besys.c
index 8e29a9e..752a928 100644
--- a/drivers/bios_emulator/besys.c
+++ b/drivers/bios_emulator/besys.c
@@ -60,6 +60,14 @@ static u8 BE_model = 0xFC;
static u8 BE_submodel = 0x00;
#endif
+#undef DEBUG_IO_ACCESS
+
+#ifdef DEBUG_IO_ACCESS
+#define debug_io(fmt, ...) printf(fmt, ##__VA_ARGS__)
+#else
+#define debug_io(x, b...)
+#endif
+
/*----------------------------- Implementation ----------------------------*/
/****************************************************************************
@@ -96,15 +104,15 @@ static u8 *BE_memaddr(u32 addr)
#else
else if (addr >= 0xFFFF5 && addr < 0xFFFFE) {
/* Return a faked BIOS date string for non-x86 machines */
- DB(printf("BE_memaddr - Returning BIOS date\n");)
+ debug_io("BE_memaddr - Returning BIOS date\n");
return (u8 *)(BE_biosDate + addr - 0xFFFF5);
} else if (addr == 0xFFFFE) {
/* Return system model identifier for non-x86 machines */
- DB(printf("BE_memaddr - Returning model\n");)
+ debug_io("BE_memaddr - Returning model\n");
return &BE_model;
} else if (addr == 0xFFFFF) {
/* Return system submodel identifier for non-x86 machines */
- DB(printf("BE_memaddr - Returning submodel\n");)
+ debug_io("BE_memaddr - Returning submodel\n");
return &BE_submodel;
}
#endif
@@ -260,6 +268,7 @@ static u8 VGA_inpb (const int port)
{
u8 val = 0xff;
+ debug_io("vga_inb.%04X -> ", (u16) port);
switch (port) {
case 0x3C0:
/* 3C0 has funky characteristics because it can act as either
@@ -583,7 +592,12 @@ u8 X86API BE_inb(X86EMU_pioAddr port)
val = LOG_inpb(port);
} else
#endif
+ {
+ debug_io("inb.%04X -> ", (u16) port);
val = LOG_inpb(port);
+ debug_io("%02X\n", val);
+ }
+
return val;
}
@@ -611,7 +625,12 @@ u16 X86API BE_inw(X86EMU_pioAddr port)
val = LOG_inpw(port);
} else
#endif
+ {
+ debug_io("inw.%04X -> ", (u16) port);
val = LOG_inpw(port);
+ debug_io("%04X\n", val);
+ }
+
return val;
}
@@ -638,7 +657,12 @@ u32 X86API BE_inl(X86EMU_pioAddr port)
val = LOG_inpd(port);
} else
#endif
+ {
+ debug_io("inl.%04X -> ", (u16) port);
val = LOG_inpd(port);
+ debug_io("%08X\n", val);
+ }
+
return val;
}
@@ -670,7 +694,11 @@ void X86API BE_outb(X86EMU_pioAddr port, u8 val)
LOG_outpb(port, val);
} else
#endif
+ {
+ debug_io("outb.%04X <- %02X", (u16) port, val);
LOG_outpb(port, val);
+ debug_io("\n");
+ }
}
/****************************************************************************
@@ -686,18 +714,22 @@ through to the real hardware if we don't need to special case it.
void X86API BE_outw(X86EMU_pioAddr port, u16 val)
{
#if !defined(CONFIG_X86EMU_RAW_IO)
- if (IS_VGA_PORT(port)) {
- VGA_outpb(port, val);
- VGA_outpb(port + 1, val >> 8);
- } else if (IS_PCI_PORT(port))
- PCI_outp(port, val, REG_WRITE_WORD);
- else if (port < 0x100) {
- DB(printf("WARN: MAybe INVALID outw.%04X <- %04X\n", (u16) port,
- val);)
- LOG_outpw(port, val);
- } else
+ if (IS_VGA_PORT(port)) {
+ VGA_outpb(port, val);
+ VGA_outpb(port + 1, val >> 8);
+ } else if (IS_PCI_PORT(port)) {
+ PCI_outp(port, val, REG_WRITE_WORD);
+ } else if (port < 0x100) {
+ DB(printf("WARN: MAybe INVALID outw.%04X <- %04X\n", (u16)port,
+ val);)
+ LOG_outpw(port, val);
+ } else
#endif
- LOG_outpw(port, val);
+ {
+ debug_io("outw.%04X <- %04X", (u16) port, val);
+ LOG_outpw(port, val);
+ debug_io("\n");
+ }
}
/****************************************************************************
@@ -720,5 +752,9 @@ void X86API BE_outl(X86EMU_pioAddr port, u32 val)
LOG_outpd(port, val);
} else
#endif
+ {
+ debug_io("outl.%04X <- %08X", (u16) port, val);
LOG_outpd(port, val);
+ debug_io("\n");
+ }
}
diff --git a/drivers/bios_emulator/bios.c b/drivers/bios_emulator/bios.c
index bcc192f..152d70a 100644
--- a/drivers/bios_emulator/bios.c
+++ b/drivers/bios_emulator/bios.c
@@ -84,14 +84,14 @@ static void X86API int42(int intno)
PM_outpb(0x3c2, PM_inpb(0x3cc) & (u8) ~ 0x02);
return;
}
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
else {
printf("int42: unknown function AH=0x12, BL=0x32, AL=%#02x\n",
M.x86.R_AL);
}
#endif
}
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
else {
printf("int42: unknown function AH=%#02x, AL=%#02x, BL=%#02x\n",
M.x86.R_AH, M.x86.R_AL, M.x86.R_BL);
diff --git a/drivers/bios_emulator/biosemui.h b/drivers/bios_emulator/biosemui.h
index 8c1f111..7853015 100644
--- a/drivers/bios_emulator/biosemui.h
+++ b/drivers/bios_emulator/biosemui.h
@@ -48,7 +48,7 @@
#include <asm/io.h>
/*---------------------- Macros and type definitions ----------------------*/
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
#define DB(x) x
#else
#define DB(x) do{}while(0);
diff --git a/drivers/bios_emulator/include/x86emu.h b/drivers/bios_emulator/include/x86emu.h
index 63febe0..b28cdc6 100644
--- a/drivers/bios_emulator/include/x86emu.h
+++ b/drivers/bios_emulator/include/x86emu.h
@@ -161,7 +161,7 @@ extern "C" { /* Use "C" linkage when in C++ mode */
void X86EMU_exec(void);
void X86EMU_halt_sys(void);
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
#define HALT_SYS() \
printf("halt_sys: file %s, line %d\n", __FILE__, __LINE__), \
X86EMU_halt_sys()
diff --git a/drivers/bios_emulator/include/x86emu/debug.h b/drivers/bios_emulator/include/x86emu/debug.h
index 268c9d3..12d6c7f 100644
--- a/drivers/bios_emulator/include/x86emu/debug.h
+++ b/drivers/bios_emulator/include/x86emu/debug.h
@@ -48,7 +48,7 @@
#define CHECK_MEM_ACCESS_F 0x4 /*using regular linear pointer */
#define CHECK_DATA_ACCESS_F 0x8 /*using segment:offset */
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
# define CHECK_IP_FETCH() (M.x86.check & CHECK_IP_FETCH_F)
# define CHECK_SP_ACCESS() (M.x86.check & CHECK_SP_ACCESS_F)
# define CHECK_MEM_ACCESS() (M.x86.check & CHECK_MEM_ACCESS_F)
@@ -60,7 +60,7 @@
# define CHECK_DATA_ACCESS()
#endif
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
# define DEBUG_INSTRUMENT() (M.x86.debug & DEBUG_INSTRUMENT_F)
# define DEBUG_DECODE() (M.x86.debug & DEBUG_DECODE_F)
# define DEBUG_TRACE() (M.x86.debug & DEBUG_TRACE_F)
@@ -99,7 +99,7 @@
# define DEBUG_DECODE_NOPRINT() 0
#endif
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
# define DECODE_PRINTF(x) if (DEBUG_DECODE()) \
x86emu_decode_printf(x)
@@ -129,7 +129,7 @@
# define SAVE_IP_CS(x,y)
#endif
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
#define TRACE_REGS() \
if (DEBUG_DISASSEMBLE()) { \
x86emu_just_disassemble(); \
@@ -140,7 +140,7 @@
# define TRACE_REGS()
#endif
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
# define SINGLE_STEP() if (DEBUG_STEP()) x86emu_single_step()
#else
# define SINGLE_STEP()
@@ -150,7 +150,7 @@
TRACE_REGS(); \
SINGLE_STEP()
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
# define START_OF_INSTR()
# define END_OF_INSTR() EndOfTheInstructionProcedure: x86emu_end_instr();
# define END_OF_INSTR_NO_TRACE() x86emu_end_instr();
@@ -160,7 +160,7 @@
# define END_OF_INSTR_NO_TRACE()
#endif
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
# define CALL_TRACE(u,v,w,x,s) \
if (DEBUG_TRACECALLREGS()) \
x86emu_dump_regs(); \
@@ -176,7 +176,7 @@
# define RETURN_TRACE(n,u,v)
#endif
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
#define DB(x) x
#else
#define DB(x)
diff --git a/drivers/bios_emulator/include/x86emu/regs.h b/drivers/bios_emulator/include/x86emu/regs.h
index a7fedd2..2934129 100644
--- a/drivers/bios_emulator/include/x86emu/regs.h
+++ b/drivers/bios_emulator/include/x86emu/regs.h
@@ -282,7 +282,7 @@ typedef struct {
u8 intno;
volatile int intr; /* mask of pending interrupts */
int debug;
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
int check;
u16 saved_ip;
u16 saved_cs;
diff --git a/drivers/bios_emulator/x86emu/debug.c b/drivers/bios_emulator/x86emu/debug.c
index 2ec64c2..27e90e4 100644
--- a/drivers/bios_emulator/x86emu/debug.c
+++ b/drivers/bios_emulator/x86emu/debug.c
@@ -44,7 +44,7 @@
/*----------------------------- Implementation ----------------------------*/
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
static void print_encoded_bytes(u16 s, u16 o);
static void print_decoded_instruction(void);
diff --git a/drivers/bios_emulator/x86emu/decode.c b/drivers/bios_emulator/x86emu/decode.c
index a782b81..da44c3d 100644
--- a/drivers/bios_emulator/x86emu/decode.c
+++ b/drivers/bios_emulator/x86emu/decode.c
@@ -303,7 +303,7 @@ NOTE: Do not inline this function as (*sys_rdX) is already inline!
u8 fetch_data_byte(
uint offset)
{
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
if (CHECK_DATA_ACCESS())
x86emu_check_data_access((u16)get_data_segment(), offset);
#endif
@@ -322,7 +322,7 @@ NOTE: Do not inline this function as (*sys_rdX) is already inline!
u16 fetch_data_word(
uint offset)
{
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
if (CHECK_DATA_ACCESS())
x86emu_check_data_access((u16)get_data_segment(), offset);
#endif
@@ -341,7 +341,7 @@ NOTE: Do not inline this function as (*sys_rdX) is already inline!
u32 fetch_data_long(
uint offset)
{
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
if (CHECK_DATA_ACCESS())
x86emu_check_data_access((u16)get_data_segment(), offset);
#endif
@@ -362,7 +362,7 @@ u8 fetch_data_byte_abs(
uint segment,
uint offset)
{
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
if (CHECK_DATA_ACCESS())
x86emu_check_data_access(segment, offset);
#endif
@@ -383,7 +383,7 @@ u16 fetch_data_word_abs(
uint segment,
uint offset)
{
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
if (CHECK_DATA_ACCESS())
x86emu_check_data_access(segment, offset);
#endif
@@ -404,7 +404,7 @@ u32 fetch_data_long_abs(
uint segment,
uint offset)
{
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
if (CHECK_DATA_ACCESS())
x86emu_check_data_access(segment, offset);
#endif
@@ -426,7 +426,7 @@ void store_data_byte(
uint offset,
u8 val)
{
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
if (CHECK_DATA_ACCESS())
x86emu_check_data_access((u16)get_data_segment(), offset);
#endif
@@ -448,7 +448,7 @@ void store_data_word(
uint offset,
u16 val)
{
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
if (CHECK_DATA_ACCESS())
x86emu_check_data_access((u16)get_data_segment(), offset);
#endif
@@ -470,7 +470,7 @@ void store_data_long(
uint offset,
u32 val)
{
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
if (CHECK_DATA_ACCESS())
x86emu_check_data_access((u16)get_data_segment(), offset);
#endif
@@ -493,7 +493,7 @@ void store_data_byte_abs(
uint offset,
u8 val)
{
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
if (CHECK_DATA_ACCESS())
x86emu_check_data_access(segment, offset);
#endif
@@ -516,7 +516,7 @@ void store_data_word_abs(
uint offset,
u16 val)
{
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
if (CHECK_DATA_ACCESS())
x86emu_check_data_access(segment, offset);
#endif
@@ -539,7 +539,7 @@ void store_data_long_abs(
uint offset,
u32 val)
{
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
if (CHECK_DATA_ACCESS())
x86emu_check_data_access(segment, offset);
#endif
diff --git a/drivers/bios_emulator/x86emu/ops.c b/drivers/bios_emulator/x86emu/ops.c
index f8e093d..c853260 100644
--- a/drivers/bios_emulator/x86emu/ops.c
+++ b/drivers/bios_emulator/x86emu/ops.c
@@ -79,7 +79,7 @@
/* constant arrays to do several instructions in just one function */
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
static char *x86emu_GenOpName[8] = {
"ADD", "OR", "ADC", "SBB", "AND", "SUB", "XOR", "CMP"};
#endif
@@ -160,7 +160,7 @@ static u32 (*opcD1_long_operation[])(u32 s, u8 d) =
sar_long,
};
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
static char *opF6_names[8] =
{ "TEST\t", "", "NOT\t", "NEG\t", "MUL\t", "IMUL\t", "DIV\t", "IDIV\t" };
@@ -1281,7 +1281,7 @@ void x86emuOp_opc80_byte_RM_IMM(u8 X86EMU_UNUSED(op1))
*/
START_OF_INSTR();
FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
if (DEBUG_DECODE()) {
/* XXX DECODE_PRINTF may be changed to something more
general, so that it is important to leave the strings
@@ -1359,7 +1359,7 @@ void x86emuOp_opc81_word_RM_IMM(u8 X86EMU_UNUSED(op1))
*/
START_OF_INSTR();
FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
if (DEBUG_DECODE()) {
/* XXX DECODE_PRINTF may be changed to something more
general, so that it is important to leave the strings
@@ -1475,7 +1475,7 @@ void x86emuOp_opc82_byte_RM_IMM(u8 X86EMU_UNUSED(op1))
*/
START_OF_INSTR();
FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
if (DEBUG_DECODE()) {
/* XXX DECODE_PRINTF may be changed to something more
general, so that it is important to leave the strings
@@ -1551,7 +1551,7 @@ void x86emuOp_opc83_word_RM_IMM(u8 X86EMU_UNUSED(op1))
*/
START_OF_INSTR();
FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
if (DEBUG_DECODE()) {
/* XXX DECODE_PRINTF may be changed to something more
general, so that it is important to leave the strings
@@ -3083,7 +3083,7 @@ void x86emuOp_opcC0_byte_RM_MEM(u8 X86EMU_UNUSED(op1))
*/
START_OF_INSTR();
FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
if (DEBUG_DECODE()) {
/* XXX DECODE_PRINTF may be changed to something more
general, so that it is important to leave the strings
@@ -3158,7 +3158,7 @@ void x86emuOp_opcC1_word_RM_MEM(u8 X86EMU_UNUSED(op1))
*/
START_OF_INSTR();
FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
if (DEBUG_DECODE()) {
/* XXX DECODE_PRINTF may be changed to something more
general, so that it is important to leave the strings
@@ -3630,7 +3630,7 @@ void x86emuOp_opcD0_byte_RM_1(u8 X86EMU_UNUSED(op1))
*/
START_OF_INSTR();
FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
if (DEBUG_DECODE()) {
/* XXX DECODE_PRINTF may be changed to something more
general, so that it is important to leave the strings
@@ -3701,7 +3701,7 @@ void x86emuOp_opcD1_word_RM_1(u8 X86EMU_UNUSED(op1))
*/
START_OF_INSTR();
FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
if (DEBUG_DECODE()) {
/* XXX DECODE_PRINTF may be changed to something more
general, so that it is important to leave the strings
@@ -3803,7 +3803,7 @@ void x86emuOp_opcD2_byte_RM_CL(u8 X86EMU_UNUSED(op1))
*/
START_OF_INSTR();
FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
if (DEBUG_DECODE()) {
/* XXX DECODE_PRINTF may be changed to something more
general, so that it is important to leave the strings
@@ -3876,7 +3876,7 @@ void x86emuOp_opcD3_word_RM_CL(u8 X86EMU_UNUSED(op1))
*/
START_OF_INSTR();
FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
if (DEBUG_DECODE()) {
/* XXX DECODE_PRINTF may be changed to something more
general, so that it is important to leave the strings
@@ -4859,7 +4859,7 @@ void x86emuOp_opcFE_byte_RM(u8 X86EMU_UNUSED(op1))
/* Yet another special case instruction. */
START_OF_INSTR();
FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
if (DEBUG_DECODE()) {
/* XXX DECODE_PRINTF may be changed to something more
general, so that it is important to leave the strings
@@ -4923,7 +4923,7 @@ void x86emuOp_opcFF_word_RM(u8 X86EMU_UNUSED(op1))
/* Yet another special case instruction. */
START_OF_INSTR();
FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
+#ifdef CONFIG_X86EMU_DEBUG
if (DEBUG_DECODE()) {
/* XXX DECODE_PRINTF may be changed to something more
general, so that it is important to leave the strings
--
2.1.0.rc2.206.gedb03e5
^ permalink raw reply related [flat|nested] 40+ messages in thread* [U-Boot] [PATCH 16/19] bios_emulator: Add an option to enable debugging
2014-11-15 3:56 ` [U-Boot] [PATCH 16/19] bios_emulator: Add an option to enable debugging Simon Glass
@ 2014-11-25 21:50 ` Simon Glass
0 siblings, 0 replies; 40+ messages in thread
From: Simon Glass @ 2014-11-25 21:50 UTC (permalink / raw)
To: u-boot
On 14 November 2014 at 20:56, Simon Glass <sjg@chromium.org> wrote:
> At present there are DEBUG options spread around the place. If you enable
> one and not another you can end up with an emulator that does not work,
> since each file can have a different view of what the registers look like.
> To fix this, create a global CONFIG_X86EMU_DEBUG option that keeps
> everything consistent.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
>
> drivers/bios_emulator/besys.c | 64 ++++++++++++++++++++++------
> drivers/bios_emulator/bios.c | 4 +-
> drivers/bios_emulator/biosemui.h | 2 +-
> drivers/bios_emulator/include/x86emu.h | 2 +-
> drivers/bios_emulator/include/x86emu/debug.h | 16 +++----
> drivers/bios_emulator/include/x86emu/regs.h | 2 +-
> drivers/bios_emulator/x86emu/debug.c | 2 +-
> drivers/bios_emulator/x86emu/decode.c | 24 +++++------
> drivers/bios_emulator/x86emu/ops.c | 28 ++++++------
> 9 files changed, 90 insertions(+), 54 deletions(-)
Applied to u-boot-x86.
^ permalink raw reply [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH 17/19] bios_emulator: Always print errors when opcode decode fails
2014-11-15 3:56 [U-Boot] [PATCH 0/19] x86: ivybridge: Add graphics support Simon Glass
` (15 preceding siblings ...)
2014-11-15 3:56 ` [U-Boot] [PATCH 16/19] bios_emulator: Add an option to enable debugging Simon Glass
@ 2014-11-15 3:56 ` Simon Glass
2014-11-25 21:50 ` Simon Glass
2014-11-15 3:56 ` [U-Boot] [PATCH 18/19] x86: chromebook_link: Enable the x86 emulator Simon Glass
2014-11-15 3:56 ` [U-Boot] [PATCH 19/19] x86: chromebook_link: Enable the Chrome OS EC Simon Glass
18 siblings, 1 reply; 40+ messages in thread
From: Simon Glass @ 2014-11-15 3:56 UTC (permalink / raw)
To: u-boot
This is a rare event and should not happen. When it does it is confusing to
work out why. At least we should print a message.
Adjust the emulator to always print decode errors to the console.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
drivers/bios_emulator/include/x86emu/debug.h | 6 +++++-
drivers/bios_emulator/x86emu/ops.c | 30 ++++++++++++++--------------
drivers/bios_emulator/x86emu/ops2.c | 4 ++--
3 files changed, 22 insertions(+), 18 deletions(-)
diff --git a/drivers/bios_emulator/include/x86emu/debug.h b/drivers/bios_emulator/include/x86emu/debug.h
index 12d6c7f..304b2bf 100644
--- a/drivers/bios_emulator/include/x86emu/debug.h
+++ b/drivers/bios_emulator/include/x86emu/debug.h
@@ -99,7 +99,11 @@
# define DEBUG_DECODE_NOPRINT() 0
#endif
-#ifdef CONFIG_X86EMU_DEBUG
+# define ERR_PRINTF(x) printf(x)
+# define ERR_PRINTF2(x, y) printf(x, y)
+
+#ifdef CONFIG_X86EMU_DEBUG103
+
# define DECODE_PRINTF(x) if (DEBUG_DECODE()) \
x86emu_decode_printf(x)
diff --git a/drivers/bios_emulator/x86emu/ops.c b/drivers/bios_emulator/x86emu/ops.c
index c853260..2bb5e2d 100644
--- a/drivers/bios_emulator/x86emu/ops.c
+++ b/drivers/bios_emulator/x86emu/ops.c
@@ -179,7 +179,7 @@ void x86emuOp_illegal_op(
{
START_OF_INSTR();
if (M.x86.R_SP != 0) {
- DECODE_PRINTF("ILLEGAL X86 OPCODE\n");
+ ERR_PRINTF("ILLEGAL X86 OPCODE\n");
TRACE_REGS();
DB( printk("%04x:%04x: %02X ILLEGAL X86 OPCODE!\n",
M.x86.R_CS, M.x86.R_IP-1,op1));
@@ -2148,7 +2148,7 @@ void x86emuOp_pop_RM(u8 X86EMU_UNUSED(op1))
DECODE_PRINTF("POP\t");
FETCH_DECODE_MODRM(mod, rh, rl);
if (rh != 0) {
- DECODE_PRINTF("ILLEGAL DECODE OF OPCODE 8F\n");
+ ERR_PRINTF("ILLEGAL DECODE OF OPCODE 8F\n");
HALT_SYS();
}
if (mod < 3) {
@@ -3347,7 +3347,7 @@ void x86emuOp_mov_byte_RM_IMM(u8 X86EMU_UNUSED(op1))
DECODE_PRINTF("MOV\t");
FETCH_DECODE_MODRM(mod, rh, rl);
if (rh != 0) {
- DECODE_PRINTF("ILLEGAL DECODE OF OPCODE c6\n");
+ ERR_PRINTF("ILLEGAL DECODE OF OPCODE c6\n");
HALT_SYS();
}
if (mod < 3) {
@@ -3381,7 +3381,7 @@ void x86emuOp_mov_word_RM_IMM(u8 X86EMU_UNUSED(op1))
DECODE_PRINTF("MOV\t");
FETCH_DECODE_MODRM(mod, rh, rl);
if (rh != 0) {
- DECODE_PRINTF("ILLEGAL DECODE OF OPCODE 8F\n");
+ ERR_PRINTF("ILLEGAL DECODE OF OPCODE 8F\n");
HALT_SYS();
}
if (mod < 3) {
@@ -3968,7 +3968,7 @@ void x86emuOp_aam(u8 X86EMU_UNUSED(op1))
DECODE_PRINTF("AAM\n");
a = fetch_byte_imm(); /* this is a stupid encoding. */
if (a != 10) {
- DECODE_PRINTF("ERROR DECODING AAM\n");
+ ERR_PRINTF("ERROR DECODING AAM\n");
TRACE_REGS();
HALT_SYS();
}
@@ -4443,7 +4443,7 @@ void x86emuOp_opcF6_byte_RM(u8 X86EMU_UNUSED(op1))
test_byte(destval, srcval);
break;
case 1:
- DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\n");
+ ERR_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\n");
HALT_SYS();
break;
case 2:
@@ -4490,7 +4490,7 @@ void x86emuOp_opcF6_byte_RM(u8 X86EMU_UNUSED(op1))
test_byte(*destreg, srcval);
break;
case 1:
- DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\n");
+ ERR_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\n");
HALT_SYS();
break;
case 2:
@@ -4559,7 +4559,7 @@ void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
test_long(destval, srcval);
break;
case 1:
- DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F7\n");
+ ERR_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F7\n");
HALT_SYS();
break;
case 2:
@@ -4611,7 +4611,7 @@ void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
test_word(destval, srcval);
break;
case 1:
- DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F7\n");
+ ERR_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F7\n");
HALT_SYS();
break;
case 2:
@@ -4666,7 +4666,7 @@ void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
test_long(*destreg, srcval);
break;
case 1:
- DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\n");
+ ERR_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\n");
HALT_SYS();
break;
case 2:
@@ -4715,7 +4715,7 @@ void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
test_word(*destreg, srcval);
break;
case 1:
- DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\n");
+ ERR_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\n");
HALT_SYS();
break;
case 2:
@@ -4879,7 +4879,7 @@ void x86emuOp_opcFE_byte_RM(u8 X86EMU_UNUSED(op1))
case 5:
case 6:
case 7:
- DECODE_PRINTF2("ILLEGAL OP MAJOR OP 0xFE MINOR OP %x \n", mod);
+ ERR_PRINTF2("ILLEGAL OP MAJOR OP 0xFE MINOR OP %x\n", mod);
HALT_SYS();
break;
}
@@ -4961,7 +4961,7 @@ void x86emuOp_opcFF_word_RM(u8 X86EMU_UNUSED(op1))
DECODE_PRINTF("PUSH\t");
break;
case 7:
- DECODE_PRINTF("ILLEGAL DECODING OF OPCODE FF\t");
+ ERR_PRINTF("ILLEGAL DECODING OF OPCODE FF\t");
HALT_SYS();
break;
}
@@ -5092,7 +5092,7 @@ void x86emuOp_opcFF_word_RM(u8 X86EMU_UNUSED(op1))
M.x86.R_IP = *destreg;
break;
case 3: /* jmp far ptr ... */
- DECODE_PRINTF("OPERATION UNDEFINED 0XFF \n");
+ ERR_PRINTF("OPERATION UNDEFINED 0XFF\n");
TRACE_AND_STEP();
HALT_SYS();
break;
@@ -5104,7 +5104,7 @@ void x86emuOp_opcFF_word_RM(u8 X86EMU_UNUSED(op1))
M.x86.R_IP = (u16) (*destreg);
break;
case 5: /* jmp far ptr ... */
- DECODE_PRINTF("OPERATION UNDEFINED 0XFF \n");
+ ERR_PRINTF("OPERATION UNDEFINED 0XFF\n");
TRACE_AND_STEP();
HALT_SYS();
break;
diff --git a/drivers/bios_emulator/x86emu/ops2.c b/drivers/bios_emulator/x86emu/ops2.c
index 59dbb42..be4ef36 100644
--- a/drivers/bios_emulator/x86emu/ops2.c
+++ b/drivers/bios_emulator/x86emu/ops2.c
@@ -58,7 +58,7 @@ void x86emuOp2_illegal_op(
u8 op2)
{
START_OF_INSTR();
- DECODE_PRINTF("ILLEGAL EXTENDED X86 OPCODE\n");
+ ERR_PRINTF("ILLEGAL EXTENDED X86 OPCODE\n");
TRACE_REGS();
printk("%04x:%04x: %02X ILLEGAL EXTENDED X86 OPCODE!\n",
M.x86.R_CS, M.x86.R_IP-2,op2);
@@ -1089,7 +1089,7 @@ void x86emuOp2_btX_I(u8 X86EMU_UNUSED(op2))
DECODE_PRINTF("BTC\t");
break;
default:
- DECODE_PRINTF("ILLEGAL EXTENDED X86 OPCODE\n");
+ ERR_PRINTF("ILLEGAL EXTENDED X86 OPCODE\n");
TRACE_REGS();
printk("%04x:%04x: %02X%02X ILLEGAL EXTENDED X86 OPCODE EXTENSION!\n",
M.x86.R_CS, M.x86.R_IP-3,op2, (mod<<6)|(rh<<3)|rl);
--
2.1.0.rc2.206.gedb03e5
^ permalink raw reply related [flat|nested] 40+ messages in thread* [U-Boot] [PATCH 17/19] bios_emulator: Always print errors when opcode decode fails
2014-11-15 3:56 ` [U-Boot] [PATCH 17/19] bios_emulator: Always print errors when opcode decode fails Simon Glass
@ 2014-11-25 21:50 ` Simon Glass
0 siblings, 0 replies; 40+ messages in thread
From: Simon Glass @ 2014-11-25 21:50 UTC (permalink / raw)
To: u-boot
On 14 November 2014 at 20:56, Simon Glass <sjg@chromium.org> wrote:
> This is a rare event and should not happen. When it does it is confusing to
> work out why. At least we should print a message.
>
> Adjust the emulator to always print decode errors to the console.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
>
> drivers/bios_emulator/include/x86emu/debug.h | 6 +++++-
> drivers/bios_emulator/x86emu/ops.c | 30 ++++++++++++++--------------
> drivers/bios_emulator/x86emu/ops2.c | 4 ++--
> 3 files changed, 22 insertions(+), 18 deletions(-)
Applied to u-boot-x86.
^ permalink raw reply [flat|nested] 40+ messages in thread
* [U-Boot] [PATCH 18/19] x86: chromebook_link: Enable the x86 emulator
2014-11-15 3:56 [U-Boot] [PATCH 0/19] x86: ivybridge: Add graphics support Simon Glass
` (16 preceding siblings ...)
2014-11-15 3:56 ` [U-Boot] [PATCH 17/19] bios_emulator: Always print errors when opcode decode fails Simon Glass
@ 2014-11-15 3:56 ` Simon Glass
2014-11-25 21:50 ` Simon Glass
2014-11-15 3:56 ` [U-Boot] [PATCH 19/19] x86: chromebook_link: Enable the Chrome OS EC Simon Glass
18 siblings, 1 reply; 40+ messages in thread
From: Simon Glass @ 2014-11-15 3:56 UTC (permalink / raw)
To: u-boot
Enable this so that it can be used instead of native execution if desired.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
include/configs/chromebook_link.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/include/configs/chromebook_link.h b/include/configs/chromebook_link.h
index c098c6c..48ae81e 100644
--- a/include/configs/chromebook_link.h
+++ b/include/configs/chromebook_link.h
@@ -58,6 +58,10 @@
#define CONFIG_SYS_EARLY_PCI_INIT
#define CONFIG_PCI_PNP
+#define CONFIG_BIOSEMU
+#define VIDEO_IO_OFFSET 0
+#define CONFIG_X86EMU_RAW_IO
+
#define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,vga,serial\0" \
"stdout=vga,serial\0" \
"stderr=vga,serial\0"
--
2.1.0.rc2.206.gedb03e5
^ permalink raw reply related [flat|nested] 40+ messages in thread* [U-Boot] [PATCH 19/19] x86: chromebook_link: Enable the Chrome OS EC
2014-11-15 3:56 [U-Boot] [PATCH 0/19] x86: ivybridge: Add graphics support Simon Glass
` (17 preceding siblings ...)
2014-11-15 3:56 ` [U-Boot] [PATCH 18/19] x86: chromebook_link: Enable the x86 emulator Simon Glass
@ 2014-11-15 3:56 ` Simon Glass
2014-11-25 21:50 ` Simon Glass
18 siblings, 1 reply; 40+ messages in thread
From: Simon Glass @ 2014-11-15 3:56 UTC (permalink / raw)
To: u-boot
Enable the Chrome OS EC so that it can be used from U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
board/google/chromebook_link/link.c | 4 ++++
include/configs/chromebook_link.h | 5 +++++
2 files changed, 9 insertions(+)
diff --git a/board/google/chromebook_link/link.c b/board/google/chromebook_link/link.c
index 0a1ae61..1822237 100644
--- a/board/google/chromebook_link/link.c
+++ b/board/google/chromebook_link/link.c
@@ -5,10 +5,14 @@
*/
#include <common.h>
+#include <cros_ec.h>
#include <asm/gpio.h>
int arch_early_init_r(void)
{
+ if (cros_ec_board_init())
+ return -1;
+
return 0;
}
diff --git a/include/configs/chromebook_link.h b/include/configs/chromebook_link.h
index 48ae81e..645b31c 100644
--- a/include/configs/chromebook_link.h
+++ b/include/configs/chromebook_link.h
@@ -62,6 +62,11 @@
#define VIDEO_IO_OFFSET 0
#define CONFIG_X86EMU_RAW_IO
+#define CONFIG_CROS_EC
+#define CONFIG_CROS_EC_LPC
+#define CONFIG_CMD_CROS_EC
+#define CONFIG_ARCH_EARLY_INIT_R
+
#define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,vga,serial\0" \
"stdout=vga,serial\0" \
"stderr=vga,serial\0"
--
2.1.0.rc2.206.gedb03e5
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