From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Date: Sat, 6 Dec 2014 14:07:00 +0100 Subject: [U-Boot] [PATCH] mtd: nand: mxs: Add support for multiple NAND chips In-Reply-To: <1417526774-32508-1-git-send-email-sr@denx.de> References: <1417526774-32508-1-git-send-email-sr@denx.de> Message-ID: <201412061407.00278.marex@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Tuesday, December 02, 2014 at 02:26:14 PM, Stefan Roese wrote: > This patch adds support for multiple NAND chips connected to the > i.MX6. Linux already supports this configuration. So lets port > the missing features to the U-Boot driver to support more than > one NAND chip here as well. > > The necessary changes in detail are: > > - Only use DMA channel 0 for all NAND chips: > Linux: a7c12d01 (mtd: gpmi: use DMA channel 0 for all the > nand chips) > d159d8b7 (mtd: gpmi: decouple the chip select from > the DMA channel) > - On i.MX6 only use ready/busy pin for CS0: > Linux: 7caa4fd2 (mtd: gpmi: imx6: fix the wrong method for > checking ready/busy) > > To enable this feature the board needs to configure > CONFIG_SYS_NAND_MAX_CHIPS to 2 (or more). > > With these changes I'm able to detect and acces 2 NAND chips: > > => nand device > > Device 0: 2x nand0, sector size 128 KiB > Page size 2048 b > OOB size 64 b > Erase size 131072 b Shouldn't you see "Device 0" and "Device 1" ? > Please note that this is also needed to support a NAND chip with > multiple chips embedded in one die, e.g. Micron MT29F32G08QAA. > > Tested on a i.MX6DL based board with 2 Micron MT29F4G08AB > chips. > > Signed-off-by: Stefan Roese > Cc: Marek Vasut > Cc: Stefano Babic > Cc: Fabio Estevam > Cc: Scott Wood Looks pretty trivial, thanks! Reviewed-by: Marek Vasut Best regards, Marek Vasut