From: Marek Vasut <marex@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] RFC Pin Configuration Device Tree Bindings for Altera Arria10 SOCFPGA
Date: Tue, 16 Dec 2014 20:39:11 +0100 [thread overview]
Message-ID: <201412162039.11763.marex@denx.de> (raw)
In-Reply-To: <alpine.DEB.2.02.1412041604100.24988@tthayer-HP-Z620-Ubuntu>
On Thursday, December 04, 2014 at 11:08:32 PM, mgerlach wrote:
> On Wed, 3 Dec 2014, Pavel Machek wrote:
> > Hi!
> >
> > > >>> altr,pinmux-regs = <0xF 0xF 0xF 0xF 0xF 0xF 0xF 0xF 0xF 0xF
> > > >>> reg = <0xffd07300 0x00000048>;
> > > >>> altr,pinmux-regs = <0x00000 0x51010 0x51010 0x51010 0x40605
> > > >>>
> > > >>> 0x40605 0x00605 0x40605 0x40605 0x40605
> > > >>> 0x10605 0x51010 0x51010 0x51010 0x51010
> > > >>> 0x51010 0x03030 0x23030>;
> > > >>>
> > > >>> };
> > > >>> fpga {
> > > >>>
> > > >>> reg = <0xffd07400 0x00000044>;
> > > >>> altr,pinmux-regs = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
> > > >>>
> > > >>> 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
> > > >>>
> > > >>> };
> > > >>>
> > > >>> };
> > > >>
> > > >>Does this match the kernel? Or does the kernel have no such binding
> > > >>yet?
> > > >>
> > > > There are no such bindings in the kernel yet. Dynamic pinmuxing is
> > > > not supported by the Arria 10; so we don't anticipate the kernel
> > > > needing pinmux information.
> > >
> > > OK. Currently device tree files are stored in the kernel, so it might
> > > be worth submitting it there one day regardless.
> >
> > Actually, I believe you should use standard pinmux format. Just
> > because dynamic pinmuxing is not supported now does not mean it will
> > not be supported in Arria 11... And it was already supported in older
> > chipsets (right?).
> >
> > Pavel
>
> Hi Pavel,
>
> Thanks for the suggestion. I had another look at the pinctlr bindings
> in the kernel. I think we should be using standard bindings defined in
> Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt for
> the Arria 10 SOCFPGA.
Thanks for letting me know about the discussion today.
As for the SPL, we agreed that the SPL should parse the DT and do the
configuration from the DT. The DT for the SPL might be stripped down
in case there was a problem with fitting the full-size DT into the memory.
As for the DT bindings (in general), these should go to the DT mailing list,
see http://elinux.org/Device_Tree#Device-tree_Mailing_List . By running those
bindings against the DT ML, you will get some kind of a guarantee that their
design is sound and these bindings will be somewhat future-proof.
Best regards,
Marek Vasut
prev parent reply other threads:[~2014-12-16 19:39 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-29 18:20 [U-Boot] RFC Pin Configuration Device Tree Bindings for Altera Arria10 SOCFPGA Matthew Gerlach
2014-12-03 14:48 ` Pavel Machek
2014-12-03 17:36 ` Simon Glass
2014-12-03 17:45 ` Dinh Nguyen
2014-12-03 17:49 ` Matthew Gerlach
2014-12-03 19:00 ` Simon Glass
2014-12-03 20:36 ` Pavel Machek
2014-12-04 22:08 ` mgerlach
2014-12-16 19:39 ` Marek Vasut [this message]
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