From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Date: Thu, 15 Jan 2015 01:05:45 +0100 Subject: [U-Boot] [PATCHv1 22/22] arm: socfpga: spl: update pll_config for dev kit In-Reply-To: <1421253662-27222-23-git-send-email-dinguyen@opensource.altera.com> References: <1421253662-27222-1-git-send-email-dinguyen@opensource.altera.com> <1421253662-27222-23-git-send-email-dinguyen@opensource.altera.com> Message-ID: <201501150105.45740.marex@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Wednesday, January 14, 2015 at 05:41:02 PM, dinguyen at opensource.altera.com wrote: > From: Dinh Nguyen > > This sets the CPU clocks to 925MHz and DDR to 400MHz. > > Signed-off-by: Dinh Nguyen Hi! Is this based on the Arria V patchset I sent just before the end of the year or is this based on u-boot master please ? Thanks for the SPL patchset, it's really useful :) It'll need some cleanup, so please keep at it ! Also, please give others a few days to react before sending a V2. Thank you! :) Best regards, Marek Vasut